2 * Copyright 2013 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include "vf610-pinfunc.h"
11 #include <dt-bindings/clock/vf610-clock.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
35 compatible = "fixed-clock";
37 clock-frequency = <24000000>;
41 compatible = "fixed-clock";
43 clock-frequency = <32768>;
46 reboot: syscon-reboot {
47 compatible = "syscon-reboot";
56 compatible = "simple-bus";
59 aips0: aips-bus@40000000 {
60 compatible = "fsl,aips-bus", "simple-bus";
65 edma0: dma-controller@40018000 {
67 compatible = "fsl,vf610-edma";
68 reg = <0x40018000 0x2000>,
72 clock-names = "dmamux0", "dmamux1";
73 clocks = <&clks VF610_CLK_DMAMUX0>,
74 <&clks VF610_CLK_DMAMUX1>;
78 can0: flexcan@40020000 {
79 compatible = "fsl,vf610-flexcan";
80 reg = <0x40020000 0x4000>;
81 clocks = <&clks VF610_CLK_FLEXCAN0>,
82 <&clks VF610_CLK_FLEXCAN0>;
83 clock-names = "ipg", "per";
87 uart0: serial@40027000 {
88 compatible = "fsl,vf610-lpuart";
89 reg = <0x40027000 0x1000>;
90 clocks = <&clks VF610_CLK_UART0>;
94 dma-names = "rx","tx";
98 uart1: serial@40028000 {
99 compatible = "fsl,vf610-lpuart";
100 reg = <0x40028000 0x1000>;
101 clocks = <&clks VF610_CLK_UART1>;
105 dma-names = "rx","tx";
109 uart2: serial@40029000 {
110 compatible = "fsl,vf610-lpuart";
111 reg = <0x40029000 0x1000>;
112 clocks = <&clks VF610_CLK_UART2>;
116 dma-names = "rx","tx";
120 uart3: serial@4002a000 {
121 compatible = "fsl,vf610-lpuart";
122 reg = <0x4002a000 0x1000>;
123 clocks = <&clks VF610_CLK_UART3>;
127 dma-names = "rx","tx";
131 dspi0: dspi0@4002c000 {
132 #address-cells = <1>;
134 compatible = "fsl,vf610-dspi";
135 reg = <0x4002c000 0x1000>;
136 clocks = <&clks VF610_CLK_DSPI0>;
137 clock-names = "dspi";
138 spi-num-chipselects = <5>;
143 compatible = "fsl,vf610-sai";
144 reg = <0x40031000 0x1000>;
145 clocks = <&clks VF610_CLK_SAI2>;
147 dma-names = "tx", "rx";
148 dmas = <&edma0 0 21>,
154 compatible = "fsl,vf610-pit";
155 reg = <0x40037000 0x1000>;
156 clocks = <&clks VF610_CLK_PIT>;
161 compatible = "fsl,vf610-ftm-pwm";
163 reg = <0x40038000 0x1000>;
164 clock-names = "ftm_sys", "ftm_ext",
165 "ftm_fix", "ftm_cnt_clk_en";
166 clocks = <&clks VF610_CLK_FTM0>,
167 <&clks VF610_CLK_FTM0_EXT_SEL>,
168 <&clks VF610_CLK_FTM0_FIX_SEL>,
169 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
174 compatible = "fsl,vf610-ftm-pwm";
176 reg = <0x40039000 0x1000>;
177 clock-names = "ftm_sys", "ftm_ext",
178 "ftm_fix", "ftm_cnt_clk_en";
179 clocks = <&clks VF610_CLK_FTM1>,
180 <&clks VF610_CLK_FTM1_EXT_SEL>,
181 <&clks VF610_CLK_FTM1_FIX_SEL>,
182 <&clks VF610_CLK_FTM1_EXT_FIX_EN>;
187 compatible = "fsl,vf610-adc";
188 reg = <0x4003b000 0x1000>;
189 clocks = <&clks VF610_CLK_ADC0>;
194 wdoga5: wdog@4003e000 {
195 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
196 reg = <0x4003e000 0x1000>;
197 clocks = <&clks VF610_CLK_WDT>;
198 clock-names = "wdog";
202 qspi0: quadspi@40044000 {
203 #address-cells = <1>;
205 compatible = "fsl,vf610-qspi";
206 reg = <0x40044000 0x1000>;
207 clocks = <&clks VF610_CLK_QSPI0_EN>,
208 <&clks VF610_CLK_QSPI0>;
209 clock-names = "qspi_en", "qspi";
213 iomuxc: iomuxc@40048000 {
214 compatible = "fsl,vf610-iomuxc";
215 reg = <0x40048000 0x1000>;
216 #gpio-range-cells = <3>;
219 gpio0: gpio@40049000 {
220 compatible = "fsl,vf610-gpio";
221 reg = <0x40049000 0x1000 0x400ff000 0x40>;
224 interrupt-controller;
225 #interrupt-cells = <2>;
226 gpio-ranges = <&iomuxc 0 0 32>;
229 gpio1: gpio@4004a000 {
230 compatible = "fsl,vf610-gpio";
231 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
234 interrupt-controller;
235 #interrupt-cells = <2>;
236 gpio-ranges = <&iomuxc 0 32 32>;
239 gpio2: gpio@4004b000 {
240 compatible = "fsl,vf610-gpio";
241 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
244 interrupt-controller;
245 #interrupt-cells = <2>;
246 gpio-ranges = <&iomuxc 0 64 32>;
249 gpio3: gpio@4004c000 {
250 compatible = "fsl,vf610-gpio";
251 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
254 interrupt-controller;
255 #interrupt-cells = <2>;
256 gpio-ranges = <&iomuxc 0 96 32>;
259 gpio4: gpio@4004d000 {
260 compatible = "fsl,vf610-gpio";
261 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
266 gpio-ranges = <&iomuxc 0 128 7>;
269 anatop: anatop@40050000 {
270 compatible = "fsl,vf610-anatop", "syscon";
271 reg = <0x40050000 0x400>;
274 usbphy0: usbphy@40050800 {
275 compatible = "fsl,vf610-usbphy";
276 reg = <0x40050800 0x400>;
277 clocks = <&clks VF610_CLK_USBPHY0>;
278 fsl,anatop = <&anatop>;
282 usbphy1: usbphy@40050c00 {
283 compatible = "fsl,vf610-usbphy";
284 reg = <0x40050c00 0x400>;
285 clocks = <&clks VF610_CLK_USBPHY1>;
286 fsl,anatop = <&anatop>;
291 #address-cells = <1>;
293 compatible = "fsl,vf610-i2c";
294 reg = <0x40066000 0x1000>;
295 clocks = <&clks VF610_CLK_I2C0>;
297 dmas = <&edma0 0 50>,
299 dma-names = "rx","tx";
304 compatible = "fsl,vf610-ccm";
305 reg = <0x4006b000 0x1000>;
306 clocks = <&sxosc>, <&fxosc>;
307 clock-names = "sxosc", "fxosc";
311 usbdev0: usb@40034000 {
312 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
313 reg = <0x40034000 0x800>;
314 clocks = <&clks VF610_CLK_USBC0>;
315 fsl,usbphy = <&usbphy0>;
316 fsl,usbmisc = <&usbmisc0 0>;
317 dr_mode = "peripheral";
321 usbmisc0: usb@40034800 {
323 compatible = "fsl,vf610-usbmisc";
324 reg = <0x40034800 0x200>;
325 clocks = <&clks VF610_CLK_USBC0>;
330 compatible = "fsl,vf610-src", "syscon";
331 reg = <0x4006e000 0x1000>;
335 aips1: aips-bus@40080000 {
336 compatible = "fsl,aips-bus", "simple-bus";
337 #address-cells = <1>;
341 edma1: dma-controller@40098000 {
343 compatible = "fsl,vf610-edma";
344 reg = <0x40098000 0x2000>,
348 clock-names = "dmamux0", "dmamux1";
349 clocks = <&clks VF610_CLK_DMAMUX2>,
350 <&clks VF610_CLK_DMAMUX3>;
354 snvs0: snvs@400a7000 {
355 compatible = "fsl,sec-v4.0-mon", "simple-bus";
356 #address-cells = <1>;
358 ranges = <0 0x400a7000 0x2000>;
360 snvsrtc: snvs-rtc-lp@34 {
361 compatible = "fsl,sec-v4.0-mon-rtc-lp";
363 clocks = <&clks VF610_CLK_SNVS>;
364 clock-names = "snvs-rtc";
368 uart4: serial@400a9000 {
369 compatible = "fsl,vf610-lpuart";
370 reg = <0x400a9000 0x1000>;
371 clocks = <&clks VF610_CLK_UART4>;
376 uart5: serial@400aa000 {
377 compatible = "fsl,vf610-lpuart";
378 reg = <0x400aa000 0x1000>;
379 clocks = <&clks VF610_CLK_UART5>;
385 compatible = "fsl,vf610-adc";
386 reg = <0x400bb000 0x1000>;
387 clocks = <&clks VF610_CLK_ADC1>;
392 esdhc1: esdhc@400b2000 {
393 compatible = "fsl,imx53-esdhc";
394 reg = <0x400b2000 0x1000>;
395 clocks = <&clks VF610_CLK_IPG_BUS>,
396 <&clks VF610_CLK_PLATFORM_BUS>,
397 <&clks VF610_CLK_ESDHC1>;
398 clock-names = "ipg", "ahb", "per";
402 usbh1: usb@400b4000 {
403 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
404 reg = <0x400b4000 0x800>;
405 clocks = <&clks VF610_CLK_USBC1>;
406 fsl,usbphy = <&usbphy1>;
407 fsl,usbmisc = <&usbmisc1 0>;
412 usbmisc1: usb@400b4800 {
414 compatible = "fsl,vf610-usbmisc";
415 reg = <0x400b4800 0x200>;
416 clocks = <&clks VF610_CLK_USBC1>;
421 compatible = "fsl,ftm-timer";
422 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
423 clock-names = "ftm-evt", "ftm-src",
424 "ftm-evt-counter-en", "ftm-src-counter-en";
425 clocks = <&clks VF610_CLK_FTM2>,
426 <&clks VF610_CLK_FTM3>,
427 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
428 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
432 fec0: ethernet@400d0000 {
433 compatible = "fsl,mvf600-fec";
434 reg = <0x400d0000 0x1000>;
435 clocks = <&clks VF610_CLK_ENET0>,
436 <&clks VF610_CLK_ENET0>,
437 <&clks VF610_CLK_ENET>;
438 clock-names = "ipg", "ahb", "ptp";
442 fec1: ethernet@400d1000 {
443 compatible = "fsl,mvf600-fec";
444 reg = <0x400d1000 0x1000>;
445 clocks = <&clks VF610_CLK_ENET1>,
446 <&clks VF610_CLK_ENET1>,
447 <&clks VF610_CLK_ENET>;
448 clock-names = "ipg", "ahb", "ptp";
452 can1: flexcan@400d4000 {
453 compatible = "fsl,vf610-flexcan";
454 reg = <0x400d4000 0x4000>;
455 clocks = <&clks VF610_CLK_FLEXCAN1>,
456 <&clks VF610_CLK_FLEXCAN1>;
457 clock-names = "ipg", "per";