2 * linux/arch/arm/common/icst307.c
4 * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Support functions for calculating clocks/divisors for the ICST307
11 * clock generators. See http://www.icst.com/ for more information
14 * This is an almost identical implementation to the ICST525 clock generator.
15 * The s2div and idx2s files are different
17 #include <linux/module.h>
18 #include <linux/kernel.h>
20 #include <asm/hardware/icst307.h>
23 * Divisors for each OD setting.
25 static unsigned char s2div[8] = { 10, 2, 8, 4, 5, 7, 3, 6 };
27 unsigned long icst307_khz(const struct icst_params *p, struct icst_vco vco)
29 return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * s2div[vco.s]);
32 EXPORT_SYMBOL(icst307_khz);
35 * Ascending divisor S values.
37 static unsigned char idx2s[8] = { 1, 6, 3, 4, 7, 5, 2, 0 };
40 icst307_khz_to_vco(const struct icst_params *p, unsigned long freq)
42 struct icst_vco vco = { .s = 1, .v = p->vd_max, .r = p->rd_max };
44 unsigned int i = 0, rd, best = (unsigned int)-1;
47 * First, find the PLL output divisor such
48 * that the PLL output is within spec.
51 f = freq * s2div[idx2s[i]];
54 * f must be between 6MHz and 200MHz (3.3 or 5V)
56 if (f > ICST307_VCO_MIN && f <= p->vco_max)
58 } while (i < ARRAY_SIZE(idx2s));
60 if (i >= ARRAY_SIZE(idx2s))
66 * Now find the closest divisor combination
67 * which gives a PLL output of 'f'.
69 for (rd = p->rd_min; rd <= p->rd_max; rd++) {
70 unsigned long fref_div, f_pll;
74 fref_div = (2 * p->ref) / rd;
76 vd = (f + fref_div / 2) / fref_div;
77 if (vd < p->vd_min || vd > p->vd_max)
80 f_pll = fref_div * vd;
85 if ((unsigned)f_diff < best) {
97 EXPORT_SYMBOL(icst307_khz_to_vco);