2 * arch/arm/include/asm/opcodes.h
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #ifndef __ASM_ARM_OPCODES_H
10 #define __ASM_ARM_OPCODES_H
13 extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
16 #define ARM_OPCODE_CONDTEST_FAIL 0
17 #define ARM_OPCODE_CONDTEST_PASS 1
18 #define ARM_OPCODE_CONDTEST_UNCOND 2
22 * Opcode byteswap helpers
24 * These macros help with converting instructions between a canonical integer
25 * format and in-memory representation, in an endianness-agnostic manner.
27 * __mem_to_opcode_*() convert from in-memory representation to canonical form.
28 * __opcode_to_mem_*() convert from canonical form to in-memory representation.
31 * Canonical instruction representation:
34 * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8
35 * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8
37 * There is no way to distinguish an ARM instruction in canonical representation
38 * from a Thumb instruction (just as these cannot be distinguished in memory).
39 * Where this distinction is important, it needs to be tracked separately.
41 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
42 * represent any valid Thumb-2 instruction. For this range,
43 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
48 #include <linux/types.h>
49 #include <linux/swab.h>
51 #ifdef CONFIG_CPU_ENDIAN_BE8
53 #define __opcode_to_mem_arm(x) swab32(x)
54 #define __opcode_to_mem_thumb16(x) swab16(x)
55 #define __opcode_to_mem_thumb32(x) swahb32(x)
57 #else /* ! CONFIG_CPU_ENDIAN_BE8 */
59 #define __opcode_to_mem_arm(x) ((u32)(x))
60 #define __opcode_to_mem_thumb16(x) ((u16)(x))
61 #ifndef CONFIG_CPU_ENDIAN_BE32
63 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
64 * work in all cases, due to alignment constraints. For now, a correct
65 * version is not provided for BE32.
67 #define __opcode_to_mem_thumb32(x) swahw32(x)
70 #endif /* ! CONFIG_CPU_ENDIAN_BE8 */
72 #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
73 #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
74 #ifndef CONFIG_CPU_ENDIAN_BE32
75 #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
78 /* Operations specific to Thumb opcodes */
80 /* Instruction size checks: */
81 #define __opcode_is_thumb32(x) ((u32)(x) >= 0xE8000000UL)
82 #define __opcode_is_thumb16(x) ((u32)(x) < 0xE800UL)
84 /* Operations to construct or split 32-bit Thumb instructions: */
85 #define __opcode_thumb32_first(x) ((u16)((x) >> 16))
86 #define __opcode_thumb32_second(x) ((u16)(x))
87 #define __opcode_thumb32_compose(first, second) \
88 (((u32)(u16)(first) << 16) | (u32)(u16)(second))
90 #endif /* __ASSEMBLY__ */
92 #endif /* __ASM_ARM_OPCODES_H */