1 #ifndef _ASM_ARM_TOPOLOGY_H
2 #define _ASM_ARM_TOPOLOGY_H
4 #ifdef CONFIG_ARM_CPU_TOPOLOGY
6 #include <linux/cpumask.h>
12 cpumask_t thread_sibling;
13 cpumask_t core_sibling;
16 extern struct cputopo_arm cpu_topology[NR_CPUS];
18 #define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id)
19 #define topology_core_id(cpu) (cpu_topology[cpu].core_id)
20 #define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling)
21 #define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling)
23 #define mc_capable() (cpu_topology[0].socket_id != -1)
24 #define smt_capable() (cpu_topology[0].thread_id != -1)
26 void init_cpu_topology(void);
27 void store_cpu_topology(unsigned int cpuid);
28 const struct cpumask *cpu_coregroup_mask(int cpu);
29 int cluster_to_logical_mask(unsigned int socket_id, cpumask_t *cluster_mask);
31 #ifdef CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE
32 /* Common values for CPUs */
34 #define SD_CPU_INIT (struct sched_domain) { \
38 .imbalance_pct = 125, \
39 .cache_nice_tries = 1, \
46 .flags = 0*SD_LOAD_BALANCE \
47 | 1*SD_BALANCE_NEWIDLE \
52 | 0*SD_SHARE_CPUPOWER \
53 | 0*SD_SHARE_PKG_RESOURCES \
56 .last_balance = jiffies, \
57 .balance_interval = 1, \
60 #endif /* CONFIG_DISABLE_CPU_SCHED_DOMAIN_BALANCE */
64 static inline void init_cpu_topology(void) { }
65 static inline void store_cpu_topology(unsigned int cpuid) { }
66 static inline int cluster_to_logical_mask(unsigned int socket_id,
67 cpumask_t *cluster_mask) { return -EINVAL; }
71 #include <asm-generic/topology.h>
73 #endif /* _ASM_ARM_TOPOLOGY_H */