arch/arm/kernel/arch_timer.c

   1 /*
   2  *  linux/arch/arm/kernel/arch_timer.c
   3  *
   4  *  Copyright (C) 2011 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/kernel.h>
  13 #include <linux/delay.h>
  14 #include <linux/device.h>
  15 #include <linux/smp.h>
  16 #include <linux/cpu.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/clockchips.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/of_irq.h>
  21 #include <linux/io.h>
  22
  23 #include <asm/delay.h>
  24 #include <asm/localtimer.h>
  25 #include <asm/arch_timer.h>
  26 #include <asm/sched_clock.h>
  27
  28 static u32 arch_timer_rate;
  29
  30 enum ppi_nr {
  31         PHYS_SECURE_PPI,
  32         PHYS_NONSECURE_PPI,
  33         VIRT_PPI,
  34         HYP_PPI,
  35         MAX_TIMER_PPI
  36 };
  37
  38 static int arch_timer_ppi[MAX_TIMER_PPI];
  39
  40 static struct clock_event_device __percpu **arch_timer_evt;
  41 static struct delay_timer arch_delay_timer;
  42
  43 static bool arch_timer_use_virtual = true;
  44
  45 /*
  46  * Architected system timer support.
  47  */
  48
  49 static irqreturn_t inline timer_handler(const int access,
  50                                         struct clock_event_device *evt)
  51 {
  52         unsigned long ctrl;
  53         ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
  54         if (ctrl & ARCH_TIMER_CTRL_IT_STAT) {
  55                 ctrl |= ARCH_TIMER_CTRL_IT_MASK;
  56                 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
  57                 evt->event_handler(evt);
  58                 return IRQ_HANDLED;
  59         }
  60
  61         return IRQ_NONE;
  62 }
  63
  64 static irqreturn_t arch_timer_handler_virt(int irq, void *dev_id)
  65 {
  66         struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
  67
  68         return timer_handler(ARCH_TIMER_VIRT_ACCESS, evt);
  69 }
  70
  71 static irqreturn_t arch_timer_handler_phys(int irq, void *dev_id)
  72 {
  73         struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
  74
  75         return timer_handler(ARCH_TIMER_PHYS_ACCESS, evt);
  76 }
  77
  78 static inline void timer_set_mode(const int access, int mode)
  79 {
  80         unsigned long ctrl;
  81         switch (mode) {
  82         case CLOCK_EVT_MODE_UNUSED:
  83         case CLOCK_EVT_MODE_SHUTDOWN:
  84                 ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
  85                 ctrl &= ~ARCH_TIMER_CTRL_ENABLE;
  86                 arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
  87                 break;
  88         default:
  89                 break;
  90         }
  91 }
  92
  93 static void arch_timer_set_mode_virt(enum clock_event_mode mode,
  94                                      struct clock_event_device *clk)
  95 {
  96         timer_set_mode(ARCH_TIMER_VIRT_ACCESS, mode);
  97 }
  98
  99 static void arch_timer_set_mode_phys(enum clock_event_mode mode,
 100                                      struct clock_event_device *clk)
 101 {
 102         timer_set_mode(ARCH_TIMER_PHYS_ACCESS, mode);
 103 }
 104
 105 static inline void set_next_event(const int access, unsigned long evt)
 106 {
 107         unsigned long ctrl;
 108         ctrl = arch_timer_reg_read(access, ARCH_TIMER_REG_CTRL);
 109         ctrl |= ARCH_TIMER_CTRL_ENABLE;
 110         ctrl &= ~ARCH_TIMER_CTRL_IT_MASK;
 111         arch_timer_reg_write(access, ARCH_TIMER_REG_TVAL, evt);
 112         arch_timer_reg_write(access, ARCH_TIMER_REG_CTRL, ctrl);
 113 }
 114
 115 static int arch_timer_set_next_event_virt(unsigned long evt,
 116                                           struct clock_event_device *unused)
 117 {
 118         set_next_event(ARCH_TIMER_VIRT_ACCESS, evt);
 119         return 0;
 120 }
 121
 122 static int arch_timer_set_next_event_phys(unsigned long evt,
 123                                           struct clock_event_device *unused)
 124 {
 125         set_next_event(ARCH_TIMER_PHYS_ACCESS, evt);
 126         return 0;
 127 }
 128
 129 static int __cpuinit arch_timer_setup(struct clock_event_device *clk)
 130 {
 131         clk->features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP;
 132         clk->name = "arch_sys_timer";
 133         clk->rating = 450;
 134         if (arch_timer_use_virtual) {
 135                 clk->irq = arch_timer_ppi[VIRT_PPI];
 136                 clk->set_mode = arch_timer_set_mode_virt;
 137                 clk->set_next_event = arch_timer_set_next_event_virt;
 138         } else {
 139                 clk->irq = arch_timer_ppi[PHYS_SECURE_PPI];
 140                 clk->set_mode = arch_timer_set_mode_phys;
 141                 clk->set_next_event = arch_timer_set_next_event_phys;
 142         }
 143
 144         clk->set_mode(CLOCK_EVT_MODE_SHUTDOWN, NULL);
 145
 146         clockevents_config_and_register(clk, arch_timer_rate,
 147                                         0xf, 0x7fffffff);
 148
 149         *__this_cpu_ptr(arch_timer_evt) = clk;
 150
 151         if (arch_timer_use_virtual)
 152                 enable_percpu_irq(arch_timer_ppi[VIRT_PPI], 0);
 153         else {
 154                 enable_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI], 0);
 155                 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
 156                         enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], 0);
 157         }
 158
 159         return 0;
 160 }
 161
 162 static int arch_timer_available(void)
 163 {
 164         u32 freq;
 165
 166         if (arch_timer_rate == 0) {
 167                 freq = arch_timer_get_cntfrq();
 168
 169                 /* Check the timer frequency. */
 170                 if (freq == 0) {
 171                         pr_warn("Architected timer frequency not available\n");
 172                         return -EINVAL;
 173                 }
 174
 175                 arch_timer_rate = freq;
 176         }
 177
 178         pr_info_once("Architected local timer running at %lu.%02luMHz (%s).\n",
 179                      (unsigned long)arch_timer_rate / 1000000,
 180                      (unsigned long)(arch_timer_rate / 10000) % 100,
 181                      arch_timer_use_virtual ? "virt" : "phys");
 182         return 0;
 183 }
 184
 185 /*
 186  * Some external users of arch_timer_read_counter (e.g. sched_clock) may try to
 187  * call it before it has been initialised. Rather than incur a performance
 188  * penalty checking for initialisation, provide a default implementation that
 189  * won't lead to time appearing to jump backwards.
 190  */
 191 static u64 arch_timer_read_zero(void)
 192 {
 193         return 0;
 194 }
 195
 196 u64 (*arch_timer_read_counter)(void) = arch_timer_read_zero;
 197
 198 static u32 arch_timer_read_counter32(void)
 199 {
 200         return arch_timer_read_counter();
 201 }
 202
 203 static cycle_t arch_counter_read(struct clocksource *cs)
 204 {
 205         return arch_timer_read_counter();
 206 }
 207
 208 static unsigned long arch_timer_read_current_timer(void)
 209 {
 210         return arch_timer_read_counter();
 211 }
 212
 213 static cycle_t arch_counter_read_cc(const struct cyclecounter *cc)
 214 {
 215         return arch_timer_read_counter();
 216 }
 217
 218 static struct clocksource clocksource_counter = {
 219         .name   = "arch_sys_counter",
 220         .rating = 400,
 221         .read   = arch_counter_read,
 222         .mask   = CLOCKSOURCE_MASK(56),
 223         .flags  = CLOCK_SOURCE_IS_CONTINUOUS,
 224 };
 225
 226 static struct cyclecounter cyclecounter = {
 227         .read   = arch_counter_read_cc,
 228         .mask   = CLOCKSOURCE_MASK(56),
 229 };
 230
 231 static struct timecounter timecounter;
 232
 233 struct timecounter *arch_timer_get_timecounter(void)
 234 {
 235         return &timecounter;
 236 }
 237
 238 static void __cpuinit arch_timer_stop(struct clock_event_device *clk)
 239 {
 240         pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n",
 241                  clk->irq, smp_processor_id());
 242
 243         if (arch_timer_use_virtual)
 244                 disable_percpu_irq(arch_timer_ppi[VIRT_PPI]);
 245         else {
 246                 disable_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI]);
 247                 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
 248                         disable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI]);
 249         }
 250
 251         clk->set_mode(CLOCK_EVT_MODE_UNUSED, clk);
 252 }
 253
 254 static struct local_timer_ops arch_timer_ops __cpuinitdata = {
 255         .setup  = arch_timer_setup,
 256         .stop   = arch_timer_stop,
 257 };
 258
 259 static struct clock_event_device arch_timer_global_evt;
 260
 261 static int __init arch_timer_register(void)
 262 {
 263         int err;
 264         int ppi;
 265
 266         err = arch_timer_available();
 267         if (err)
 268                 goto out;
 269
 270         arch_timer_evt = alloc_percpu(struct clock_event_device *);
 271         if (!arch_timer_evt) {
 272                 err = -ENOMEM;
 273                 goto out;
 274         }
 275
 276         clocksource_register_hz(&clocksource_counter, arch_timer_rate);
 277         cyclecounter.mult = clocksource_counter.mult;
 278         cyclecounter.shift = clocksource_counter.shift;
 279         timecounter_init(&timecounter, &cyclecounter,
 280                          arch_counter_get_cntpct());
 281
 282         if (arch_timer_use_virtual) {
 283                 ppi = arch_timer_ppi[VIRT_PPI];
 284                 err = request_percpu_irq(ppi, arch_timer_handler_virt,
 285                                          "arch_timer", arch_timer_evt);
 286         } else {
 287                 ppi = arch_timer_ppi[PHYS_SECURE_PPI];
 288                 err = request_percpu_irq(ppi, arch_timer_handler_phys,
 289                                          "arch_timer", arch_timer_evt);
 290                 if (!err && arch_timer_ppi[PHYS_NONSECURE_PPI]) {
 291                         ppi = arch_timer_ppi[PHYS_NONSECURE_PPI];
 292                         err = request_percpu_irq(ppi, arch_timer_handler_phys,
 293                                                  "arch_timer", arch_timer_evt);
 294                         if (err)
 295                                 free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI],
 296                                                 arch_timer_evt);
 297                 }
 298         }
 299
 300         if (err) {
 301                 pr_err("arch_timer: can't register interrupt %d (%d)\n",
 302                        ppi, err);
 303                 goto out_free;
 304         }
 305
 306         err = local_timer_register(&arch_timer_ops);
 307         if (err) {
 308                 /*
 309                  * We couldn't register as a local timer (could be
 310                  * because we're on a UP platform, or because some
 311                  * other local timer is already present...). Try as a
 312                  * global timer instead.
 313                  */
 314                 arch_timer_global_evt.cpumask = cpumask_of(0);
 315                 err = arch_timer_setup(&arch_timer_global_evt);
 316         }
 317         if (err)
 318                 goto out_free_irq;
 319
 320         /* Use the architected timer for the delay loop. */
 321         arch_delay_timer.read_current_timer = &arch_timer_read_current_timer;
 322         arch_delay_timer.freq = arch_timer_rate;
 323         register_current_timer_delay(&arch_delay_timer);
 324         return 0;
 325
 326 out_free_irq:
 327         if (arch_timer_use_virtual)
 328                 free_percpu_irq(arch_timer_ppi[VIRT_PPI], arch_timer_evt);
 329         else {
 330                 free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI],
 331                                 arch_timer_evt);
 332                 if (arch_timer_ppi[PHYS_NONSECURE_PPI])
 333                         free_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI],
 334                                         arch_timer_evt);
 335         }
 336
 337 out_free:
 338         free_percpu(arch_timer_evt);
 339 out:
 340         return err;
 341 }
 342
 343 static const struct of_device_id arch_timer_of_match[] __initconst = {
 344         { .compatible   = "arm,armv7-timer",    },
 345         {},
 346 };
 347
 348 int __init arch_timer_of_register(void)
 349 {
 350         struct device_node *np;
 351         u32 freq;
 352         int i;
 353
 354         np = of_find_matching_node(NULL, arch_timer_of_match);
 355         if (!np) {
 356                 pr_err("arch_timer: can't find DT node\n");
 357                 return -ENODEV;
 358         }
 359
 360         /* Try to determine the frequency from the device tree or CNTFRQ */
 361         if (!of_property_read_u32(np, "clock-frequency", &freq))
 362                 arch_timer_rate = freq;
 363
 364         for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++)
 365                 arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
 366
 367         of_node_put(np);
 368
 369         /*
 370          * If no interrupt provided for virtual timer, we'll have to
 371          * stick to the physical timer. It'd better be accessible...
 372          */
 373         if (!arch_timer_ppi[VIRT_PPI]) {
 374                 arch_timer_use_virtual = false;
 375
 376                 if (!arch_timer_ppi[PHYS_SECURE_PPI] ||
 377                     !arch_timer_ppi[PHYS_NONSECURE_PPI]) {
 378                         pr_warn("arch_timer: No interrupt available, giving up\n");
 379                         return -EINVAL;
 380                 }
 381         }
 382
 383         if (arch_timer_use_virtual)
 384                 arch_timer_read_counter = arch_counter_get_cntvct;
 385         else
 386                 arch_timer_read_counter = arch_counter_get_cntpct;
 387
 388         return arch_timer_register();
 389 }
 390
 391 int __init arch_timer_sched_clock_init(void)
 392 {
 393         int err;
 394
 395         err = arch_timer_available();
 396         if (err)
 397                 return err;
 398
 399         setup_sched_clock(arch_timer_read_counter32,
 400                           32, arch_timer_rate);
 401         return 0;
 402 }