arch/arm/kernel/head-nommu.S

   1 /*
   2  *  linux/arch/arm/kernel/head-nommu.S
   3  *
   4  *  Copyright (C) 1994-2002 Russell King
   5  *  Copyright (C) 2003-2006 Hyok S. Choi
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  *  Common kernel startup code (non-paged MM)
  12  *
  13  */
  14 #include <linux/linkage.h>
  15 #include <linux/init.h>
  16
  17 #include <asm/assembler.h>
  18 #include <asm/ptrace.h>
  19 #include <asm/asm-offsets.h>
  20 #include <asm/cp15.h>
  21 #include <asm/thread_info.h>
  22 #include <asm/v7m.h>
  23
  24 /*
  25  * Kernel startup entry point.
  26  * ---------------------------
  27  *
  28  * This is normally called from the decompressor code.  The requirements
  29  * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
  30  * r1 = machine nr.
  31  *
  32  * See linux/arch/arm/tools/mach-types for the complete list of machine
  33  * numbers for r1.
  34  *
  35  */
  36
  37         __HEAD
  38
  39 #ifdef CONFIG_CPU_THUMBONLY
  40         .thumb
  41 ENTRY(stext)
  42 #else
  43         .arm
  44 ENTRY(stext)
  45
  46  THUMB( adr     r9, BSYM(1f)    )       @ Kernel is always entered in ARM.
  47  THUMB( bx      r9              )       @ If this is a Thumb-2 kernel,
  48  THUMB( .thumb                  )       @ switch to Thumb now.
  49  THUMB(1:                       )
  50 #endif
  51
  52         setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
  53                                                 @ and irqs disabled
  54 #if defined(CONFIG_CPU_CP15)
  55         mrc     p15, 0, r9, c0, c0              @ get processor id
  56 #elif defined(CONFIG_CPU_V7M)
  57         ldr     r9, =BASEADDR_V7M_SCB
  58         ldr     r9, [r9, V7M_SCB_CPUID]
  59 #else
  60         ldr     r9, =CONFIG_PROCESSOR_ID
  61 #endif
  62         bl      __lookup_processor_type         @ r5=procinfo r9=cpuid
  63         movs    r10, r5                         @ invalid processor (r5=0)?
  64         beq     __error_p                               @ yes, error 'p'
  65
  66         ldr     r13, =__mmap_switched           @ address to jump to after
  67                                                 @ initialising sctlr
  68         adr     lr, BSYM(1f)                    @ return (PIC) address
  69  ARM(   add     pc, r10, #PROCINFO_INITFUNC     )
  70  THUMB( add     r12, r10, #PROCINFO_INITFUNC    )
  71  THUMB( mov     pc, r12                         )
  72  1:     b       __after_proc_init
  73 ENDPROC(stext)
  74
  75 #ifdef CONFIG_SMP
  76         __CPUINIT
  77 ENTRY(secondary_startup)
  78         /*
  79          * Common entry point for secondary CPUs.
  80          *
  81          * Ensure that we're in SVC mode, and IRQs are disabled.  Lookup
  82          * the processor type - there is no need to check the machine type
  83          * as it has already been validated by the primary processor.
  84          */
  85         setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
  86 #ifndef CONFIG_CPU_CP15
  87         ldr     r9, =CONFIG_PROCESSOR_ID
  88 #else
  89         mrc     p15, 0, r9, c0, c0              @ get processor id
  90 #endif
  91         bl      __lookup_processor_type         @ r5=procinfo r9=cpuid
  92         movs    r10, r5                         @ invalid processor?
  93         beq     __error_p                       @ yes, error 'p'
  94
  95         adr     r4, __secondary_data
  96         ldmia   r4, {r7, r12}
  97         adr     lr, BSYM(__after_proc_init)     @ return address
  98         mov     r13, r12                        @ __secondary_switched address
  99  ARM(   add     pc, r10, #PROCINFO_INITFUNC     )
 100  THUMB( add     r12, r10, #PROCINFO_INITFUNC    )
 101  THUMB( mov     pc, r12                         )
 102 ENDPROC(secondary_startup)
 103
 104 ENTRY(__secondary_switched)
 105         ldr     sp, [r7, #8]                    @ set up the stack pointer
 106         mov     fp, #0
 107         b       secondary_start_kernel
 108 ENDPROC(__secondary_switched)
 109
 110         .type   __secondary_data, %object
 111 __secondary_data:
 112         .long   secondary_data
 113         .long   __secondary_switched
 114 #endif /* CONFIG_SMP */
 115
 116 /*
 117  * Set the Control Register and Read the process ID.
 118  */
 119 __after_proc_init:
 120 #ifdef CONFIG_CPU_CP15
 121         /*
 122          * CP15 system control register value returned in r0 from
 123          * the CPU init function.
 124          */
 125 #if defined(CONFIG_ALIGNMENT_TRAP) && __LINUX_ARM_ARCH__ < 6
 126         orr     r0, r0, #CR_A
 127 #else
 128         bic     r0, r0, #CR_A
 129 #endif
 130 #ifdef CONFIG_CPU_DCACHE_DISABLE
 131         bic     r0, r0, #CR_C
 132 #endif
 133 #ifdef CONFIG_CPU_BPREDICT_DISABLE
 134         bic     r0, r0, #CR_Z
 135 #endif
 136 #ifdef CONFIG_CPU_ICACHE_DISABLE
 137         bic     r0, r0, #CR_I
 138 #endif
 139 #ifdef CONFIG_CPU_HIGH_VECTOR
 140         orr     r0, r0, #CR_V
 141 #else
 142         bic     r0, r0, #CR_V
 143 #endif
 144         mcr     p15, 0, r0, c1, c0, 0           @ write control reg
 145 #endif /* CONFIG_CPU_CP15 */
 146         mov     pc, r13
 147 ENDPROC(__after_proc_init)
 148         .ltorg
 149
 150 #include "head-common.S"