arch/arm/kernel/perf_event_cpu.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License version 2 as
   4  * published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14  *
  15  * Copyright (C) 2012 ARM Limited
  16  *
  17  * Author: Will Deacon <will.deacon@arm.com>
  18  */
  19 #define pr_fmt(fmt) "CPU PMU: " fmt
  20
  21 #include <linux/bitmap.h>
  22 #include <linux/cpu_pm.h>
  23 #include <linux/export.h>
  24 #include <linux/kernel.h>
  25 #include <linux/of.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/slab.h>
  28 #include <linux/spinlock.h>
  29
  30 #include <asm/cputype.h>
  31 #include <asm/irq_regs.h>
  32 #include <asm/pmu.h>
  33
  34 /* Set at runtime when we know what CPU type we are. */
  35 static DEFINE_PER_CPU(struct arm_pmu *, cpu_pmu);
  36
  37 static DEFINE_PER_CPU(struct perf_event * [ARMPMU_MAX_HWEVENTS], hw_events);
  38 static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)], used_mask);
  39 static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
  40
  41 static DEFINE_PER_CPU(struct cpupmu_regs, cpu_pmu_regs);
  42
  43 /*
  44  * Despite the names, these two functions are CPU-specific and are used
  45  * by the OProfile/perf code.
  46  */
  47 const char *perf_pmu_name(void)
  48 {
  49         struct arm_pmu *pmu = per_cpu(cpu_pmu, 0);
  50         if (!pmu)
  51                 return NULL;
  52
  53         return pmu->name;
  54 }
  55 EXPORT_SYMBOL_GPL(perf_pmu_name);
  56
  57 int perf_num_counters(void)
  58 {
  59         struct arm_pmu *pmu = per_cpu(cpu_pmu, 0);
  60
  61         if (!pmu)
  62                 return 0;
  63
  64         return pmu->num_events;
  65 }
  66 EXPORT_SYMBOL_GPL(perf_num_counters);
  67
  68 /* Include the PMU-specific implementations. */
  69 #include "perf_event_xscale.c"
  70 #include "perf_event_v6.c"
  71 #include "perf_event_v7.c"
  72
  73 static struct pmu_hw_events *cpu_pmu_get_cpu_events(void)
  74 {
  75         return &__get_cpu_var(cpu_hw_events);
  76 }
  77
  78 static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
  79 {
  80         int i, irq, irqs;
  81         struct platform_device *pmu_device = cpu_pmu->plat_device;
  82         int cpu = -1;
  83
  84         irqs = min(pmu_device->num_resources, num_possible_cpus());
  85
  86         for (i = 0; i < irqs; ++i) {
  87                 cpu = cpumask_next(cpu, &cpu_pmu->valid_cpus);
  88                 if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
  89                         continue;
  90                 irq = platform_get_irq(pmu_device, i);
  91                 if (irq >= 0)
  92                         free_irq(irq, cpu_pmu);
  93         }
  94 }
  95
  96 static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
  97 {
  98         int i, err, irq, irqs;
  99         struct platform_device *pmu_device = cpu_pmu->plat_device;
 100         int cpu = -1;
 101
 102         if (!pmu_device)
 103                 return -ENODEV;
 104
 105         irqs = min(pmu_device->num_resources, num_possible_cpus());
 106         if (irqs < 1) {
 107                 pr_err("no irqs for PMUs defined\n");
 108                 return -ENODEV;
 109         }
 110
 111         for (i = 0; i < irqs; ++i) {
 112                 err = 0;
 113                 cpu = cpumask_next(cpu, &cpu_pmu->valid_cpus);
 114                 irq = platform_get_irq(pmu_device, i);
 115                 if (irq < 0)
 116                         continue;
 117
 118                 /*
 119                  * If we have a single PMU interrupt that we can't shift,
 120                  * assume that we're running on a uniprocessor machine and
 121                  * continue. Otherwise, continue without this interrupt.
 122                  */
 123                 if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
 124                         pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
 125                                     irq, i);
 126                         continue;
 127                 }
 128
 129                 err = request_irq(irq, handler, IRQF_NOBALANCING, "arm-pmu",
 130                                   cpu_pmu);
 131                 if (err) {
 132                         pr_err("unable to request IRQ%d for ARM PMU counters\n",
 133                                 irq);
 134                         return err;
 135                 }
 136
 137                 cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
 138         }
 139
 140         return 0;
 141 }
 142
 143 static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
 144 {
 145         int cpu;
 146         for_each_cpu_mask(cpu, cpu_pmu->valid_cpus) {
 147                 struct pmu_hw_events *events = &per_cpu(cpu_hw_events, cpu);
 148                 events->events = per_cpu(hw_events, cpu);
 149                 events->used_mask = per_cpu(used_mask, cpu);
 150                 raw_spin_lock_init(&events->pmu_lock);
 151         }
 152
 153         cpu_pmu->get_hw_events  = cpu_pmu_get_cpu_events;
 154         cpu_pmu->request_irq    = cpu_pmu_request_irq;
 155         cpu_pmu->free_irq       = cpu_pmu_free_irq;
 156
 157         /* Ensure the PMU has sane values out of reset. */
 158         if (cpu_pmu->reset)
 159                 on_each_cpu_mask(&cpu_pmu->valid_cpus, cpu_pmu->reset, cpu_pmu, 1);
 160 }
 161
 162 /*
 163  * PMU hardware loses all context when a CPU goes offline.
 164  * When a CPU is hotplugged back in, since some hardware registers are
 165  * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
 166  * junk values out of them.
 167  */
 168 static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
 169                                     unsigned long action, void *hcpu)
 170 {
 171         struct arm_pmu *pmu = per_cpu(cpu_pmu, (long)hcpu);
 172
 173         if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
 174                 return NOTIFY_DONE;
 175
 176         if (pmu && pmu->reset)
 177                 pmu->reset(pmu);
 178         else
 179                 return NOTIFY_DONE;
 180
 181         return NOTIFY_OK;
 182 }
 183
 184 static int cpu_pmu_pm_notify(struct notifier_block *b,
 185                                     unsigned long action, void *hcpu)
 186 {
 187         int cpu = smp_processor_id();
 188         struct arm_pmu *pmu = per_cpu(cpu_pmu, cpu);
 189         struct cpupmu_regs *pmuregs = &per_cpu(cpu_pmu_regs, cpu);
 190
 191         if (!pmu)
 192                 return NOTIFY_DONE;
 193
 194         if (action == CPU_PM_ENTER && pmu->save_regs) {
 195                 pmu->save_regs(pmu, pmuregs);
 196         } else if (action == CPU_PM_EXIT && pmu->restore_regs) {
 197                 pmu->restore_regs(pmu, pmuregs);
 198         }
 199
 200         return NOTIFY_OK;
 201 }
 202
 203 static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
 204         .notifier_call = cpu_pmu_notify,
 205 };
 206
 207 static struct notifier_block __cpuinitdata cpu_pmu_pm_notifier = {
 208         .notifier_call = cpu_pmu_pm_notify,
 209 };
 210
 211 /*
 212  * PMU platform driver and devicetree bindings.
 213  */
 214 static struct of_device_id cpu_pmu_of_device_ids[] = {
 215         {.compatible = "arm,cortex-a15-pmu",    .data = armv7_a15_pmu_init},
 216         {.compatible = "arm,cortex-a9-pmu",     .data = armv7_a9_pmu_init},
 217         {.compatible = "arm,cortex-a8-pmu",     .data = armv7_a8_pmu_init},
 218         {.compatible = "arm,cortex-a7-pmu",     .data = armv7_a7_pmu_init},
 219         {.compatible = "arm,cortex-a5-pmu",     .data = armv7_a5_pmu_init},
 220         {.compatible = "arm,arm11mpcore-pmu",   .data = armv6mpcore_pmu_init},
 221         {.compatible = "arm,arm1176-pmu",       .data = armv6pmu_init},
 222         {.compatible = "arm,arm1136-pmu",       .data = armv6pmu_init},
 223         {},
 224 };
 225
 226 static struct platform_device_id cpu_pmu_plat_device_ids[] = {
 227         {.name = "arm-pmu"},
 228         {},
 229 };
 230
 231 /*
 232  * CPU PMU identification and probing.
 233  */
 234 static int probe_current_pmu(struct arm_pmu *pmu)
 235 {
 236         int cpu = get_cpu();
 237         int ret = -ENODEV;
 238
 239         pr_info("probing PMU on CPU %d\n", cpu);
 240
 241         switch (read_cpuid_part()) {
 242         /* ARM Ltd CPUs. */
 243         case ARM_CPU_PART_ARM1136:
 244         case ARM_CPU_PART_ARM1156:
 245         case ARM_CPU_PART_ARM1176:
 246                 ret = armv6pmu_init(pmu);
 247                 break;
 248         case ARM_CPU_PART_ARM11MPCORE:
 249                 ret = armv6mpcore_pmu_init(pmu);
 250                 break;
 251         case ARM_CPU_PART_CORTEX_A8:
 252                 ret = armv7_a8_pmu_init(pmu);
 253                 break;
 254         case ARM_CPU_PART_CORTEX_A9:
 255                 ret = armv7_a9_pmu_init(pmu);
 256                 break;
 257
 258         default:
 259                 if (read_cpuid_implementor() == ARM_CPU_IMP_INTEL) {
 260                         switch (xscale_cpu_arch_version()) {
 261                         case ARM_CPU_XSCALE_ARCH_V1:
 262                                 ret = xscale1pmu_init(pmu);
 263                                 break;
 264                         case ARM_CPU_XSCALE_ARCH_V2:
 265                                 ret = xscale2pmu_init(pmu);
 266                                 break;
 267                         }
 268                 }
 269                 break;
 270         }
 271
 272         /* assume PMU support all the CPUs in this case */
 273         cpumask_setall(&pmu->valid_cpus);
 274
 275         put_cpu();
 276         return ret;
 277 }
 278
 279 static int cpu_pmu_device_probe(struct platform_device *pdev)
 280 {
 281         const struct of_device_id *of_id;
 282         struct device_node *node = pdev->dev.of_node;
 283         struct arm_pmu *pmu;
 284         int ret = 0;
 285         int cpu;
 286
 287         pmu = kzalloc(sizeof(struct arm_pmu), GFP_KERNEL);
 288         if (!pmu) {
 289                 pr_info("failed to allocate PMU device!");
 290                 return -ENOMEM;
 291         }
 292
 293         if (node && (of_id = of_match_node(cpu_pmu_of_device_ids, pdev->dev.of_node))) {
 294                 smp_call_func_t init_fn = (smp_call_func_t)of_id->data;
 295                 struct device_node *ncluster;
 296                 int cluster = -1;
 297                 cpumask_t sibling_mask;
 298
 299                 ncluster = of_parse_phandle(node, "cluster", 0);
 300                 if (ncluster) {
 301                         int len;
 302                         const u32 *hwid;
 303                         hwid = of_get_property(ncluster, "reg", &len);
 304                         if (hwid && len == 4)
 305                                 cluster = be32_to_cpup(hwid);
 306                 }
 307                 /* set sibling mask to all cpu mask if socket is not specified */
 308                 if (cluster == -1 ||
 309                         cluster_to_logical_mask(cluster, &sibling_mask))
 310                         cpumask_setall(&sibling_mask);
 311
 312                 smp_call_function_any(&sibling_mask, init_fn, pmu, 1);
 313
 314                 /* now set the valid_cpus after init */
 315                 cpumask_copy(&pmu->valid_cpus, &sibling_mask);
 316         } else {
 317                 ret = probe_current_pmu(pmu);
 318         }
 319
 320         if (ret) {
 321                 pr_info("failed to probe PMU!");
 322                 goto out_free;
 323         }
 324
 325         for_each_cpu_mask(cpu, pmu->valid_cpus)
 326                 per_cpu(cpu_pmu, cpu) = pmu;
 327
 328         pmu->plat_device = pdev;
 329         cpu_pmu_init(pmu);
 330         ret = armpmu_register(pmu, -1);
 331
 332         if (!ret)
 333                 return 0;
 334
 335 out_free:
 336         pr_info("failed to register PMU devices!");
 337         kfree(pmu);
 338         return ret;
 339 }
 340
 341 static struct platform_driver cpu_pmu_driver = {
 342         .driver         = {
 343                 .name   = "arm-pmu",
 344                 .pm     = &armpmu_dev_pm_ops,
 345                 .of_match_table = cpu_pmu_of_device_ids,
 346         },
 347         .probe          = cpu_pmu_device_probe,
 348         .id_table       = cpu_pmu_plat_device_ids,
 349 };
 350
 351 static int __init register_pmu_driver(void)
 352 {
 353         int err;
 354
 355         err = register_cpu_notifier(&cpu_pmu_hotplug_notifier);
 356         if (err)
 357                 return err;
 358
 359         err = cpu_pm_register_notifier(&cpu_pmu_pm_notifier);
 360         if (err) {
 361                 unregister_cpu_notifier(&cpu_pmu_hotplug_notifier);
 362                 return err;
 363         }
 364
 365         err = platform_driver_register(&cpu_pmu_driver);
 366         if (err) {
 367                 cpu_pm_unregister_notifier(&cpu_pmu_pm_notifier);
 368                 unregister_cpu_notifier(&cpu_pmu_hotplug_notifier);
 369         }
 370
 371         return err;
 372 }
 373 device_initcall(register_pmu_driver);