2 * linux/arch/arm/kernel/setup.c
4 * Copyright (C) 1995-2001 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/export.h>
11 #include <linux/kernel.h>
12 #include <linux/stddef.h>
13 #include <linux/ioport.h>
14 #include <linux/delay.h>
15 #include <linux/utsname.h>
16 #include <linux/initrd.h>
17 #include <linux/console.h>
18 #include <linux/bootmem.h>
19 #include <linux/seq_file.h>
20 #include <linux/screen_info.h>
21 #include <linux/init.h>
22 #include <linux/kexec.h>
23 #include <linux/of_fdt.h>
24 #include <linux/cpu.h>
25 #include <linux/interrupt.h>
26 #include <linux/smp.h>
27 #include <linux/proc_fs.h>
28 #include <linux/memblock.h>
29 #include <linux/bug.h>
30 #include <linux/compiler.h>
31 #include <linux/sort.h>
33 #include <asm/unified.h>
36 #include <asm/cputype.h>
38 #include <asm/procinfo.h>
39 #include <asm/sections.h>
40 #include <asm/setup.h>
41 #include <asm/smp_plat.h>
42 #include <asm/mach-types.h>
43 #include <asm/cacheflush.h>
44 #include <asm/cachetype.h>
45 #include <asm/tlbflush.h>
48 #include <asm/mach/arch.h>
49 #include <asm/mach/irq.h>
50 #include <asm/mach/time.h>
51 #include <asm/system_info.h>
52 #include <asm/system_misc.h>
53 #include <asm/traps.h>
54 #include <asm/unwind.h>
55 #include <asm/memblock.h>
62 #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
65 static int __init fpe_setup(char *line)
67 memcpy(fpe_type, line, 8);
71 __setup("fpe=", fpe_setup);
74 extern void paging_init(struct machine_desc *desc);
75 extern void sanity_check_meminfo(void);
76 extern void reboot_setup(char *str);
77 extern void setup_dma_zone(struct machine_desc *desc);
79 unsigned int processor_id;
80 EXPORT_SYMBOL(processor_id);
81 unsigned int __machine_arch_type __read_mostly;
82 EXPORT_SYMBOL(__machine_arch_type);
83 unsigned int cacheid __read_mostly;
84 EXPORT_SYMBOL(cacheid);
86 unsigned int __atags_pointer __initdata;
88 unsigned int system_rev;
89 EXPORT_SYMBOL(system_rev);
91 unsigned int system_serial_low;
92 EXPORT_SYMBOL(system_serial_low);
94 unsigned int system_serial_high;
95 EXPORT_SYMBOL(system_serial_high);
97 unsigned int elf_hwcap __read_mostly;
98 EXPORT_SYMBOL(elf_hwcap);
102 struct processor processor __read_mostly;
105 struct cpu_tlb_fns cpu_tlb __read_mostly;
108 struct cpu_user_fns cpu_user __read_mostly;
111 struct cpu_cache_fns cpu_cache __read_mostly;
113 #ifdef CONFIG_OUTER_CACHE
114 struct outer_cache_fns outer_cache __read_mostly;
115 EXPORT_SYMBOL(outer_cache);
119 * Cached cpu_architecture() result for use by assembler code.
120 * C code should use the cpu_architecture() function instead of accessing this
123 int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
129 } ____cacheline_aligned;
131 static struct stack stacks[NR_CPUS];
133 char elf_platform[ELF_PLATFORM_SIZE];
134 EXPORT_SYMBOL(elf_platform);
136 static const char *cpu_name;
137 static const char *machine_name;
138 static char __initdata cmd_line[COMMAND_LINE_SIZE];
139 struct machine_desc *machine_desc __initdata;
141 static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
142 #define ENDIANNESS ((char)endian_test.l)
144 DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
147 * Standard memory resources
149 static struct resource mem_res[] = {
154 .flags = IORESOURCE_MEM
157 .name = "Kernel code",
160 .flags = IORESOURCE_MEM
163 .name = "Kernel data",
166 .flags = IORESOURCE_MEM
170 #define video_ram mem_res[0]
171 #define kernel_code mem_res[1]
172 #define kernel_data mem_res[2]
174 static struct resource io_res[] = {
179 .flags = IORESOURCE_IO | IORESOURCE_BUSY
185 .flags = IORESOURCE_IO | IORESOURCE_BUSY
191 .flags = IORESOURCE_IO | IORESOURCE_BUSY
195 #define lp0 io_res[0]
196 #define lp1 io_res[1]
197 #define lp2 io_res[2]
199 static const char *proc_arch[] = {
219 static int __get_cpu_architecture(void)
223 if ((read_cpuid_id() & 0x0008f000) == 0) {
224 cpu_arch = CPU_ARCH_UNKNOWN;
225 } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
226 cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
227 } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
228 cpu_arch = (read_cpuid_id() >> 16) & 7;
230 cpu_arch += CPU_ARCH_ARMv3;
231 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
234 /* Revised CPUID format. Read the Memory Model Feature
235 * Register 0 and check for VMSAv7 or PMSAv7 */
236 asm("mrc p15, 0, %0, c0, c1, 4"
238 if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
239 (mmfr0 & 0x000000f0) >= 0x00000030)
240 cpu_arch = CPU_ARCH_ARMv7;
241 else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
242 (mmfr0 & 0x000000f0) == 0x00000020)
243 cpu_arch = CPU_ARCH_ARMv6;
245 cpu_arch = CPU_ARCH_UNKNOWN;
247 cpu_arch = CPU_ARCH_UNKNOWN;
252 int __pure cpu_architecture(void)
254 BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
256 return __cpu_architecture;
259 static int cpu_has_aliasing_icache(unsigned int arch)
262 unsigned int id_reg, num_sets, line_size;
264 /* PIPT caches never alias. */
265 if (icache_is_pipt())
268 /* arch specifies the register format */
271 asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
272 : /* No output operands */
275 asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
277 line_size = 4 << ((id_reg & 0x7) + 2);
278 num_sets = ((id_reg >> 13) & 0x7fff) + 1;
279 aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
282 aliasing_icache = read_cpuid_cachetype() & (1 << 11);
285 /* I-cache aliases will be handled by D-cache aliasing code */
289 return aliasing_icache;
292 static void __init cacheid_init(void)
294 unsigned int cachetype = read_cpuid_cachetype();
295 unsigned int arch = cpu_architecture();
297 if (arch >= CPU_ARCH_ARMv6) {
298 if ((cachetype & (7 << 29)) == 4 << 29) {
299 /* ARMv7 register format */
300 arch = CPU_ARCH_ARMv7;
301 cacheid = CACHEID_VIPT_NONALIASING;
302 switch (cachetype & (3 << 14)) {
304 cacheid |= CACHEID_ASID_TAGGED;
307 cacheid |= CACHEID_PIPT;
311 arch = CPU_ARCH_ARMv6;
312 if (cachetype & (1 << 23))
313 cacheid = CACHEID_VIPT_ALIASING;
315 cacheid = CACHEID_VIPT_NONALIASING;
317 if (cpu_has_aliasing_icache(arch))
318 cacheid |= CACHEID_VIPT_I_ALIASING;
320 cacheid = CACHEID_VIVT;
323 printk("CPU: %s data cache, %s instruction cache\n",
324 cache_is_vivt() ? "VIVT" :
325 cache_is_vipt_aliasing() ? "VIPT aliasing" :
326 cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
327 cache_is_vivt() ? "VIVT" :
328 icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
329 icache_is_vipt_aliasing() ? "VIPT aliasing" :
330 icache_is_pipt() ? "PIPT" :
331 cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
335 * These functions re-use the assembly code in head.S, which
336 * already provide the required functionality.
338 extern struct proc_info_list *lookup_processor_type(unsigned int);
340 void __init early_print(const char *str, ...)
342 extern void printascii(const char *);
347 vsnprintf(buf, sizeof(buf), str, ap);
350 #ifdef CONFIG_DEBUG_LL
356 static void __init feat_v6_fixup(void)
358 int id = read_cpuid_id();
360 if ((id & 0xff0f0000) != 0x41070000)
364 * HWCAP_TLS is available only on 1136 r1p0 and later,
365 * see also kuser_get_tls_init.
367 if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
368 elf_hwcap &= ~HWCAP_TLS;
372 * cpu_init - initialise one CPU.
374 * cpu_init sets up the per-CPU stacks.
378 unsigned int cpu = smp_processor_id();
379 struct stack *stk = &stacks[cpu];
381 if (cpu >= NR_CPUS) {
382 printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
387 * This only works on resume and secondary cores. For booting on the
388 * boot cpu, smp_prepare_boot_cpu is called after percpu area setup.
390 set_my_cpu_offset(per_cpu_offset(cpu));
395 * Define the placement constraint for the inline asm directive below.
396 * In Thumb-2, msr with an immediate value is not allowed.
398 #ifdef CONFIG_THUMB2_KERNEL
405 * setup stacks for re-entrant exception handlers
409 "add r14, %0, %2\n\t"
412 "add r14, %0, %4\n\t"
415 "add r14, %0, %6\n\t"
420 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
421 "I" (offsetof(struct stack, irq[0])),
422 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
423 "I" (offsetof(struct stack, abt[0])),
424 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
425 "I" (offsetof(struct stack, und[0])),
426 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
430 int __cpu_logical_map[NR_CPUS];
432 void __init smp_setup_processor_id(void)
435 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0;
436 u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
438 cpu_logical_map(0) = cpu;
439 for (i = 1; i < nr_cpu_ids; ++i)
440 cpu_logical_map(i) = i == cpu ? 0 : i;
442 printk(KERN_INFO "Booting Linux on physical CPU 0x%x\n", mpidr);
445 static void __init setup_processor(void)
447 struct proc_info_list *list;
450 * locate processor in the list of supported processor
451 * types. The linker builds this table for us from the
452 * entries in arch/arm/mm/proc-*.S
454 list = lookup_processor_type(read_cpuid_id());
456 printk("CPU configuration botched (ID %08x), unable "
457 "to continue.\n", read_cpuid_id());
461 cpu_name = list->cpu_name;
462 __cpu_architecture = __get_cpu_architecture();
465 processor = *list->proc;
468 cpu_tlb = *list->tlb;
471 cpu_user = *list->user;
474 cpu_cache = *list->cache;
477 printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
478 cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
479 proc_arch[cpu_architecture()], cr_alignment);
481 snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
482 list->arch_name, ENDIANNESS);
483 snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
484 list->elf_name, ENDIANNESS);
485 elf_hwcap = list->elf_hwcap;
486 #ifndef CONFIG_ARM_THUMB
487 elf_hwcap &= ~HWCAP_THUMB;
496 void __init dump_machine_table(void)
498 struct machine_desc *p;
500 early_print("Available machine support:\n\nID (hex)\tNAME\n");
501 for_each_machine_desc(p)
502 early_print("%08x\t%s\n", p->nr, p->name);
504 early_print("\nPlease check your kernel config and/or bootloader.\n");
507 /* can't use cpu_relax() here as it may require MMU setup */;
510 int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
512 struct membank *bank = &meminfo.bank[meminfo.nr_banks];
514 if (meminfo.nr_banks >= NR_BANKS) {
515 printk(KERN_CRIT "NR_BANKS too low, "
516 "ignoring memory at 0x%08llx\n", (long long)start);
521 * Ensure that start/size are aligned to a page boundary.
522 * Size is appropriately rounded down, start is rounded up.
524 size -= start & ~PAGE_MASK;
525 bank->start = PAGE_ALIGN(start);
528 if (bank->start + size < bank->start) {
529 printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
530 "32-bit physical address space\n", (long long)start);
532 * To ensure bank->start + bank->size is representable in
533 * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
534 * This means we lose a page after masking.
536 size = ULONG_MAX - bank->start;
540 bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
543 * Check whether this memory region has non-zero size or
544 * invalid node number.
554 * Pick out the memory size. We look for mem=size@start,
555 * where start and size are "size[KkMm]"
557 static int __init early_mem(char *p)
559 static int usermem __initdata = 0;
565 * If the user specifies memory size, we
566 * blow away any automatically generated
571 meminfo.nr_banks = 0;
575 size = memparse(p, &endp);
577 start = memparse(endp + 1, NULL);
579 arm_add_memory(start, size);
583 early_param("mem", early_mem);
585 static void __init request_standard_resources(struct machine_desc *mdesc)
587 struct memblock_region *region;
588 struct resource *res;
590 kernel_code.start = virt_to_phys(_text);
591 kernel_code.end = virt_to_phys(_etext - 1);
592 kernel_data.start = virt_to_phys(_sdata);
593 kernel_data.end = virt_to_phys(_end - 1);
595 for_each_memblock(memory, region) {
596 res = alloc_bootmem_low(sizeof(*res));
597 res->name = "System RAM";
598 res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
599 res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
600 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
602 request_resource(&iomem_resource, res);
604 if (kernel_code.start >= res->start &&
605 kernel_code.end <= res->end)
606 request_resource(res, &kernel_code);
607 if (kernel_data.start >= res->start &&
608 kernel_data.end <= res->end)
609 request_resource(res, &kernel_data);
612 if (mdesc->video_start) {
613 video_ram.start = mdesc->video_start;
614 video_ram.end = mdesc->video_end;
615 request_resource(&iomem_resource, &video_ram);
619 * Some machines don't have the possibility of ever
620 * possessing lp0, lp1 or lp2
622 if (mdesc->reserve_lp0)
623 request_resource(&ioport_resource, &lp0);
624 if (mdesc->reserve_lp1)
625 request_resource(&ioport_resource, &lp1);
626 if (mdesc->reserve_lp2)
627 request_resource(&ioport_resource, &lp2);
630 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
631 struct screen_info screen_info = {
632 .orig_video_lines = 30,
633 .orig_video_cols = 80,
634 .orig_video_mode = 0,
635 .orig_video_ega_bx = 0,
636 .orig_video_isVGA = 1,
637 .orig_video_points = 8
641 static int __init customize_machine(void)
643 /* customizes platform devices, or adds new ones */
644 if (machine_desc->init_machine)
645 machine_desc->init_machine();
648 arch_initcall(customize_machine);
650 static int __init init_machine_late(void)
652 if (machine_desc->init_late)
653 machine_desc->init_late();
656 late_initcall(init_machine_late);
659 static inline unsigned long long get_total_mem(void)
663 total = max_low_pfn - min_low_pfn;
664 return total << PAGE_SHIFT;
668 * reserve_crashkernel() - reserves memory are for crash kernel
670 * This function reserves memory area given in "crashkernel=" kernel command
671 * line parameter. The memory reserved is used by a dump capture kernel when
672 * primary kernel is crashing.
674 static void __init reserve_crashkernel(void)
676 unsigned long long crash_size, crash_base;
677 unsigned long long total_mem;
680 total_mem = get_total_mem();
681 ret = parse_crashkernel(boot_command_line, total_mem,
682 &crash_size, &crash_base);
686 ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
688 printk(KERN_WARNING "crashkernel reservation failed - "
689 "memory is in use (0x%lx)\n", (unsigned long)crash_base);
693 printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
694 "for crashkernel (System RAM: %ldMB)\n",
695 (unsigned long)(crash_size >> 20),
696 (unsigned long)(crash_base >> 20),
697 (unsigned long)(total_mem >> 20));
699 crashk_res.start = crash_base;
700 crashk_res.end = crash_base + crash_size - 1;
701 insert_resource(&iomem_resource, &crashk_res);
704 static inline void reserve_crashkernel(void) {}
705 #endif /* CONFIG_KEXEC */
707 static int __init meminfo_cmp(const void *_a, const void *_b)
709 const struct membank *a = _a, *b = _b;
710 long cmp = bank_pfn_start(a) - bank_pfn_start(b);
711 return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
714 void __init hyp_mode_check(void)
716 #ifdef CONFIG_ARM_VIRT_EXT
717 if (is_hyp_mode_available()) {
718 pr_info("CPU: All CPU(s) started in HYP mode.\n");
719 pr_info("CPU: Virtualization extensions available.\n");
720 } else if (is_hyp_mode_mismatched()) {
721 pr_warn("CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x%x)\n",
722 __boot_cpu_mode & MODE_MASK);
723 pr_warn("CPU: This may indicate a broken bootloader or firmware.\n");
725 pr_info("CPU: All CPU(s) started in SVC mode.\n");
729 void __init setup_arch(char **cmdline_p)
731 struct machine_desc *mdesc;
734 mdesc = setup_machine_fdt(__atags_pointer);
736 mdesc = setup_machine_tags(__atags_pointer, __machine_arch_type);
737 machine_desc = mdesc;
738 machine_name = mdesc->name;
740 setup_dma_zone(mdesc);
742 if (mdesc->restart_mode)
743 reboot_setup(&mdesc->restart_mode);
745 init_mm.start_code = (unsigned long) _text;
746 init_mm.end_code = (unsigned long) _etext;
747 init_mm.end_data = (unsigned long) _edata;
748 init_mm.brk = (unsigned long) _end;
750 /* populate cmd_line too for later use, preserving boot_command_line */
751 strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
752 *cmdline_p = cmd_line;
756 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
757 sanity_check_meminfo();
758 arm_memblock_init(&meminfo, mdesc);
761 request_standard_resources(mdesc);
764 arm_pm_restart = mdesc->restart;
766 unflatten_device_tree();
768 arm_dt_init_cpu_maps();
771 smp_set_ops(mdesc->smp);
779 reserve_crashkernel();
783 #ifdef CONFIG_MULTI_IRQ_HANDLER
784 handle_arch_irq = mdesc->handle_irq;
788 #if defined(CONFIG_VGA_CONSOLE)
789 conswitchp = &vga_con;
790 #elif defined(CONFIG_DUMMY_CONSOLE)
791 conswitchp = &dummy_con;
795 if (mdesc->init_early)
800 static int __init topology_init(void)
804 for_each_possible_cpu(cpu) {
805 struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
806 cpuinfo->cpu.hotpluggable = 1;
807 register_cpu(&cpuinfo->cpu, cpu);
812 subsys_initcall(topology_init);
814 #ifdef CONFIG_HAVE_PROC_CPU
815 static int __init proc_cpu_init(void)
817 struct proc_dir_entry *res;
819 res = proc_mkdir("cpu", NULL);
824 fs_initcall(proc_cpu_init);
827 static const char *hwcap_str[] = {
850 static int c_show(struct seq_file *m, void *v)
855 for_each_online_cpu(i) {
857 * glibc reads /proc/cpuinfo to determine the number of
858 * online processors, looking for lines beginning with
859 * "processor". Give glibc what it expects.
861 seq_printf(m, "processor\t: %d\n", i);
862 cpuid = is_smp() ? per_cpu(cpu_data, i).cpuid : read_cpuid_id();
863 seq_printf(m, "model name\t: %s rev %d (%s)\n",
864 cpu_name, cpuid & 15, elf_platform);
866 #if defined(CONFIG_SMP)
867 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
868 per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
869 (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
871 seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
872 loops_per_jiffy / (500000/HZ),
873 (loops_per_jiffy / (5000/HZ)) % 100);
875 /* dump out the processor features */
876 seq_puts(m, "Features\t: ");
878 for (j = 0; hwcap_str[j]; j++)
879 if (elf_hwcap & (1 << j))
880 seq_printf(m, "%s ", hwcap_str[j]);
882 seq_printf(m, "\nCPU implementer\t: 0x%02x\n", cpuid >> 24);
883 seq_printf(m, "CPU architecture: %s\n",
884 proc_arch[cpu_architecture()]);
886 if ((cpuid & 0x0008f000) == 0x00000000) {
888 seq_printf(m, "CPU part\t: %07x\n", cpuid >> 4);
890 if ((cpuid & 0x0008f000) == 0x00007000) {
892 seq_printf(m, "CPU variant\t: 0x%02x\n",
893 (cpuid >> 16) & 127);
896 seq_printf(m, "CPU variant\t: 0x%x\n",
899 seq_printf(m, "CPU part\t: 0x%03x\n",
900 (cpuid >> 4) & 0xfff);
902 seq_printf(m, "CPU revision\t: %d\n\n", cpuid & 15);
905 seq_printf(m, "Hardware\t: %s\n", machine_name);
906 seq_printf(m, "Revision\t: %04x\n", system_rev);
907 seq_printf(m, "Serial\t\t: %08x%08x\n",
908 system_serial_high, system_serial_low);
913 static void *c_start(struct seq_file *m, loff_t *pos)
915 return *pos < 1 ? (void *)1 : NULL;
918 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
924 static void c_stop(struct seq_file *m, void *v)
928 const struct seq_operations cpuinfo_op = {