1 #include <linux/linkage.h>
2 #include <linux/threads.h>
3 #include <asm/asm-offsets.h>
4 #include <asm/assembler.h>
5 #include <asm/glue-cache.h>
6 #include <asm/glue-proc.h>
7 #include "entry-header.S"
11 * Save CPU state for a suspend. This saves the CPU general purpose
12 * registers, and allocates space on the kernel stack to save the CPU
13 * specific registers and some other data for resume.
14 * r0 = suspend function arg0
15 * r1 = suspend function
18 stmfd sp!, {r4 - r11, lr}
21 ldr r4, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
23 ldr r4, =cpu_suspend_size
25 mov r5, sp @ current virtual SP
26 add r4, r4, #12 @ Space for pgd, virt sp, phys resume fn
27 sub sp, sp, r4 @ allocate CPU state on stack
28 stmfd sp!, {r0, r1} @ save suspend func arg and pointer
29 add r0, sp, #8 @ save pointer to save block
30 mov r1, r4 @ size of save block
31 mov r2, r5 @ virtual SP
32 ldr r3, =sleep_save_sp
35 ldr lr, [r5, #TI_CPU] @ cpu logical index
36 add r3, r3, lr, lsl #2
39 adr lr, BSYM(cpu_suspend_abort)
40 ldmfd sp!, {r0, pc} @ call suspend fn
41 ENDPROC(__cpu_suspend)
45 ldmia sp!, {r1 - r3} @ pop phys pgd, virt SP, phys resume fn
47 moveq r0, #1 @ force non-zero value
49 ldmfd sp!, {r4 - r11, pc}
50 ENDPROC(cpu_suspend_abort)
53 * r0 = control register value
56 .pushsection .idmap.text,"ax"
58 ldr r3, =cpu_resume_after_mmu
60 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc
61 mrc p15, 0, r0, c0, c0, 0 @ read id reg
65 mov pc, r3 @ jump to virtual address
66 ENDPROC(cpu_resume_mmu)
69 bl cpu_init @ restore the und/abt/irq banked regs
70 mov r0, #0 @ return zero on success
71 ldmfd sp!, {r4 - r11, pc}
72 ENDPROC(cpu_resume_after_mmu)
75 * Note: Yes, part of the following code is located into the .data section.
76 * This is to allow sleep_save_sp to be accessed with a relative load
77 * while we can't rely on any MMU translation. We could have put
78 * sleep_save_sp in the .text section as well, but some setups might
79 * insist on it to be truly read-only.
85 mov r1, #0 @ fall-back logical index for UP
86 ALT_SMP(mrc p15, 0, r0, c0, c0, 5)
89 bl cpu_logical_index @ return logical index in r1
92 ldr r0, [r0, r1, lsl #2] @ stack phys addr
94 ldr r0, sleep_save_sp @ stack phys addr
96 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
97 @ load phys pgd, stack, resume fn
98 ARM( ldmia r0!, {r1, sp, pc} )
99 THUMB( ldmia r0!, {r1, r2, r3} )
106 .long 0 @ preserve stack phys ptr here
113 add r3, r3, r2 @ virt_to_phys(__cpu_logical_map)
116 ldr r2, [r3, r1, lsl #2]
123 .long __cpu_logical_map - .