Merge branch 'soc-core' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renes...
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2  * arch/arm/mach-at91/at91sam9260_devices.c
3  *
4  *  Copyright (C) 2006 Atmel
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <mach/board.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
26
27 #include "generic.h"
28
29
30 /* --------------------------------------------------------------------
31  *  USB Host
32  * -------------------------------------------------------------------- */
33
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
37
38 static struct resource usbh_resources[] = {
39         [0] = {
40                 .start  = AT91SAM9260_UHP_BASE,
41                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42                 .flags  = IORESOURCE_MEM,
43         },
44         [1] = {
45                 .start  = AT91SAM9260_ID_UHP,
46                 .end    = AT91SAM9260_ID_UHP,
47                 .flags  = IORESOURCE_IRQ,
48         },
49 };
50
51 static struct platform_device at91_usbh_device = {
52         .name           = "at91_ohci",
53         .id             = -1,
54         .dev            = {
55                                 .dma_mask               = &ohci_dmamask,
56                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
57                                 .platform_data          = &usbh_data,
58         },
59         .resource       = usbh_resources,
60         .num_resources  = ARRAY_SIZE(usbh_resources),
61 };
62
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
64 {
65         int i;
66
67         if (!data)
68                 return;
69
70         /* Enable overcurrent notification */
71         for (i = 0; i < data->ports; i++) {
72                 if (data->overcurrent_pin[i])
73                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
74         }
75
76         usbh_data = *data;
77         platform_device_register(&at91_usbh_device);
78 }
79 #else
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
81 #endif
82
83
84 /* --------------------------------------------------------------------
85  *  USB Device (Gadget)
86  * -------------------------------------------------------------------- */
87
88 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
89 static struct at91_udc_data udc_data;
90
91 static struct resource udc_resources[] = {
92         [0] = {
93                 .start  = AT91SAM9260_BASE_UDP,
94                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95                 .flags  = IORESOURCE_MEM,
96         },
97         [1] = {
98                 .start  = AT91SAM9260_ID_UDP,
99                 .end    = AT91SAM9260_ID_UDP,
100                 .flags  = IORESOURCE_IRQ,
101         },
102 };
103
104 static struct platform_device at91_udc_device = {
105         .name           = "at91_udc",
106         .id             = -1,
107         .dev            = {
108                                 .platform_data          = &udc_data,
109         },
110         .resource       = udc_resources,
111         .num_resources  = ARRAY_SIZE(udc_resources),
112 };
113
114 void __init at91_add_device_udc(struct at91_udc_data *data)
115 {
116         if (!data)
117                 return;
118
119         if (gpio_is_valid(data->vbus_pin)) {
120                 at91_set_gpio_input(data->vbus_pin, 0);
121                 at91_set_deglitch(data->vbus_pin, 1);
122         }
123
124         /* Pullup pin is handled internally by USB device peripheral */
125
126         udc_data = *data;
127         platform_device_register(&at91_udc_device);
128 }
129 #else
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
131 #endif
132
133
134 /* --------------------------------------------------------------------
135  *  Ethernet
136  * -------------------------------------------------------------------- */
137
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
141
142 static struct resource eth_resources[] = {
143         [0] = {
144                 .start  = AT91SAM9260_BASE_EMAC,
145                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146                 .flags  = IORESOURCE_MEM,
147         },
148         [1] = {
149                 .start  = AT91SAM9260_ID_EMAC,
150                 .end    = AT91SAM9260_ID_EMAC,
151                 .flags  = IORESOURCE_IRQ,
152         },
153 };
154
155 static struct platform_device at91sam9260_eth_device = {
156         .name           = "macb",
157         .id             = -1,
158         .dev            = {
159                                 .dma_mask               = &eth_dmamask,
160                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
161                                 .platform_data          = &eth_data,
162         },
163         .resource       = eth_resources,
164         .num_resources  = ARRAY_SIZE(eth_resources),
165 };
166
167 void __init at91_add_device_eth(struct macb_platform_data *data)
168 {
169         if (!data)
170                 return;
171
172         if (gpio_is_valid(data->phy_irq_pin)) {
173                 at91_set_gpio_input(data->phy_irq_pin, 0);
174                 at91_set_deglitch(data->phy_irq_pin, 1);
175         }
176
177         /* Pins used for MII and RMII */
178         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
179         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
180         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
181         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
182         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
183         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
184         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
185         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
186         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
187         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
188
189         if (!data->is_rmii) {
190                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
191                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
192                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
193                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
194                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
195                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
196                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
197                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
198         }
199
200         eth_data = *data;
201         platform_device_register(&at91sam9260_eth_device);
202 }
203 #else
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
205 #endif
206
207
208 /* --------------------------------------------------------------------
209  *  MMC / SD
210  * -------------------------------------------------------------------- */
211
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
215
216 static struct resource mmc_resources[] = {
217         [0] = {
218                 .start  = AT91SAM9260_BASE_MCI,
219                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220                 .flags  = IORESOURCE_MEM,
221         },
222         [1] = {
223                 .start  = AT91SAM9260_ID_MCI,
224                 .end    = AT91SAM9260_ID_MCI,
225                 .flags  = IORESOURCE_IRQ,
226         },
227 };
228
229 static struct platform_device at91sam9260_mmc_device = {
230         .name           = "at91_mci",
231         .id             = -1,
232         .dev            = {
233                                 .dma_mask               = &mmc_dmamask,
234                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
235                                 .platform_data          = &mmc_data,
236         },
237         .resource       = mmc_resources,
238         .num_resources  = ARRAY_SIZE(mmc_resources),
239 };
240
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
242 {
243         if (!data)
244                 return;
245
246         /* input/irq */
247         if (gpio_is_valid(data->det_pin)) {
248                 at91_set_gpio_input(data->det_pin, 1);
249                 at91_set_deglitch(data->det_pin, 1);
250         }
251         if (gpio_is_valid(data->wp_pin))
252                 at91_set_gpio_input(data->wp_pin, 1);
253         if (gpio_is_valid(data->vcc_pin))
254                 at91_set_gpio_output(data->vcc_pin, 0);
255
256         /* CLK */
257         at91_set_A_periph(AT91_PIN_PA8, 0);
258
259         if (data->slot_b) {
260                 /* CMD */
261                 at91_set_B_periph(AT91_PIN_PA1, 1);
262
263                 /* DAT0, maybe DAT1..DAT3 */
264                 at91_set_B_periph(AT91_PIN_PA0, 1);
265                 if (data->wire4) {
266                         at91_set_B_periph(AT91_PIN_PA5, 1);
267                         at91_set_B_periph(AT91_PIN_PA4, 1);
268                         at91_set_B_periph(AT91_PIN_PA3, 1);
269                 }
270         } else {
271                 /* CMD */
272                 at91_set_A_periph(AT91_PIN_PA7, 1);
273
274                 /* DAT0, maybe DAT1..DAT3 */
275                 at91_set_A_periph(AT91_PIN_PA6, 1);
276                 if (data->wire4) {
277                         at91_set_A_periph(AT91_PIN_PA9, 1);
278                         at91_set_A_periph(AT91_PIN_PA10, 1);
279                         at91_set_A_periph(AT91_PIN_PA11, 1);
280                 }
281         }
282
283         mmc_data = *data;
284         platform_device_register(&at91sam9260_mmc_device);
285 }
286 #else
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
288 #endif
289
290 /* --------------------------------------------------------------------
291  *  MMC / SD Slot for Atmel MCI Driver
292  * -------------------------------------------------------------------- */
293
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
297
298 static struct resource mmc_resources[] = {
299         [0] = {
300                 .start  = AT91SAM9260_BASE_MCI,
301                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302                 .flags  = IORESOURCE_MEM,
303         },
304         [1] = {
305                 .start  = AT91SAM9260_ID_MCI,
306                 .end    = AT91SAM9260_ID_MCI,
307                 .flags  = IORESOURCE_IRQ,
308         },
309 };
310
311 static struct platform_device at91sam9260_mmc_device = {
312         .name           = "atmel_mci",
313         .id             = -1,
314         .dev            = {
315                                 .dma_mask               = &mmc_dmamask,
316                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
317                                 .platform_data          = &mmc_data,
318         },
319         .resource       = mmc_resources,
320         .num_resources  = ARRAY_SIZE(mmc_resources),
321 };
322
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
324 {
325         unsigned int i;
326         unsigned int slot_count = 0;
327
328         if (!data)
329                 return;
330
331         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332                 if (data->slot[i].bus_width) {
333                         /* input/irq */
334                         if (gpio_is_valid(data->slot[i].detect_pin)) {
335                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
337                         }
338                         if (gpio_is_valid(data->slot[i].wp_pin))
339                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
340
341                         switch (i) {
342                         case 0:
343                                 /* CMD */
344                                 at91_set_A_periph(AT91_PIN_PA7, 1);
345                                 /* DAT0, maybe DAT1..DAT3 */
346                                 at91_set_A_periph(AT91_PIN_PA6, 1);
347                                 if (data->slot[i].bus_width == 4) {
348                                         at91_set_A_periph(AT91_PIN_PA9, 1);
349                                         at91_set_A_periph(AT91_PIN_PA10, 1);
350                                         at91_set_A_periph(AT91_PIN_PA11, 1);
351                                 }
352                                 slot_count++;
353                                 break;
354                         case 1:
355                                 /* CMD */
356                                 at91_set_B_periph(AT91_PIN_PA1, 1);
357                                 /* DAT0, maybe DAT1..DAT3 */
358                                 at91_set_B_periph(AT91_PIN_PA0, 1);
359                                 if (data->slot[i].bus_width == 4) {
360                                         at91_set_B_periph(AT91_PIN_PA5, 1);
361                                         at91_set_B_periph(AT91_PIN_PA4, 1);
362                                         at91_set_B_periph(AT91_PIN_PA3, 1);
363                                 }
364                                 slot_count++;
365                                 break;
366                         default:
367                                 printk(KERN_ERR
368                                         "AT91: SD/MMC slot %d not available\n", i);
369                                 break;
370                         }
371                 }
372         }
373
374         if (slot_count) {
375                 /* CLK */
376                 at91_set_A_periph(AT91_PIN_PA8, 0);
377
378                 mmc_data = *data;
379                 platform_device_register(&at91sam9260_mmc_device);
380         }
381 }
382 #else
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
384 #endif
385
386
387 /* --------------------------------------------------------------------
388  *  NAND / SmartMedia
389  * -------------------------------------------------------------------- */
390
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
393
394 #define NAND_BASE       AT91_CHIPSELECT_3
395
396 static struct resource nand_resources[] = {
397         [0] = {
398                 .start  = NAND_BASE,
399                 .end    = NAND_BASE + SZ_256M - 1,
400                 .flags  = IORESOURCE_MEM,
401         },
402         [1] = {
403                 .start  = AT91SAM9260_BASE_ECC,
404                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405                 .flags  = IORESOURCE_MEM,
406         }
407 };
408
409 static struct platform_device at91sam9260_nand_device = {
410         .name           = "atmel_nand",
411         .id             = -1,
412         .dev            = {
413                                 .platform_data  = &nand_data,
414         },
415         .resource       = nand_resources,
416         .num_resources  = ARRAY_SIZE(nand_resources),
417 };
418
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
420 {
421         unsigned long csa;
422
423         if (!data)
424                 return;
425
426         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
428
429         /* enable pin */
430         if (gpio_is_valid(data->enable_pin))
431                 at91_set_gpio_output(data->enable_pin, 1);
432
433         /* ready/busy pin */
434         if (gpio_is_valid(data->rdy_pin))
435                 at91_set_gpio_input(data->rdy_pin, 1);
436
437         /* card detect pin */
438         if (gpio_is_valid(data->det_pin))
439                 at91_set_gpio_input(data->det_pin, 1);
440
441         nand_data = *data;
442         platform_device_register(&at91sam9260_nand_device);
443 }
444 #else
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
446 #endif
447
448
449 /* --------------------------------------------------------------------
450  *  TWI (i2c)
451  * -------------------------------------------------------------------- */
452
453 /*
454  * Prefer the GPIO code since the TWI controller isn't robust
455  * (gets overruns and underruns under load) and can only issue
456  * repeated STARTs in one scenario (the driver doesn't yet handle them).
457  */
458
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
460
461 static struct i2c_gpio_platform_data pdata = {
462         .sda_pin                = AT91_PIN_PA23,
463         .sda_is_open_drain      = 1,
464         .scl_pin                = AT91_PIN_PA24,
465         .scl_is_open_drain      = 1,
466         .udelay                 = 2,            /* ~100 kHz */
467 };
468
469 static struct platform_device at91sam9260_twi_device = {
470         .name                   = "i2c-gpio",
471         .id                     = -1,
472         .dev.platform_data      = &pdata,
473 };
474
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
476 {
477         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
478         at91_set_multi_drive(AT91_PIN_PA23, 1);
479
480         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
481         at91_set_multi_drive(AT91_PIN_PA24, 1);
482
483         i2c_register_board_info(0, devices, nr_devices);
484         platform_device_register(&at91sam9260_twi_device);
485 }
486
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
488
489 static struct resource twi_resources[] = {
490         [0] = {
491                 .start  = AT91SAM9260_BASE_TWI,
492                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493                 .flags  = IORESOURCE_MEM,
494         },
495         [1] = {
496                 .start  = AT91SAM9260_ID_TWI,
497                 .end    = AT91SAM9260_ID_TWI,
498                 .flags  = IORESOURCE_IRQ,
499         },
500 };
501
502 static struct platform_device at91sam9260_twi_device = {
503         .name           = "at91_i2c",
504         .id             = -1,
505         .resource       = twi_resources,
506         .num_resources  = ARRAY_SIZE(twi_resources),
507 };
508
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
510 {
511         /* pins used for TWI interface */
512         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
513         at91_set_multi_drive(AT91_PIN_PA23, 1);
514
515         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
516         at91_set_multi_drive(AT91_PIN_PA24, 1);
517
518         i2c_register_board_info(0, devices, nr_devices);
519         platform_device_register(&at91sam9260_twi_device);
520 }
521 #else
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
523 #endif
524
525
526 /* --------------------------------------------------------------------
527  *  SPI
528  * -------------------------------------------------------------------- */
529
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
532
533 static struct resource spi0_resources[] = {
534         [0] = {
535                 .start  = AT91SAM9260_BASE_SPI0,
536                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537                 .flags  = IORESOURCE_MEM,
538         },
539         [1] = {
540                 .start  = AT91SAM9260_ID_SPI0,
541                 .end    = AT91SAM9260_ID_SPI0,
542                 .flags  = IORESOURCE_IRQ,
543         },
544 };
545
546 static struct platform_device at91sam9260_spi0_device = {
547         .name           = "atmel_spi",
548         .id             = 0,
549         .dev            = {
550                                 .dma_mask               = &spi_dmamask,
551                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
552         },
553         .resource       = spi0_resources,
554         .num_resources  = ARRAY_SIZE(spi0_resources),
555 };
556
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
558
559 static struct resource spi1_resources[] = {
560         [0] = {
561                 .start  = AT91SAM9260_BASE_SPI1,
562                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563                 .flags  = IORESOURCE_MEM,
564         },
565         [1] = {
566                 .start  = AT91SAM9260_ID_SPI1,
567                 .end    = AT91SAM9260_ID_SPI1,
568                 .flags  = IORESOURCE_IRQ,
569         },
570 };
571
572 static struct platform_device at91sam9260_spi1_device = {
573         .name           = "atmel_spi",
574         .id             = 1,
575         .dev            = {
576                                 .dma_mask               = &spi_dmamask,
577                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
578         },
579         .resource       = spi1_resources,
580         .num_resources  = ARRAY_SIZE(spi1_resources),
581 };
582
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
584
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
586 {
587         int i;
588         unsigned long cs_pin;
589         short enable_spi0 = 0;
590         short enable_spi1 = 0;
591
592         /* Choose SPI chip-selects */
593         for (i = 0; i < nr_devices; i++) {
594                 if (devices[i].controller_data)
595                         cs_pin = (unsigned long) devices[i].controller_data;
596                 else if (devices[i].bus_num == 0)
597                         cs_pin = spi0_standard_cs[devices[i].chip_select];
598                 else
599                         cs_pin = spi1_standard_cs[devices[i].chip_select];
600
601                 if (!gpio_is_valid(cs_pin))
602                         continue;
603
604                 if (devices[i].bus_num == 0)
605                         enable_spi0 = 1;
606                 else
607                         enable_spi1 = 1;
608
609                 /* enable chip-select pin */
610                 at91_set_gpio_output(cs_pin, 1);
611
612                 /* pass chip-select pin to driver */
613                 devices[i].controller_data = (void *) cs_pin;
614         }
615
616         spi_register_board_info(devices, nr_devices);
617
618         /* Configure SPI bus(es) */
619         if (enable_spi0) {
620                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
621                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
622                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
623
624                 platform_device_register(&at91sam9260_spi0_device);
625         }
626         if (enable_spi1) {
627                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
628                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
629                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
630
631                 platform_device_register(&at91sam9260_spi1_device);
632         }
633 }
634 #else
635 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
636 #endif
637
638
639 /* --------------------------------------------------------------------
640  *  Timer/Counter blocks
641  * -------------------------------------------------------------------- */
642
643 #ifdef CONFIG_ATMEL_TCLIB
644
645 static struct resource tcb0_resources[] = {
646         [0] = {
647                 .start  = AT91SAM9260_BASE_TCB0,
648                 .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
649                 .flags  = IORESOURCE_MEM,
650         },
651         [1] = {
652                 .start  = AT91SAM9260_ID_TC0,
653                 .end    = AT91SAM9260_ID_TC0,
654                 .flags  = IORESOURCE_IRQ,
655         },
656         [2] = {
657                 .start  = AT91SAM9260_ID_TC1,
658                 .end    = AT91SAM9260_ID_TC1,
659                 .flags  = IORESOURCE_IRQ,
660         },
661         [3] = {
662                 .start  = AT91SAM9260_ID_TC2,
663                 .end    = AT91SAM9260_ID_TC2,
664                 .flags  = IORESOURCE_IRQ,
665         },
666 };
667
668 static struct platform_device at91sam9260_tcb0_device = {
669         .name           = "atmel_tcb",
670         .id             = 0,
671         .resource       = tcb0_resources,
672         .num_resources  = ARRAY_SIZE(tcb0_resources),
673 };
674
675 static struct resource tcb1_resources[] = {
676         [0] = {
677                 .start  = AT91SAM9260_BASE_TCB1,
678                 .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
679                 .flags  = IORESOURCE_MEM,
680         },
681         [1] = {
682                 .start  = AT91SAM9260_ID_TC3,
683                 .end    = AT91SAM9260_ID_TC3,
684                 .flags  = IORESOURCE_IRQ,
685         },
686         [2] = {
687                 .start  = AT91SAM9260_ID_TC4,
688                 .end    = AT91SAM9260_ID_TC4,
689                 .flags  = IORESOURCE_IRQ,
690         },
691         [3] = {
692                 .start  = AT91SAM9260_ID_TC5,
693                 .end    = AT91SAM9260_ID_TC5,
694                 .flags  = IORESOURCE_IRQ,
695         },
696 };
697
698 static struct platform_device at91sam9260_tcb1_device = {
699         .name           = "atmel_tcb",
700         .id             = 1,
701         .resource       = tcb1_resources,
702         .num_resources  = ARRAY_SIZE(tcb1_resources),
703 };
704
705 static void __init at91_add_device_tc(void)
706 {
707         platform_device_register(&at91sam9260_tcb0_device);
708         platform_device_register(&at91sam9260_tcb1_device);
709 }
710 #else
711 static void __init at91_add_device_tc(void) { }
712 #endif
713
714
715 /* --------------------------------------------------------------------
716  *  RTT
717  * -------------------------------------------------------------------- */
718
719 static struct resource rtt_resources[] = {
720         {
721                 .start  = AT91SAM9260_BASE_RTT,
722                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
723                 .flags  = IORESOURCE_MEM,
724         }, {
725                 .flags  = IORESOURCE_MEM,
726         },
727 };
728
729 static struct platform_device at91sam9260_rtt_device = {
730         .name           = "at91_rtt",
731         .id             = 0,
732         .resource       = rtt_resources,
733 };
734
735
736 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
737 static void __init at91_add_device_rtt_rtc(void)
738 {
739         at91sam9260_rtt_device.name = "rtc-at91sam9";
740         /*
741          * The second resource is needed:
742          * GPBR will serve as the storage for RTC time offset
743          */
744         at91sam9260_rtt_device.num_resources = 2;
745         rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
746                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
747         rtt_resources[1].end = rtt_resources[1].start + 3;
748 }
749 #else
750 static void __init at91_add_device_rtt_rtc(void)
751 {
752         /* Only one resource is needed: RTT not used as RTC */
753         at91sam9260_rtt_device.num_resources = 1;
754 }
755 #endif
756
757 static void __init at91_add_device_rtt(void)
758 {
759         at91_add_device_rtt_rtc();
760         platform_device_register(&at91sam9260_rtt_device);
761 }
762
763
764 /* --------------------------------------------------------------------
765  *  Watchdog
766  * -------------------------------------------------------------------- */
767
768 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
769 static struct resource wdt_resources[] = {
770         {
771                 .start  = AT91SAM9260_BASE_WDT,
772                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
773                 .flags  = IORESOURCE_MEM,
774         }
775 };
776
777 static struct platform_device at91sam9260_wdt_device = {
778         .name           = "at91_wdt",
779         .id             = -1,
780         .resource       = wdt_resources,
781         .num_resources  = ARRAY_SIZE(wdt_resources),
782 };
783
784 static void __init at91_add_device_watchdog(void)
785 {
786         platform_device_register(&at91sam9260_wdt_device);
787 }
788 #else
789 static void __init at91_add_device_watchdog(void) {}
790 #endif
791
792
793 /* --------------------------------------------------------------------
794  *  SSC -- Synchronous Serial Controller
795  * -------------------------------------------------------------------- */
796
797 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
798 static u64 ssc_dmamask = DMA_BIT_MASK(32);
799
800 static struct resource ssc_resources[] = {
801         [0] = {
802                 .start  = AT91SAM9260_BASE_SSC,
803                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
804                 .flags  = IORESOURCE_MEM,
805         },
806         [1] = {
807                 .start  = AT91SAM9260_ID_SSC,
808                 .end    = AT91SAM9260_ID_SSC,
809                 .flags  = IORESOURCE_IRQ,
810         },
811 };
812
813 static struct platform_device at91sam9260_ssc_device = {
814         .name   = "ssc",
815         .id     = 0,
816         .dev    = {
817                 .dma_mask               = &ssc_dmamask,
818                 .coherent_dma_mask      = DMA_BIT_MASK(32),
819         },
820         .resource       = ssc_resources,
821         .num_resources  = ARRAY_SIZE(ssc_resources),
822 };
823
824 static inline void configure_ssc_pins(unsigned pins)
825 {
826         if (pins & ATMEL_SSC_TF)
827                 at91_set_A_periph(AT91_PIN_PB17, 1);
828         if (pins & ATMEL_SSC_TK)
829                 at91_set_A_periph(AT91_PIN_PB16, 1);
830         if (pins & ATMEL_SSC_TD)
831                 at91_set_A_periph(AT91_PIN_PB18, 1);
832         if (pins & ATMEL_SSC_RD)
833                 at91_set_A_periph(AT91_PIN_PB19, 1);
834         if (pins & ATMEL_SSC_RK)
835                 at91_set_A_periph(AT91_PIN_PB20, 1);
836         if (pins & ATMEL_SSC_RF)
837                 at91_set_A_periph(AT91_PIN_PB21, 1);
838 }
839
840 /*
841  * SSC controllers are accessed through library code, instead of any
842  * kind of all-singing/all-dancing driver.  For example one could be
843  * used by a particular I2S audio codec's driver, while another one
844  * on the same system might be used by a custom data capture driver.
845  */
846 void __init at91_add_device_ssc(unsigned id, unsigned pins)
847 {
848         struct platform_device *pdev;
849
850         /*
851          * NOTE: caller is responsible for passing information matching
852          * "pins" to whatever will be using each particular controller.
853          */
854         switch (id) {
855         case AT91SAM9260_ID_SSC:
856                 pdev = &at91sam9260_ssc_device;
857                 configure_ssc_pins(pins);
858                 break;
859         default:
860                 return;
861         }
862
863         platform_device_register(pdev);
864 }
865
866 #else
867 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
868 #endif
869
870
871 /* --------------------------------------------------------------------
872  *  UART
873  * -------------------------------------------------------------------- */
874 #if defined(CONFIG_SERIAL_ATMEL)
875 static struct resource dbgu_resources[] = {
876         [0] = {
877                 .start  = AT91SAM9260_BASE_DBGU,
878                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
879                 .flags  = IORESOURCE_MEM,
880         },
881         [1] = {
882                 .start  = AT91_ID_SYS,
883                 .end    = AT91_ID_SYS,
884                 .flags  = IORESOURCE_IRQ,
885         },
886 };
887
888 static struct atmel_uart_data dbgu_data = {
889         .use_dma_tx     = 0,
890         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
891 };
892
893 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
894
895 static struct platform_device at91sam9260_dbgu_device = {
896         .name           = "atmel_usart",
897         .id             = 0,
898         .dev            = {
899                                 .dma_mask               = &dbgu_dmamask,
900                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
901                                 .platform_data          = &dbgu_data,
902         },
903         .resource       = dbgu_resources,
904         .num_resources  = ARRAY_SIZE(dbgu_resources),
905 };
906
907 static inline void configure_dbgu_pins(void)
908 {
909         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
910         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
911 }
912
913 static struct resource uart0_resources[] = {
914         [0] = {
915                 .start  = AT91SAM9260_BASE_US0,
916                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
917                 .flags  = IORESOURCE_MEM,
918         },
919         [1] = {
920                 .start  = AT91SAM9260_ID_US0,
921                 .end    = AT91SAM9260_ID_US0,
922                 .flags  = IORESOURCE_IRQ,
923         },
924 };
925
926 static struct atmel_uart_data uart0_data = {
927         .use_dma_tx     = 1,
928         .use_dma_rx     = 1,
929 };
930
931 static u64 uart0_dmamask = DMA_BIT_MASK(32);
932
933 static struct platform_device at91sam9260_uart0_device = {
934         .name           = "atmel_usart",
935         .id             = 1,
936         .dev            = {
937                                 .dma_mask               = &uart0_dmamask,
938                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
939                                 .platform_data          = &uart0_data,
940         },
941         .resource       = uart0_resources,
942         .num_resources  = ARRAY_SIZE(uart0_resources),
943 };
944
945 static inline void configure_usart0_pins(unsigned pins)
946 {
947         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
948         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
949
950         if (pins & ATMEL_UART_RTS)
951                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
952         if (pins & ATMEL_UART_CTS)
953                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
954         if (pins & ATMEL_UART_DTR)
955                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
956         if (pins & ATMEL_UART_DSR)
957                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
958         if (pins & ATMEL_UART_DCD)
959                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
960         if (pins & ATMEL_UART_RI)
961                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
962 }
963
964 static struct resource uart1_resources[] = {
965         [0] = {
966                 .start  = AT91SAM9260_BASE_US1,
967                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
968                 .flags  = IORESOURCE_MEM,
969         },
970         [1] = {
971                 .start  = AT91SAM9260_ID_US1,
972                 .end    = AT91SAM9260_ID_US1,
973                 .flags  = IORESOURCE_IRQ,
974         },
975 };
976
977 static struct atmel_uart_data uart1_data = {
978         .use_dma_tx     = 1,
979         .use_dma_rx     = 1,
980 };
981
982 static u64 uart1_dmamask = DMA_BIT_MASK(32);
983
984 static struct platform_device at91sam9260_uart1_device = {
985         .name           = "atmel_usart",
986         .id             = 2,
987         .dev            = {
988                                 .dma_mask               = &uart1_dmamask,
989                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
990                                 .platform_data          = &uart1_data,
991         },
992         .resource       = uart1_resources,
993         .num_resources  = ARRAY_SIZE(uart1_resources),
994 };
995
996 static inline void configure_usart1_pins(unsigned pins)
997 {
998         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
999         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
1000
1001         if (pins & ATMEL_UART_RTS)
1002                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
1003         if (pins & ATMEL_UART_CTS)
1004                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
1005 }
1006
1007 static struct resource uart2_resources[] = {
1008         [0] = {
1009                 .start  = AT91SAM9260_BASE_US2,
1010                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
1011                 .flags  = IORESOURCE_MEM,
1012         },
1013         [1] = {
1014                 .start  = AT91SAM9260_ID_US2,
1015                 .end    = AT91SAM9260_ID_US2,
1016                 .flags  = IORESOURCE_IRQ,
1017         },
1018 };
1019
1020 static struct atmel_uart_data uart2_data = {
1021         .use_dma_tx     = 1,
1022         .use_dma_rx     = 1,
1023 };
1024
1025 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1026
1027 static struct platform_device at91sam9260_uart2_device = {
1028         .name           = "atmel_usart",
1029         .id             = 3,
1030         .dev            = {
1031                                 .dma_mask               = &uart2_dmamask,
1032                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1033                                 .platform_data          = &uart2_data,
1034         },
1035         .resource       = uart2_resources,
1036         .num_resources  = ARRAY_SIZE(uart2_resources),
1037 };
1038
1039 static inline void configure_usart2_pins(unsigned pins)
1040 {
1041         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
1042         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
1043
1044         if (pins & ATMEL_UART_RTS)
1045                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1046         if (pins & ATMEL_UART_CTS)
1047                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1048 }
1049
1050 static struct resource uart3_resources[] = {
1051         [0] = {
1052                 .start  = AT91SAM9260_BASE_US3,
1053                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1054                 .flags  = IORESOURCE_MEM,
1055         },
1056         [1] = {
1057                 .start  = AT91SAM9260_ID_US3,
1058                 .end    = AT91SAM9260_ID_US3,
1059                 .flags  = IORESOURCE_IRQ,
1060         },
1061 };
1062
1063 static struct atmel_uart_data uart3_data = {
1064         .use_dma_tx     = 1,
1065         .use_dma_rx     = 1,
1066 };
1067
1068 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1069
1070 static struct platform_device at91sam9260_uart3_device = {
1071         .name           = "atmel_usart",
1072         .id             = 4,
1073         .dev            = {
1074                                 .dma_mask               = &uart3_dmamask,
1075                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1076                                 .platform_data          = &uart3_data,
1077         },
1078         .resource       = uart3_resources,
1079         .num_resources  = ARRAY_SIZE(uart3_resources),
1080 };
1081
1082 static inline void configure_usart3_pins(unsigned pins)
1083 {
1084         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1085         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1086
1087         if (pins & ATMEL_UART_RTS)
1088                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1089         if (pins & ATMEL_UART_CTS)
1090                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1091 }
1092
1093 static struct resource uart4_resources[] = {
1094         [0] = {
1095                 .start  = AT91SAM9260_BASE_US4,
1096                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1097                 .flags  = IORESOURCE_MEM,
1098         },
1099         [1] = {
1100                 .start  = AT91SAM9260_ID_US4,
1101                 .end    = AT91SAM9260_ID_US4,
1102                 .flags  = IORESOURCE_IRQ,
1103         },
1104 };
1105
1106 static struct atmel_uart_data uart4_data = {
1107         .use_dma_tx     = 1,
1108         .use_dma_rx     = 1,
1109 };
1110
1111 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1112
1113 static struct platform_device at91sam9260_uart4_device = {
1114         .name           = "atmel_usart",
1115         .id             = 5,
1116         .dev            = {
1117                                 .dma_mask               = &uart4_dmamask,
1118                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1119                                 .platform_data          = &uart4_data,
1120         },
1121         .resource       = uart4_resources,
1122         .num_resources  = ARRAY_SIZE(uart4_resources),
1123 };
1124
1125 static inline void configure_usart4_pins(void)
1126 {
1127         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1128         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1129 }
1130
1131 static struct resource uart5_resources[] = {
1132         [0] = {
1133                 .start  = AT91SAM9260_BASE_US5,
1134                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1135                 .flags  = IORESOURCE_MEM,
1136         },
1137         [1] = {
1138                 .start  = AT91SAM9260_ID_US5,
1139                 .end    = AT91SAM9260_ID_US5,
1140                 .flags  = IORESOURCE_IRQ,
1141         },
1142 };
1143
1144 static struct atmel_uart_data uart5_data = {
1145         .use_dma_tx     = 1,
1146         .use_dma_rx     = 1,
1147 };
1148
1149 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1150
1151 static struct platform_device at91sam9260_uart5_device = {
1152         .name           = "atmel_usart",
1153         .id             = 6,
1154         .dev            = {
1155                                 .dma_mask               = &uart5_dmamask,
1156                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1157                                 .platform_data          = &uart5_data,
1158         },
1159         .resource       = uart5_resources,
1160         .num_resources  = ARRAY_SIZE(uart5_resources),
1161 };
1162
1163 static inline void configure_usart5_pins(void)
1164 {
1165         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1166         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1167 }
1168
1169 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1170
1171 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1172 {
1173         struct platform_device *pdev;
1174         struct atmel_uart_data *pdata;
1175
1176         switch (id) {
1177                 case 0:         /* DBGU */
1178                         pdev = &at91sam9260_dbgu_device;
1179                         configure_dbgu_pins();
1180                         break;
1181                 case AT91SAM9260_ID_US0:
1182                         pdev = &at91sam9260_uart0_device;
1183                         configure_usart0_pins(pins);
1184                         break;
1185                 case AT91SAM9260_ID_US1:
1186                         pdev = &at91sam9260_uart1_device;
1187                         configure_usart1_pins(pins);
1188                         break;
1189                 case AT91SAM9260_ID_US2:
1190                         pdev = &at91sam9260_uart2_device;
1191                         configure_usart2_pins(pins);
1192                         break;
1193                 case AT91SAM9260_ID_US3:
1194                         pdev = &at91sam9260_uart3_device;
1195                         configure_usart3_pins(pins);
1196                         break;
1197                 case AT91SAM9260_ID_US4:
1198                         pdev = &at91sam9260_uart4_device;
1199                         configure_usart4_pins();
1200                         break;
1201                 case AT91SAM9260_ID_US5:
1202                         pdev = &at91sam9260_uart5_device;
1203                         configure_usart5_pins();
1204                         break;
1205                 default:
1206                         return;
1207         }
1208         pdata = pdev->dev.platform_data;
1209         pdata->num = portnr;            /* update to mapped ID */
1210
1211         if (portnr < ATMEL_MAX_UART)
1212                 at91_uarts[portnr] = pdev;
1213 }
1214
1215 void __init at91_add_device_serial(void)
1216 {
1217         int i;
1218
1219         for (i = 0; i < ATMEL_MAX_UART; i++) {
1220                 if (at91_uarts[i])
1221                         platform_device_register(at91_uarts[i]);
1222         }
1223 }
1224 #else
1225 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1226 void __init at91_add_device_serial(void) {}
1227 #endif
1228
1229 /* --------------------------------------------------------------------
1230  *  CF/IDE
1231  * -------------------------------------------------------------------- */
1232
1233 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1234         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1235
1236 static struct at91_cf_data cf0_data;
1237
1238 static struct resource cf0_resources[] = {
1239         [0] = {
1240                 .start  = AT91_CHIPSELECT_4,
1241                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1242                 .flags  = IORESOURCE_MEM,
1243         }
1244 };
1245
1246 static struct platform_device cf0_device = {
1247         .id             = 0,
1248         .dev            = {
1249                                 .platform_data  = &cf0_data,
1250         },
1251         .resource       = cf0_resources,
1252         .num_resources  = ARRAY_SIZE(cf0_resources),
1253 };
1254
1255 static struct at91_cf_data cf1_data;
1256
1257 static struct resource cf1_resources[] = {
1258         [0] = {
1259                 .start  = AT91_CHIPSELECT_5,
1260                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1261                 .flags  = IORESOURCE_MEM,
1262         }
1263 };
1264
1265 static struct platform_device cf1_device = {
1266         .id             = 1,
1267         .dev            = {
1268                                 .platform_data  = &cf1_data,
1269         },
1270         .resource       = cf1_resources,
1271         .num_resources  = ARRAY_SIZE(cf1_resources),
1272 };
1273
1274 void __init at91_add_device_cf(struct at91_cf_data *data)
1275 {
1276         struct platform_device *pdev;
1277         unsigned long csa;
1278
1279         if (!data)
1280                 return;
1281
1282         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1283
1284         switch (data->chipselect) {
1285         case 4:
1286                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1287                 at91_set_A_periph(AT91_PIN_PC8, 0);
1288                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1289                 cf0_data = *data;
1290                 pdev = &cf0_device;
1291                 break;
1292         case 5:
1293                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1294                 at91_set_A_periph(AT91_PIN_PC9, 0);
1295                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1296                 cf1_data = *data;
1297                 pdev = &cf1_device;
1298                 break;
1299         default:
1300                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1301                        data->chipselect);
1302                 return;
1303         }
1304
1305         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1306
1307         if (gpio_is_valid(data->rst_pin)) {
1308                 at91_set_multi_drive(data->rst_pin, 0);
1309                 at91_set_gpio_output(data->rst_pin, 1);
1310         }
1311
1312         if (gpio_is_valid(data->irq_pin)) {
1313                 at91_set_gpio_input(data->irq_pin, 0);
1314                 at91_set_deglitch(data->irq_pin, 1);
1315         }
1316
1317         if (gpio_is_valid(data->det_pin)) {
1318                 at91_set_gpio_input(data->det_pin, 0);
1319                 at91_set_deglitch(data->det_pin, 1);
1320         }
1321
1322         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1323         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1324         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1325         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1326
1327         if (data->flags & AT91_CF_TRUE_IDE)
1328 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1329                 pdev->name = "pata_at91";
1330 #else
1331 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1332 #endif
1333         else
1334                 pdev->name = "at91_cf";
1335
1336         platform_device_register(pdev);
1337 }
1338
1339 #else
1340 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1341 #endif
1342
1343 /* -------------------------------------------------------------------- */
1344 /*
1345  * These devices are always present and don't need any board-specific
1346  * setup.
1347  */
1348 static int __init at91_add_standard_devices(void)
1349 {
1350         if (of_have_populated_dt())
1351                 return 0;
1352
1353         at91_add_device_rtt();
1354         at91_add_device_watchdog();
1355         at91_add_device_tc();
1356         return 0;
1357 }
1358
1359 arch_initcall(at91_add_standard_devices);