2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
20 #include <mach/board.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
30 /* --------------------------------------------------------------------
32 * -------------------------------------------------------------------- */
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
38 static struct resource usbh_resources[] = {
40 .start = AT91SAM9260_UHP_BASE,
41 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
45 .start = AT91SAM9260_ID_UHP,
46 .end = AT91SAM9260_ID_UHP,
47 .flags = IORESOURCE_IRQ,
51 static struct platform_device at91_usbh_device = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = DMA_BIT_MASK(32),
57 .platform_data = &usbh_data,
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
70 /* Enable overcurrent notification */
71 for (i = 0; i < data->ports; i++) {
72 if (data->overcurrent_pin[i])
73 at91_set_gpio_input(data->overcurrent_pin[i], 1);
77 platform_device_register(&at91_usbh_device);
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
84 /* --------------------------------------------------------------------
86 * -------------------------------------------------------------------- */
88 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
89 static struct at91_udc_data udc_data;
91 static struct resource udc_resources[] = {
93 .start = AT91SAM9260_BASE_UDP,
94 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95 .flags = IORESOURCE_MEM,
98 .start = AT91SAM9260_ID_UDP,
99 .end = AT91SAM9260_ID_UDP,
100 .flags = IORESOURCE_IRQ,
104 static struct platform_device at91_udc_device = {
108 .platform_data = &udc_data,
110 .resource = udc_resources,
111 .num_resources = ARRAY_SIZE(udc_resources),
114 void __init at91_add_device_udc(struct at91_udc_data *data)
119 if (gpio_is_valid(data->vbus_pin)) {
120 at91_set_gpio_input(data->vbus_pin, 0);
121 at91_set_deglitch(data->vbus_pin, 1);
124 /* Pullup pin is handled internally by USB device peripheral */
127 platform_device_register(&at91_udc_device);
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
134 /* --------------------------------------------------------------------
136 * -------------------------------------------------------------------- */
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
142 static struct resource eth_resources[] = {
144 .start = AT91SAM9260_BASE_EMAC,
145 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146 .flags = IORESOURCE_MEM,
149 .start = AT91SAM9260_ID_EMAC,
150 .end = AT91SAM9260_ID_EMAC,
151 .flags = IORESOURCE_IRQ,
155 static struct platform_device at91sam9260_eth_device = {
159 .dma_mask = ð_dmamask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 .platform_data = ð_data,
163 .resource = eth_resources,
164 .num_resources = ARRAY_SIZE(eth_resources),
167 void __init at91_add_device_eth(struct macb_platform_data *data)
172 if (gpio_is_valid(data->phy_irq_pin)) {
173 at91_set_gpio_input(data->phy_irq_pin, 0);
174 at91_set_deglitch(data->phy_irq_pin, 1);
177 /* Pins used for MII and RMII */
178 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
179 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
180 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
182 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
185 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
186 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
187 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
189 if (!data->is_rmii) {
190 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
191 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
192 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
193 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
194 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
195 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
196 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
197 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
201 platform_device_register(&at91sam9260_eth_device);
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
208 /* --------------------------------------------------------------------
210 * -------------------------------------------------------------------- */
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
216 static struct resource mmc_resources[] = {
218 .start = AT91SAM9260_BASE_MCI,
219 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220 .flags = IORESOURCE_MEM,
223 .start = AT91SAM9260_ID_MCI,
224 .end = AT91SAM9260_ID_MCI,
225 .flags = IORESOURCE_IRQ,
229 static struct platform_device at91sam9260_mmc_device = {
233 .dma_mask = &mmc_dmamask,
234 .coherent_dma_mask = DMA_BIT_MASK(32),
235 .platform_data = &mmc_data,
237 .resource = mmc_resources,
238 .num_resources = ARRAY_SIZE(mmc_resources),
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
247 if (gpio_is_valid(data->det_pin)) {
248 at91_set_gpio_input(data->det_pin, 1);
249 at91_set_deglitch(data->det_pin, 1);
251 if (gpio_is_valid(data->wp_pin))
252 at91_set_gpio_input(data->wp_pin, 1);
253 if (gpio_is_valid(data->vcc_pin))
254 at91_set_gpio_output(data->vcc_pin, 0);
257 at91_set_A_periph(AT91_PIN_PA8, 0);
261 at91_set_B_periph(AT91_PIN_PA1, 1);
263 /* DAT0, maybe DAT1..DAT3 */
264 at91_set_B_periph(AT91_PIN_PA0, 1);
266 at91_set_B_periph(AT91_PIN_PA5, 1);
267 at91_set_B_periph(AT91_PIN_PA4, 1);
268 at91_set_B_periph(AT91_PIN_PA3, 1);
272 at91_set_A_periph(AT91_PIN_PA7, 1);
274 /* DAT0, maybe DAT1..DAT3 */
275 at91_set_A_periph(AT91_PIN_PA6, 1);
277 at91_set_A_periph(AT91_PIN_PA9, 1);
278 at91_set_A_periph(AT91_PIN_PA10, 1);
279 at91_set_A_periph(AT91_PIN_PA11, 1);
284 platform_device_register(&at91sam9260_mmc_device);
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
290 /* --------------------------------------------------------------------
291 * MMC / SD Slot for Atmel MCI Driver
292 * -------------------------------------------------------------------- */
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
298 static struct resource mmc_resources[] = {
300 .start = AT91SAM9260_BASE_MCI,
301 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302 .flags = IORESOURCE_MEM,
305 .start = AT91SAM9260_ID_MCI,
306 .end = AT91SAM9260_ID_MCI,
307 .flags = IORESOURCE_IRQ,
311 static struct platform_device at91sam9260_mmc_device = {
315 .dma_mask = &mmc_dmamask,
316 .coherent_dma_mask = DMA_BIT_MASK(32),
317 .platform_data = &mmc_data,
319 .resource = mmc_resources,
320 .num_resources = ARRAY_SIZE(mmc_resources),
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
326 unsigned int slot_count = 0;
331 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332 if (data->slot[i].bus_width) {
334 if (gpio_is_valid(data->slot[i].detect_pin)) {
335 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336 at91_set_deglitch(data->slot[i].detect_pin, 1);
338 if (gpio_is_valid(data->slot[i].wp_pin))
339 at91_set_gpio_input(data->slot[i].wp_pin, 1);
344 at91_set_A_periph(AT91_PIN_PA7, 1);
345 /* DAT0, maybe DAT1..DAT3 */
346 at91_set_A_periph(AT91_PIN_PA6, 1);
347 if (data->slot[i].bus_width == 4) {
348 at91_set_A_periph(AT91_PIN_PA9, 1);
349 at91_set_A_periph(AT91_PIN_PA10, 1);
350 at91_set_A_periph(AT91_PIN_PA11, 1);
356 at91_set_B_periph(AT91_PIN_PA1, 1);
357 /* DAT0, maybe DAT1..DAT3 */
358 at91_set_B_periph(AT91_PIN_PA0, 1);
359 if (data->slot[i].bus_width == 4) {
360 at91_set_B_periph(AT91_PIN_PA5, 1);
361 at91_set_B_periph(AT91_PIN_PA4, 1);
362 at91_set_B_periph(AT91_PIN_PA3, 1);
368 "AT91: SD/MMC slot %d not available\n", i);
376 at91_set_A_periph(AT91_PIN_PA8, 0);
379 platform_device_register(&at91sam9260_mmc_device);
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
387 /* --------------------------------------------------------------------
389 * -------------------------------------------------------------------- */
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
394 #define NAND_BASE AT91_CHIPSELECT_3
396 static struct resource nand_resources[] = {
399 .end = NAND_BASE + SZ_256M - 1,
400 .flags = IORESOURCE_MEM,
403 .start = AT91SAM9260_BASE_ECC,
404 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405 .flags = IORESOURCE_MEM,
409 static struct platform_device at91sam9260_nand_device = {
410 .name = "atmel_nand",
413 .platform_data = &nand_data,
415 .resource = nand_resources,
416 .num_resources = ARRAY_SIZE(nand_resources),
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
426 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
430 if (gpio_is_valid(data->enable_pin))
431 at91_set_gpio_output(data->enable_pin, 1);
434 if (gpio_is_valid(data->rdy_pin))
435 at91_set_gpio_input(data->rdy_pin, 1);
437 /* card detect pin */
438 if (gpio_is_valid(data->det_pin))
439 at91_set_gpio_input(data->det_pin, 1);
442 platform_device_register(&at91sam9260_nand_device);
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
449 /* --------------------------------------------------------------------
451 * -------------------------------------------------------------------- */
454 * Prefer the GPIO code since the TWI controller isn't robust
455 * (gets overruns and underruns under load) and can only issue
456 * repeated STARTs in one scenario (the driver doesn't yet handle them).
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
461 static struct i2c_gpio_platform_data pdata = {
462 .sda_pin = AT91_PIN_PA23,
463 .sda_is_open_drain = 1,
464 .scl_pin = AT91_PIN_PA24,
465 .scl_is_open_drain = 1,
466 .udelay = 2, /* ~100 kHz */
469 static struct platform_device at91sam9260_twi_device = {
472 .dev.platform_data = &pdata,
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
477 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
478 at91_set_multi_drive(AT91_PIN_PA23, 1);
480 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
481 at91_set_multi_drive(AT91_PIN_PA24, 1);
483 i2c_register_board_info(0, devices, nr_devices);
484 platform_device_register(&at91sam9260_twi_device);
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
489 static struct resource twi_resources[] = {
491 .start = AT91SAM9260_BASE_TWI,
492 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493 .flags = IORESOURCE_MEM,
496 .start = AT91SAM9260_ID_TWI,
497 .end = AT91SAM9260_ID_TWI,
498 .flags = IORESOURCE_IRQ,
502 static struct platform_device at91sam9260_twi_device = {
505 .resource = twi_resources,
506 .num_resources = ARRAY_SIZE(twi_resources),
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
511 /* pins used for TWI interface */
512 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
513 at91_set_multi_drive(AT91_PIN_PA23, 1);
515 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
516 at91_set_multi_drive(AT91_PIN_PA24, 1);
518 i2c_register_board_info(0, devices, nr_devices);
519 platform_device_register(&at91sam9260_twi_device);
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
526 /* --------------------------------------------------------------------
528 * -------------------------------------------------------------------- */
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
533 static struct resource spi0_resources[] = {
535 .start = AT91SAM9260_BASE_SPI0,
536 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537 .flags = IORESOURCE_MEM,
540 .start = AT91SAM9260_ID_SPI0,
541 .end = AT91SAM9260_ID_SPI0,
542 .flags = IORESOURCE_IRQ,
546 static struct platform_device at91sam9260_spi0_device = {
550 .dma_mask = &spi_dmamask,
551 .coherent_dma_mask = DMA_BIT_MASK(32),
553 .resource = spi0_resources,
554 .num_resources = ARRAY_SIZE(spi0_resources),
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
559 static struct resource spi1_resources[] = {
561 .start = AT91SAM9260_BASE_SPI1,
562 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563 .flags = IORESOURCE_MEM,
566 .start = AT91SAM9260_ID_SPI1,
567 .end = AT91SAM9260_ID_SPI1,
568 .flags = IORESOURCE_IRQ,
572 static struct platform_device at91sam9260_spi1_device = {
576 .dma_mask = &spi_dmamask,
577 .coherent_dma_mask = DMA_BIT_MASK(32),
579 .resource = spi1_resources,
580 .num_resources = ARRAY_SIZE(spi1_resources),
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
588 unsigned long cs_pin;
589 short enable_spi0 = 0;
590 short enable_spi1 = 0;
592 /* Choose SPI chip-selects */
593 for (i = 0; i < nr_devices; i++) {
594 if (devices[i].controller_data)
595 cs_pin = (unsigned long) devices[i].controller_data;
596 else if (devices[i].bus_num == 0)
597 cs_pin = spi0_standard_cs[devices[i].chip_select];
599 cs_pin = spi1_standard_cs[devices[i].chip_select];
601 if (!gpio_is_valid(cs_pin))
604 if (devices[i].bus_num == 0)
609 /* enable chip-select pin */
610 at91_set_gpio_output(cs_pin, 1);
612 /* pass chip-select pin to driver */
613 devices[i].controller_data = (void *) cs_pin;
616 spi_register_board_info(devices, nr_devices);
618 /* Configure SPI bus(es) */
620 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
621 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
622 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
624 platform_device_register(&at91sam9260_spi0_device);
627 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
628 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
629 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
631 platform_device_register(&at91sam9260_spi1_device);
635 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
639 /* --------------------------------------------------------------------
640 * Timer/Counter blocks
641 * -------------------------------------------------------------------- */
643 #ifdef CONFIG_ATMEL_TCLIB
645 static struct resource tcb0_resources[] = {
647 .start = AT91SAM9260_BASE_TCB0,
648 .end = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
649 .flags = IORESOURCE_MEM,
652 .start = AT91SAM9260_ID_TC0,
653 .end = AT91SAM9260_ID_TC0,
654 .flags = IORESOURCE_IRQ,
657 .start = AT91SAM9260_ID_TC1,
658 .end = AT91SAM9260_ID_TC1,
659 .flags = IORESOURCE_IRQ,
662 .start = AT91SAM9260_ID_TC2,
663 .end = AT91SAM9260_ID_TC2,
664 .flags = IORESOURCE_IRQ,
668 static struct platform_device at91sam9260_tcb0_device = {
671 .resource = tcb0_resources,
672 .num_resources = ARRAY_SIZE(tcb0_resources),
675 static struct resource tcb1_resources[] = {
677 .start = AT91SAM9260_BASE_TCB1,
678 .end = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
679 .flags = IORESOURCE_MEM,
682 .start = AT91SAM9260_ID_TC3,
683 .end = AT91SAM9260_ID_TC3,
684 .flags = IORESOURCE_IRQ,
687 .start = AT91SAM9260_ID_TC4,
688 .end = AT91SAM9260_ID_TC4,
689 .flags = IORESOURCE_IRQ,
692 .start = AT91SAM9260_ID_TC5,
693 .end = AT91SAM9260_ID_TC5,
694 .flags = IORESOURCE_IRQ,
698 static struct platform_device at91sam9260_tcb1_device = {
701 .resource = tcb1_resources,
702 .num_resources = ARRAY_SIZE(tcb1_resources),
705 static void __init at91_add_device_tc(void)
707 platform_device_register(&at91sam9260_tcb0_device);
708 platform_device_register(&at91sam9260_tcb1_device);
711 static void __init at91_add_device_tc(void) { }
715 /* --------------------------------------------------------------------
717 * -------------------------------------------------------------------- */
719 static struct resource rtt_resources[] = {
721 .start = AT91SAM9260_BASE_RTT,
722 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
723 .flags = IORESOURCE_MEM,
725 .flags = IORESOURCE_MEM,
729 static struct platform_device at91sam9260_rtt_device = {
732 .resource = rtt_resources,
736 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
737 static void __init at91_add_device_rtt_rtc(void)
739 at91sam9260_rtt_device.name = "rtc-at91sam9";
741 * The second resource is needed:
742 * GPBR will serve as the storage for RTC time offset
744 at91sam9260_rtt_device.num_resources = 2;
745 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
746 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
747 rtt_resources[1].end = rtt_resources[1].start + 3;
750 static void __init at91_add_device_rtt_rtc(void)
752 /* Only one resource is needed: RTT not used as RTC */
753 at91sam9260_rtt_device.num_resources = 1;
757 static void __init at91_add_device_rtt(void)
759 at91_add_device_rtt_rtc();
760 platform_device_register(&at91sam9260_rtt_device);
764 /* --------------------------------------------------------------------
766 * -------------------------------------------------------------------- */
768 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
769 static struct resource wdt_resources[] = {
771 .start = AT91SAM9260_BASE_WDT,
772 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
773 .flags = IORESOURCE_MEM,
777 static struct platform_device at91sam9260_wdt_device = {
780 .resource = wdt_resources,
781 .num_resources = ARRAY_SIZE(wdt_resources),
784 static void __init at91_add_device_watchdog(void)
786 platform_device_register(&at91sam9260_wdt_device);
789 static void __init at91_add_device_watchdog(void) {}
793 /* --------------------------------------------------------------------
794 * SSC -- Synchronous Serial Controller
795 * -------------------------------------------------------------------- */
797 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
798 static u64 ssc_dmamask = DMA_BIT_MASK(32);
800 static struct resource ssc_resources[] = {
802 .start = AT91SAM9260_BASE_SSC,
803 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
804 .flags = IORESOURCE_MEM,
807 .start = AT91SAM9260_ID_SSC,
808 .end = AT91SAM9260_ID_SSC,
809 .flags = IORESOURCE_IRQ,
813 static struct platform_device at91sam9260_ssc_device = {
817 .dma_mask = &ssc_dmamask,
818 .coherent_dma_mask = DMA_BIT_MASK(32),
820 .resource = ssc_resources,
821 .num_resources = ARRAY_SIZE(ssc_resources),
824 static inline void configure_ssc_pins(unsigned pins)
826 if (pins & ATMEL_SSC_TF)
827 at91_set_A_periph(AT91_PIN_PB17, 1);
828 if (pins & ATMEL_SSC_TK)
829 at91_set_A_periph(AT91_PIN_PB16, 1);
830 if (pins & ATMEL_SSC_TD)
831 at91_set_A_periph(AT91_PIN_PB18, 1);
832 if (pins & ATMEL_SSC_RD)
833 at91_set_A_periph(AT91_PIN_PB19, 1);
834 if (pins & ATMEL_SSC_RK)
835 at91_set_A_periph(AT91_PIN_PB20, 1);
836 if (pins & ATMEL_SSC_RF)
837 at91_set_A_periph(AT91_PIN_PB21, 1);
841 * SSC controllers are accessed through library code, instead of any
842 * kind of all-singing/all-dancing driver. For example one could be
843 * used by a particular I2S audio codec's driver, while another one
844 * on the same system might be used by a custom data capture driver.
846 void __init at91_add_device_ssc(unsigned id, unsigned pins)
848 struct platform_device *pdev;
851 * NOTE: caller is responsible for passing information matching
852 * "pins" to whatever will be using each particular controller.
855 case AT91SAM9260_ID_SSC:
856 pdev = &at91sam9260_ssc_device;
857 configure_ssc_pins(pins);
863 platform_device_register(pdev);
867 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
871 /* --------------------------------------------------------------------
873 * -------------------------------------------------------------------- */
874 #if defined(CONFIG_SERIAL_ATMEL)
875 static struct resource dbgu_resources[] = {
877 .start = AT91SAM9260_BASE_DBGU,
878 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
879 .flags = IORESOURCE_MEM,
882 .start = AT91_ID_SYS,
884 .flags = IORESOURCE_IRQ,
888 static struct atmel_uart_data dbgu_data = {
890 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
893 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
895 static struct platform_device at91sam9260_dbgu_device = {
896 .name = "atmel_usart",
899 .dma_mask = &dbgu_dmamask,
900 .coherent_dma_mask = DMA_BIT_MASK(32),
901 .platform_data = &dbgu_data,
903 .resource = dbgu_resources,
904 .num_resources = ARRAY_SIZE(dbgu_resources),
907 static inline void configure_dbgu_pins(void)
909 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
910 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
913 static struct resource uart0_resources[] = {
915 .start = AT91SAM9260_BASE_US0,
916 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
917 .flags = IORESOURCE_MEM,
920 .start = AT91SAM9260_ID_US0,
921 .end = AT91SAM9260_ID_US0,
922 .flags = IORESOURCE_IRQ,
926 static struct atmel_uart_data uart0_data = {
931 static u64 uart0_dmamask = DMA_BIT_MASK(32);
933 static struct platform_device at91sam9260_uart0_device = {
934 .name = "atmel_usart",
937 .dma_mask = &uart0_dmamask,
938 .coherent_dma_mask = DMA_BIT_MASK(32),
939 .platform_data = &uart0_data,
941 .resource = uart0_resources,
942 .num_resources = ARRAY_SIZE(uart0_resources),
945 static inline void configure_usart0_pins(unsigned pins)
947 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
948 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
950 if (pins & ATMEL_UART_RTS)
951 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
952 if (pins & ATMEL_UART_CTS)
953 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
954 if (pins & ATMEL_UART_DTR)
955 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
956 if (pins & ATMEL_UART_DSR)
957 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
958 if (pins & ATMEL_UART_DCD)
959 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
960 if (pins & ATMEL_UART_RI)
961 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
964 static struct resource uart1_resources[] = {
966 .start = AT91SAM9260_BASE_US1,
967 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
968 .flags = IORESOURCE_MEM,
971 .start = AT91SAM9260_ID_US1,
972 .end = AT91SAM9260_ID_US1,
973 .flags = IORESOURCE_IRQ,
977 static struct atmel_uart_data uart1_data = {
982 static u64 uart1_dmamask = DMA_BIT_MASK(32);
984 static struct platform_device at91sam9260_uart1_device = {
985 .name = "atmel_usart",
988 .dma_mask = &uart1_dmamask,
989 .coherent_dma_mask = DMA_BIT_MASK(32),
990 .platform_data = &uart1_data,
992 .resource = uart1_resources,
993 .num_resources = ARRAY_SIZE(uart1_resources),
996 static inline void configure_usart1_pins(unsigned pins)
998 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
999 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
1001 if (pins & ATMEL_UART_RTS)
1002 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
1003 if (pins & ATMEL_UART_CTS)
1004 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
1007 static struct resource uart2_resources[] = {
1009 .start = AT91SAM9260_BASE_US2,
1010 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
1011 .flags = IORESOURCE_MEM,
1014 .start = AT91SAM9260_ID_US2,
1015 .end = AT91SAM9260_ID_US2,
1016 .flags = IORESOURCE_IRQ,
1020 static struct atmel_uart_data uart2_data = {
1025 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1027 static struct platform_device at91sam9260_uart2_device = {
1028 .name = "atmel_usart",
1031 .dma_mask = &uart2_dmamask,
1032 .coherent_dma_mask = DMA_BIT_MASK(32),
1033 .platform_data = &uart2_data,
1035 .resource = uart2_resources,
1036 .num_resources = ARRAY_SIZE(uart2_resources),
1039 static inline void configure_usart2_pins(unsigned pins)
1041 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
1042 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
1044 if (pins & ATMEL_UART_RTS)
1045 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
1046 if (pins & ATMEL_UART_CTS)
1047 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
1050 static struct resource uart3_resources[] = {
1052 .start = AT91SAM9260_BASE_US3,
1053 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1054 .flags = IORESOURCE_MEM,
1057 .start = AT91SAM9260_ID_US3,
1058 .end = AT91SAM9260_ID_US3,
1059 .flags = IORESOURCE_IRQ,
1063 static struct atmel_uart_data uart3_data = {
1068 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1070 static struct platform_device at91sam9260_uart3_device = {
1071 .name = "atmel_usart",
1074 .dma_mask = &uart3_dmamask,
1075 .coherent_dma_mask = DMA_BIT_MASK(32),
1076 .platform_data = &uart3_data,
1078 .resource = uart3_resources,
1079 .num_resources = ARRAY_SIZE(uart3_resources),
1082 static inline void configure_usart3_pins(unsigned pins)
1084 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1085 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1087 if (pins & ATMEL_UART_RTS)
1088 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1089 if (pins & ATMEL_UART_CTS)
1090 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1093 static struct resource uart4_resources[] = {
1095 .start = AT91SAM9260_BASE_US4,
1096 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1097 .flags = IORESOURCE_MEM,
1100 .start = AT91SAM9260_ID_US4,
1101 .end = AT91SAM9260_ID_US4,
1102 .flags = IORESOURCE_IRQ,
1106 static struct atmel_uart_data uart4_data = {
1111 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1113 static struct platform_device at91sam9260_uart4_device = {
1114 .name = "atmel_usart",
1117 .dma_mask = &uart4_dmamask,
1118 .coherent_dma_mask = DMA_BIT_MASK(32),
1119 .platform_data = &uart4_data,
1121 .resource = uart4_resources,
1122 .num_resources = ARRAY_SIZE(uart4_resources),
1125 static inline void configure_usart4_pins(void)
1127 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1128 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1131 static struct resource uart5_resources[] = {
1133 .start = AT91SAM9260_BASE_US5,
1134 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1135 .flags = IORESOURCE_MEM,
1138 .start = AT91SAM9260_ID_US5,
1139 .end = AT91SAM9260_ID_US5,
1140 .flags = IORESOURCE_IRQ,
1144 static struct atmel_uart_data uart5_data = {
1149 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1151 static struct platform_device at91sam9260_uart5_device = {
1152 .name = "atmel_usart",
1155 .dma_mask = &uart5_dmamask,
1156 .coherent_dma_mask = DMA_BIT_MASK(32),
1157 .platform_data = &uart5_data,
1159 .resource = uart5_resources,
1160 .num_resources = ARRAY_SIZE(uart5_resources),
1163 static inline void configure_usart5_pins(void)
1165 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1166 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1169 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1171 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1173 struct platform_device *pdev;
1174 struct atmel_uart_data *pdata;
1178 pdev = &at91sam9260_dbgu_device;
1179 configure_dbgu_pins();
1181 case AT91SAM9260_ID_US0:
1182 pdev = &at91sam9260_uart0_device;
1183 configure_usart0_pins(pins);
1185 case AT91SAM9260_ID_US1:
1186 pdev = &at91sam9260_uart1_device;
1187 configure_usart1_pins(pins);
1189 case AT91SAM9260_ID_US2:
1190 pdev = &at91sam9260_uart2_device;
1191 configure_usart2_pins(pins);
1193 case AT91SAM9260_ID_US3:
1194 pdev = &at91sam9260_uart3_device;
1195 configure_usart3_pins(pins);
1197 case AT91SAM9260_ID_US4:
1198 pdev = &at91sam9260_uart4_device;
1199 configure_usart4_pins();
1201 case AT91SAM9260_ID_US5:
1202 pdev = &at91sam9260_uart5_device;
1203 configure_usart5_pins();
1208 pdata = pdev->dev.platform_data;
1209 pdata->num = portnr; /* update to mapped ID */
1211 if (portnr < ATMEL_MAX_UART)
1212 at91_uarts[portnr] = pdev;
1215 void __init at91_add_device_serial(void)
1219 for (i = 0; i < ATMEL_MAX_UART; i++) {
1221 platform_device_register(at91_uarts[i]);
1225 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1226 void __init at91_add_device_serial(void) {}
1229 /* --------------------------------------------------------------------
1231 * -------------------------------------------------------------------- */
1233 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1234 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1236 static struct at91_cf_data cf0_data;
1238 static struct resource cf0_resources[] = {
1240 .start = AT91_CHIPSELECT_4,
1241 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1242 .flags = IORESOURCE_MEM,
1246 static struct platform_device cf0_device = {
1249 .platform_data = &cf0_data,
1251 .resource = cf0_resources,
1252 .num_resources = ARRAY_SIZE(cf0_resources),
1255 static struct at91_cf_data cf1_data;
1257 static struct resource cf1_resources[] = {
1259 .start = AT91_CHIPSELECT_5,
1260 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1261 .flags = IORESOURCE_MEM,
1265 static struct platform_device cf1_device = {
1268 .platform_data = &cf1_data,
1270 .resource = cf1_resources,
1271 .num_resources = ARRAY_SIZE(cf1_resources),
1274 void __init at91_add_device_cf(struct at91_cf_data *data)
1276 struct platform_device *pdev;
1282 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1284 switch (data->chipselect) {
1286 at91_set_multi_drive(AT91_PIN_PC8, 0);
1287 at91_set_A_periph(AT91_PIN_PC8, 0);
1288 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1293 at91_set_multi_drive(AT91_PIN_PC9, 0);
1294 at91_set_A_periph(AT91_PIN_PC9, 0);
1295 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1300 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1305 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1307 if (gpio_is_valid(data->rst_pin)) {
1308 at91_set_multi_drive(data->rst_pin, 0);
1309 at91_set_gpio_output(data->rst_pin, 1);
1312 if (gpio_is_valid(data->irq_pin)) {
1313 at91_set_gpio_input(data->irq_pin, 0);
1314 at91_set_deglitch(data->irq_pin, 1);
1317 if (gpio_is_valid(data->det_pin)) {
1318 at91_set_gpio_input(data->det_pin, 0);
1319 at91_set_deglitch(data->det_pin, 1);
1322 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1323 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1324 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1325 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1327 if (data->flags & AT91_CF_TRUE_IDE)
1328 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1329 pdev->name = "pata_at91";
1331 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1334 pdev->name = "at91_cf";
1336 platform_device_register(pdev);
1340 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1343 /* -------------------------------------------------------------------- */
1345 * These devices are always present and don't need any board-specific
1348 static int __init at91_add_standard_devices(void)
1350 if (of_have_populated_dt())
1353 at91_add_device_rtt();
1354 at91_add_device_watchdog();
1355 at91_add_device_tc();
1359 arch_initcall(at91_add_standard_devices);