arch/arm/mach-at91/at91sam9260_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9260_devices.c
   3  *
   4  *  Copyright (C) 2006 Atmel
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  */
  12 #include <asm/mach/arch.h>
  13 #include <asm/mach/map.h>
  14
  15 #include <linux/dma-mapping.h>
  16 #include <linux/gpio.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/i2c-gpio.h>
  19
  20 #include <linux/platform_data/at91_adc.h>
  21
  22 #include <mach/board.h>
  23 #include <mach/cpu.h>
  24 #include <mach/at91sam9260.h>
  25 #include <mach/at91sam9260_matrix.h>
  26 #include <mach/at91_matrix.h>
  27 #include <mach/at91sam9_smc.h>
  28 #include <mach/at91_adc.h>
  29
  30 #include "generic.h"
  31
  32
  33 /* --------------------------------------------------------------------
  34  *  USB Host
  35  * -------------------------------------------------------------------- */
  36
  37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  39 static struct at91_usbh_data usbh_data;
  40
  41 static struct resource usbh_resources[] = {
  42         [0] = {
  43                 .start  = AT91SAM9260_UHP_BASE,
  44                 .end    = AT91SAM9260_UHP_BASE + SZ_1M - 1,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
  49                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device at91_usbh_device = {
  55         .name           = "at91_ohci",
  56         .id             = -1,
  57         .dev            = {
  58                                 .dma_mask               = &ohci_dmamask,
  59                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  60                                 .platform_data          = &usbh_data,
  61         },
  62         .resource       = usbh_resources,
  63         .num_resources  = ARRAY_SIZE(usbh_resources),
  64 };
  65
  66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  67 {
  68         int i;
  69
  70         if (!data)
  71                 return;
  72
  73         /* Enable overcurrent notification */
  74         for (i = 0; i < data->ports; i++) {
  75                 if (data->overcurrent_pin[i])
  76                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  77         }
  78
  79         usbh_data = *data;
  80         platform_device_register(&at91_usbh_device);
  81 }
  82 #else
  83 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  84 #endif
  85
  86
  87 /* --------------------------------------------------------------------
  88  *  USB Device (Gadget)
  89  * -------------------------------------------------------------------- */
  90
  91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
  92 static struct at91_udc_data udc_data;
  93
  94 static struct resource udc_resources[] = {
  95         [0] = {
  96                 .start  = AT91SAM9260_BASE_UDP,
  97                 .end    = AT91SAM9260_BASE_UDP + SZ_16K - 1,
  98                 .flags  = IORESOURCE_MEM,
  99         },
 100         [1] = {
 101                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
 102                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP,
 103                 .flags  = IORESOURCE_IRQ,
 104         },
 105 };
 106
 107 static struct platform_device at91_udc_device = {
 108         .name           = "at91_udc",
 109         .id             = -1,
 110         .dev            = {
 111                                 .platform_data          = &udc_data,
 112         },
 113         .resource       = udc_resources,
 114         .num_resources  = ARRAY_SIZE(udc_resources),
 115 };
 116
 117 void __init at91_add_device_udc(struct at91_udc_data *data)
 118 {
 119         if (!data)
 120                 return;
 121
 122         if (gpio_is_valid(data->vbus_pin)) {
 123                 at91_set_gpio_input(data->vbus_pin, 0);
 124                 at91_set_deglitch(data->vbus_pin, 1);
 125         }
 126
 127         /* Pullup pin is handled internally by USB device peripheral */
 128
 129         udc_data = *data;
 130         platform_device_register(&at91_udc_device);
 131 }
 132 #else
 133 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 134 #endif
 135
 136
 137 /* --------------------------------------------------------------------
 138  *  Ethernet
 139  * -------------------------------------------------------------------- */
 140
 141 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
 142 static u64 eth_dmamask = DMA_BIT_MASK(32);
 143 static struct macb_platform_data eth_data;
 144
 145 static struct resource eth_resources[] = {
 146         [0] = {
 147                 .start  = AT91SAM9260_BASE_EMAC,
 148                 .end    = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
 149                 .flags  = IORESOURCE_MEM,
 150         },
 151         [1] = {
 152                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
 153                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC,
 154                 .flags  = IORESOURCE_IRQ,
 155         },
 156 };
 157
 158 static struct platform_device at91sam9260_eth_device = {
 159         .name           = "macb",
 160         .id             = -1,
 161         .dev            = {
 162                                 .dma_mask               = &eth_dmamask,
 163                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 164                                 .platform_data          = &eth_data,
 165         },
 166         .resource       = eth_resources,
 167         .num_resources  = ARRAY_SIZE(eth_resources),
 168 };
 169
 170 void __init at91_add_device_eth(struct macb_platform_data *data)
 171 {
 172         if (!data)
 173                 return;
 174
 175         if (gpio_is_valid(data->phy_irq_pin)) {
 176                 at91_set_gpio_input(data->phy_irq_pin, 0);
 177                 at91_set_deglitch(data->phy_irq_pin, 1);
 178         }
 179
 180         /* Pins used for MII and RMII */
 181         at91_set_A_periph(AT91_PIN_PA19, 0);    /* ETXCK_EREFCK */
 182         at91_set_A_periph(AT91_PIN_PA17, 0);    /* ERXDV */
 183         at91_set_A_periph(AT91_PIN_PA14, 0);    /* ERX0 */
 184         at91_set_A_periph(AT91_PIN_PA15, 0);    /* ERX1 */
 185         at91_set_A_periph(AT91_PIN_PA18, 0);    /* ERXER */
 186         at91_set_A_periph(AT91_PIN_PA16, 0);    /* ETXEN */
 187         at91_set_A_periph(AT91_PIN_PA12, 0);    /* ETX0 */
 188         at91_set_A_periph(AT91_PIN_PA13, 0);    /* ETX1 */
 189         at91_set_A_periph(AT91_PIN_PA21, 0);    /* EMDIO */
 190         at91_set_A_periph(AT91_PIN_PA20, 0);    /* EMDC */
 191
 192         if (!data->is_rmii) {
 193                 at91_set_B_periph(AT91_PIN_PA28, 0);    /* ECRS */
 194                 at91_set_B_periph(AT91_PIN_PA29, 0);    /* ECOL */
 195                 at91_set_B_periph(AT91_PIN_PA25, 0);    /* ERX2 */
 196                 at91_set_B_periph(AT91_PIN_PA26, 0);    /* ERX3 */
 197                 at91_set_B_periph(AT91_PIN_PA27, 0);    /* ERXCK */
 198                 at91_set_B_periph(AT91_PIN_PA23, 0);    /* ETX2 */
 199                 at91_set_B_periph(AT91_PIN_PA24, 0);    /* ETX3 */
 200                 at91_set_B_periph(AT91_PIN_PA22, 0);    /* ETXER */
 201         }
 202
 203         eth_data = *data;
 204         platform_device_register(&at91sam9260_eth_device);
 205 }
 206 #else
 207 void __init at91_add_device_eth(struct macb_platform_data *data) {}
 208 #endif
 209
 210
 211 /* --------------------------------------------------------------------
 212  *  MMC / SD
 213  * -------------------------------------------------------------------- */
 214
 215 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 216 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 217 static struct at91_mmc_data mmc_data;
 218
 219 static struct resource mmc_resources[] = {
 220         [0] = {
 221                 .start  = AT91SAM9260_BASE_MCI,
 222                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 223                 .flags  = IORESOURCE_MEM,
 224         },
 225         [1] = {
 226                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 227                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 228                 .flags  = IORESOURCE_IRQ,
 229         },
 230 };
 231
 232 static struct platform_device at91sam9260_mmc_device = {
 233         .name           = "at91_mci",
 234         .id             = -1,
 235         .dev            = {
 236                                 .dma_mask               = &mmc_dmamask,
 237                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 238                                 .platform_data          = &mmc_data,
 239         },
 240         .resource       = mmc_resources,
 241         .num_resources  = ARRAY_SIZE(mmc_resources),
 242 };
 243
 244 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 245 {
 246         if (!data)
 247                 return;
 248
 249         /* input/irq */
 250         if (gpio_is_valid(data->det_pin)) {
 251                 at91_set_gpio_input(data->det_pin, 1);
 252                 at91_set_deglitch(data->det_pin, 1);
 253         }
 254         if (gpio_is_valid(data->wp_pin))
 255                 at91_set_gpio_input(data->wp_pin, 1);
 256         if (gpio_is_valid(data->vcc_pin))
 257                 at91_set_gpio_output(data->vcc_pin, 0);
 258
 259         /* CLK */
 260         at91_set_A_periph(AT91_PIN_PA8, 0);
 261
 262         if (data->slot_b) {
 263                 /* CMD */
 264                 at91_set_B_periph(AT91_PIN_PA1, 1);
 265
 266                 /* DAT0, maybe DAT1..DAT3 */
 267                 at91_set_B_periph(AT91_PIN_PA0, 1);
 268                 if (data->wire4) {
 269                         at91_set_B_periph(AT91_PIN_PA5, 1);
 270                         at91_set_B_periph(AT91_PIN_PA4, 1);
 271                         at91_set_B_periph(AT91_PIN_PA3, 1);
 272                 }
 273         } else {
 274                 /* CMD */
 275                 at91_set_A_periph(AT91_PIN_PA7, 1);
 276
 277                 /* DAT0, maybe DAT1..DAT3 */
 278                 at91_set_A_periph(AT91_PIN_PA6, 1);
 279                 if (data->wire4) {
 280                         at91_set_A_periph(AT91_PIN_PA9, 1);
 281                         at91_set_A_periph(AT91_PIN_PA10, 1);
 282                         at91_set_A_periph(AT91_PIN_PA11, 1);
 283                 }
 284         }
 285
 286         mmc_data = *data;
 287         platform_device_register(&at91sam9260_mmc_device);
 288 }
 289 #else
 290 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 291 #endif
 292
 293 /* --------------------------------------------------------------------
 294  *  MMC / SD Slot for Atmel MCI Driver
 295  * -------------------------------------------------------------------- */
 296
 297 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
 298 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 299 static struct mci_platform_data mmc_data;
 300
 301 static struct resource mmc_resources[] = {
 302         [0] = {
 303                 .start  = AT91SAM9260_BASE_MCI,
 304                 .end    = AT91SAM9260_BASE_MCI + SZ_16K - 1,
 305                 .flags  = IORESOURCE_MEM,
 306         },
 307         [1] = {
 308                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 309                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI,
 310                 .flags  = IORESOURCE_IRQ,
 311         },
 312 };
 313
 314 static struct platform_device at91sam9260_mmc_device = {
 315         .name           = "atmel_mci",
 316         .id             = -1,
 317         .dev            = {
 318                                 .dma_mask               = &mmc_dmamask,
 319                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 320                                 .platform_data          = &mmc_data,
 321         },
 322         .resource       = mmc_resources,
 323         .num_resources  = ARRAY_SIZE(mmc_resources),
 324 };
 325
 326 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
 327 {
 328         unsigned int i;
 329         unsigned int slot_count = 0;
 330
 331         if (!data)
 332                 return;
 333
 334         for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
 335                 if (data->slot[i].bus_width) {
 336                         /* input/irq */
 337                         if (gpio_is_valid(data->slot[i].detect_pin)) {
 338                                 at91_set_gpio_input(data->slot[i].detect_pin, 1);
 339                                 at91_set_deglitch(data->slot[i].detect_pin, 1);
 340                         }
 341                         if (gpio_is_valid(data->slot[i].wp_pin))
 342                                 at91_set_gpio_input(data->slot[i].wp_pin, 1);
 343
 344                         switch (i) {
 345                         case 0:
 346                                 /* CMD */
 347                                 at91_set_A_periph(AT91_PIN_PA7, 1);
 348                                 /* DAT0, maybe DAT1..DAT3 */
 349                                 at91_set_A_periph(AT91_PIN_PA6, 1);
 350                                 if (data->slot[i].bus_width == 4) {
 351                                         at91_set_A_periph(AT91_PIN_PA9, 1);
 352                                         at91_set_A_periph(AT91_PIN_PA10, 1);
 353                                         at91_set_A_periph(AT91_PIN_PA11, 1);
 354                                 }
 355                                 slot_count++;
 356                                 break;
 357                         case 1:
 358                                 /* CMD */
 359                                 at91_set_B_periph(AT91_PIN_PA1, 1);
 360                                 /* DAT0, maybe DAT1..DAT3 */
 361                                 at91_set_B_periph(AT91_PIN_PA0, 1);
 362                                 if (data->slot[i].bus_width == 4) {
 363                                         at91_set_B_periph(AT91_PIN_PA5, 1);
 364                                         at91_set_B_periph(AT91_PIN_PA4, 1);
 365                                         at91_set_B_periph(AT91_PIN_PA3, 1);
 366                                 }
 367                                 slot_count++;
 368                                 break;
 369                         default:
 370                                 printk(KERN_ERR
 371                                         "AT91: SD/MMC slot %d not available\n", i);
 372                                 break;
 373                         }
 374                 }
 375         }
 376
 377         if (slot_count) {
 378                 /* CLK */
 379                 at91_set_A_periph(AT91_PIN_PA8, 0);
 380
 381                 mmc_data = *data;
 382                 platform_device_register(&at91sam9260_mmc_device);
 383         }
 384 }
 385 #else
 386 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
 387 #endif
 388
 389
 390 /* --------------------------------------------------------------------
 391  *  NAND / SmartMedia
 392  * -------------------------------------------------------------------- */
 393
 394 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 395 static struct atmel_nand_data nand_data;
 396
 397 #define NAND_BASE       AT91_CHIPSELECT_3
 398
 399 static struct resource nand_resources[] = {
 400         [0] = {
 401                 .start  = NAND_BASE,
 402                 .end    = NAND_BASE + SZ_256M - 1,
 403                 .flags  = IORESOURCE_MEM,
 404         },
 405         [1] = {
 406                 .start  = AT91SAM9260_BASE_ECC,
 407                 .end    = AT91SAM9260_BASE_ECC + SZ_512 - 1,
 408                 .flags  = IORESOURCE_MEM,
 409         }
 410 };
 411
 412 static struct platform_device at91sam9260_nand_device = {
 413         .name           = "atmel_nand",
 414         .id             = -1,
 415         .dev            = {
 416                                 .platform_data  = &nand_data,
 417         },
 418         .resource       = nand_resources,
 419         .num_resources  = ARRAY_SIZE(nand_resources),
 420 };
 421
 422 void __init at91_add_device_nand(struct atmel_nand_data *data)
 423 {
 424         unsigned long csa;
 425
 426         if (!data)
 427                 return;
 428
 429         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 430         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 431
 432         /* enable pin */
 433         if (gpio_is_valid(data->enable_pin))
 434                 at91_set_gpio_output(data->enable_pin, 1);
 435
 436         /* ready/busy pin */
 437         if (gpio_is_valid(data->rdy_pin))
 438                 at91_set_gpio_input(data->rdy_pin, 1);
 439
 440         /* card detect pin */
 441         if (gpio_is_valid(data->det_pin))
 442                 at91_set_gpio_input(data->det_pin, 1);
 443
 444         nand_data = *data;
 445         platform_device_register(&at91sam9260_nand_device);
 446 }
 447 #else
 448 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 449 #endif
 450
 451
 452 /* --------------------------------------------------------------------
 453  *  TWI (i2c)
 454  * -------------------------------------------------------------------- */
 455
 456 /*
 457  * Prefer the GPIO code since the TWI controller isn't robust
 458  * (gets overruns and underruns under load) and can only issue
 459  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 460  */
 461
 462 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 463
 464 static struct i2c_gpio_platform_data pdata = {
 465         .sda_pin                = AT91_PIN_PA23,
 466         .sda_is_open_drain      = 1,
 467         .scl_pin                = AT91_PIN_PA24,
 468         .scl_is_open_drain      = 1,
 469         .udelay                 = 2,            /* ~100 kHz */
 470 };
 471
 472 static struct platform_device at91sam9260_twi_device = {
 473         .name                   = "i2c-gpio",
 474         .id                     = -1,
 475         .dev.platform_data      = &pdata,
 476 };
 477
 478 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 479 {
 480         at91_set_GPIO_periph(AT91_PIN_PA23, 1);         /* TWD (SDA) */
 481         at91_set_multi_drive(AT91_PIN_PA23, 1);
 482
 483         at91_set_GPIO_periph(AT91_PIN_PA24, 1);         /* TWCK (SCL) */
 484         at91_set_multi_drive(AT91_PIN_PA24, 1);
 485
 486         i2c_register_board_info(0, devices, nr_devices);
 487         platform_device_register(&at91sam9260_twi_device);
 488 }
 489
 490 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 491
 492 static struct resource twi_resources[] = {
 493         [0] = {
 494                 .start  = AT91SAM9260_BASE_TWI,
 495                 .end    = AT91SAM9260_BASE_TWI + SZ_16K - 1,
 496                 .flags  = IORESOURCE_MEM,
 497         },
 498         [1] = {
 499                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
 500                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI,
 501                 .flags  = IORESOURCE_IRQ,
 502         },
 503 };
 504
 505 static struct platform_device at91sam9260_twi_device = {
 506         .name           = "at91_i2c",
 507         .id             = -1,
 508         .resource       = twi_resources,
 509         .num_resources  = ARRAY_SIZE(twi_resources),
 510 };
 511
 512 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 513 {
 514         /* pins used for TWI interface */
 515         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 516         at91_set_multi_drive(AT91_PIN_PA23, 1);
 517
 518         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 519         at91_set_multi_drive(AT91_PIN_PA24, 1);
 520
 521         i2c_register_board_info(0, devices, nr_devices);
 522         platform_device_register(&at91sam9260_twi_device);
 523 }
 524 #else
 525 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 526 #endif
 527
 528
 529 /* --------------------------------------------------------------------
 530  *  SPI
 531  * -------------------------------------------------------------------- */
 532
 533 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 534 static u64 spi_dmamask = DMA_BIT_MASK(32);
 535
 536 static struct resource spi0_resources[] = {
 537         [0] = {
 538                 .start  = AT91SAM9260_BASE_SPI0,
 539                 .end    = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
 540                 .flags  = IORESOURCE_MEM,
 541         },
 542         [1] = {
 543                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
 544                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0,
 545                 .flags  = IORESOURCE_IRQ,
 546         },
 547 };
 548
 549 static struct platform_device at91sam9260_spi0_device = {
 550         .name           = "atmel_spi",
 551         .id             = 0,
 552         .dev            = {
 553                                 .dma_mask               = &spi_dmamask,
 554                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 555         },
 556         .resource       = spi0_resources,
 557         .num_resources  = ARRAY_SIZE(spi0_resources),
 558 };
 559
 560 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
 561
 562 static struct resource spi1_resources[] = {
 563         [0] = {
 564                 .start  = AT91SAM9260_BASE_SPI1,
 565                 .end    = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
 566                 .flags  = IORESOURCE_MEM,
 567         },
 568         [1] = {
 569                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
 570                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1,
 571                 .flags  = IORESOURCE_IRQ,
 572         },
 573 };
 574
 575 static struct platform_device at91sam9260_spi1_device = {
 576         .name           = "atmel_spi",
 577         .id             = 1,
 578         .dev            = {
 579                                 .dma_mask               = &spi_dmamask,
 580                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 581         },
 582         .resource       = spi1_resources,
 583         .num_resources  = ARRAY_SIZE(spi1_resources),
 584 };
 585
 586 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
 587
 588 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 589 {
 590         int i;
 591         unsigned long cs_pin;
 592         short enable_spi0 = 0;
 593         short enable_spi1 = 0;
 594
 595         /* Choose SPI chip-selects */
 596         for (i = 0; i < nr_devices; i++) {
 597                 if (devices[i].controller_data)
 598                         cs_pin = (unsigned long) devices[i].controller_data;
 599                 else if (devices[i].bus_num == 0)
 600                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 601                 else
 602                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 603
 604                 if (!gpio_is_valid(cs_pin))
 605                         continue;
 606
 607                 if (devices[i].bus_num == 0)
 608                         enable_spi0 = 1;
 609                 else
 610                         enable_spi1 = 1;
 611
 612                 /* enable chip-select pin */
 613                 at91_set_gpio_output(cs_pin, 1);
 614
 615                 /* pass chip-select pin to driver */
 616                 devices[i].controller_data = (void *) cs_pin;
 617         }
 618
 619         spi_register_board_info(devices, nr_devices);
 620
 621         /* Configure SPI bus(es) */
 622         if (enable_spi0) {
 623                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 624                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 625                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI1_SPCK */
 626
 627                 platform_device_register(&at91sam9260_spi0_device);
 628         }
 629         if (enable_spi1) {
 630                 at91_set_A_periph(AT91_PIN_PB0, 0);     /* SPI1_MISO */
 631                 at91_set_A_periph(AT91_PIN_PB1, 0);     /* SPI1_MOSI */
 632                 at91_set_A_periph(AT91_PIN_PB2, 0);     /* SPI1_SPCK */
 633
 634                 platform_device_register(&at91sam9260_spi1_device);
 635         }
 636 }
 637 #else
 638 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 639 #endif
 640
 641
 642 /* --------------------------------------------------------------------
 643  *  Timer/Counter blocks
 644  * -------------------------------------------------------------------- */
 645
 646 #ifdef CONFIG_ATMEL_TCLIB
 647
 648 static struct resource tcb0_resources[] = {
 649         [0] = {
 650                 .start  = AT91SAM9260_BASE_TCB0,
 651                 .end    = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
 652                 .flags  = IORESOURCE_MEM,
 653         },
 654         [1] = {
 655                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
 656                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0,
 657                 .flags  = IORESOURCE_IRQ,
 658         },
 659         [2] = {
 660                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
 661                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1,
 662                 .flags  = IORESOURCE_IRQ,
 663         },
 664         [3] = {
 665                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
 666                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2,
 667                 .flags  = IORESOURCE_IRQ,
 668         },
 669 };
 670
 671 static struct platform_device at91sam9260_tcb0_device = {
 672         .name           = "atmel_tcb",
 673         .id             = 0,
 674         .resource       = tcb0_resources,
 675         .num_resources  = ARRAY_SIZE(tcb0_resources),
 676 };
 677
 678 static struct resource tcb1_resources[] = {
 679         [0] = {
 680                 .start  = AT91SAM9260_BASE_TCB1,
 681                 .end    = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
 682                 .flags  = IORESOURCE_MEM,
 683         },
 684         [1] = {
 685                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
 686                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3,
 687                 .flags  = IORESOURCE_IRQ,
 688         },
 689         [2] = {
 690                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
 691                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4,
 692                 .flags  = IORESOURCE_IRQ,
 693         },
 694         [3] = {
 695                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
 696                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5,
 697                 .flags  = IORESOURCE_IRQ,
 698         },
 699 };
 700
 701 static struct platform_device at91sam9260_tcb1_device = {
 702         .name           = "atmel_tcb",
 703         .id             = 1,
 704         .resource       = tcb1_resources,
 705         .num_resources  = ARRAY_SIZE(tcb1_resources),
 706 };
 707
 708 static void __init at91_add_device_tc(void)
 709 {
 710         platform_device_register(&at91sam9260_tcb0_device);
 711         platform_device_register(&at91sam9260_tcb1_device);
 712 }
 713 #else
 714 static void __init at91_add_device_tc(void) { }
 715 #endif
 716
 717
 718 /* --------------------------------------------------------------------
 719  *  RTT
 720  * -------------------------------------------------------------------- */
 721
 722 static struct resource rtt_resources[] = {
 723         {
 724                 .start  = AT91SAM9260_BASE_RTT,
 725                 .end    = AT91SAM9260_BASE_RTT + SZ_16 - 1,
 726                 .flags  = IORESOURCE_MEM,
 727         }, {
 728                 .flags  = IORESOURCE_MEM,
 729         }, {
 730                 .flags  = IORESOURCE_IRQ,
 731         },
 732 };
 733
 734 static struct platform_device at91sam9260_rtt_device = {
 735         .name           = "at91_rtt",
 736         .id             = 0,
 737         .resource       = rtt_resources,
 738 };
 739
 740
 741 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
 742 static void __init at91_add_device_rtt_rtc(void)
 743 {
 744         at91sam9260_rtt_device.name = "rtc-at91sam9";
 745         /*
 746          * The second resource is needed:
 747          * GPBR will serve as the storage for RTC time offset
 748          */
 749         at91sam9260_rtt_device.num_resources = 3;
 750         rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
 751                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 752         rtt_resources[1].end = rtt_resources[1].start + 3;
 753         rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
 754         rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 755 }
 756 #else
 757 static void __init at91_add_device_rtt_rtc(void)
 758 {
 759         /* Only one resource is needed: RTT not used as RTC */
 760         at91sam9260_rtt_device.num_resources = 1;
 761 }
 762 #endif
 763
 764 static void __init at91_add_device_rtt(void)
 765 {
 766         at91_add_device_rtt_rtc();
 767         platform_device_register(&at91sam9260_rtt_device);
 768 }
 769
 770
 771 /* --------------------------------------------------------------------
 772  *  Watchdog
 773  * -------------------------------------------------------------------- */
 774
 775 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 776 static struct resource wdt_resources[] = {
 777         {
 778                 .start  = AT91SAM9260_BASE_WDT,
 779                 .end    = AT91SAM9260_BASE_WDT + SZ_16 - 1,
 780                 .flags  = IORESOURCE_MEM,
 781         }
 782 };
 783
 784 static struct platform_device at91sam9260_wdt_device = {
 785         .name           = "at91_wdt",
 786         .id             = -1,
 787         .resource       = wdt_resources,
 788         .num_resources  = ARRAY_SIZE(wdt_resources),
 789 };
 790
 791 static void __init at91_add_device_watchdog(void)
 792 {
 793         platform_device_register(&at91sam9260_wdt_device);
 794 }
 795 #else
 796 static void __init at91_add_device_watchdog(void) {}
 797 #endif
 798
 799
 800 /* --------------------------------------------------------------------
 801  *  SSC -- Synchronous Serial Controller
 802  * -------------------------------------------------------------------- */
 803
 804 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 805 static u64 ssc_dmamask = DMA_BIT_MASK(32);
 806
 807 static struct resource ssc_resources[] = {
 808         [0] = {
 809                 .start  = AT91SAM9260_BASE_SSC,
 810                 .end    = AT91SAM9260_BASE_SSC + SZ_16K - 1,
 811                 .flags  = IORESOURCE_MEM,
 812         },
 813         [1] = {
 814                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
 815                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC,
 816                 .flags  = IORESOURCE_IRQ,
 817         },
 818 };
 819
 820 static struct platform_device at91sam9260_ssc_device = {
 821         .name   = "ssc",
 822         .id     = 0,
 823         .dev    = {
 824                 .dma_mask               = &ssc_dmamask,
 825                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 826         },
 827         .resource       = ssc_resources,
 828         .num_resources  = ARRAY_SIZE(ssc_resources),
 829 };
 830
 831 static inline void configure_ssc_pins(unsigned pins)
 832 {
 833         if (pins & ATMEL_SSC_TF)
 834                 at91_set_A_periph(AT91_PIN_PB17, 1);
 835         if (pins & ATMEL_SSC_TK)
 836                 at91_set_A_periph(AT91_PIN_PB16, 1);
 837         if (pins & ATMEL_SSC_TD)
 838                 at91_set_A_periph(AT91_PIN_PB18, 1);
 839         if (pins & ATMEL_SSC_RD)
 840                 at91_set_A_periph(AT91_PIN_PB19, 1);
 841         if (pins & ATMEL_SSC_RK)
 842                 at91_set_A_periph(AT91_PIN_PB20, 1);
 843         if (pins & ATMEL_SSC_RF)
 844                 at91_set_A_periph(AT91_PIN_PB21, 1);
 845 }
 846
 847 /*
 848  * SSC controllers are accessed through library code, instead of any
 849  * kind of all-singing/all-dancing driver.  For example one could be
 850  * used by a particular I2S audio codec's driver, while another one
 851  * on the same system might be used by a custom data capture driver.
 852  */
 853 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 854 {
 855         struct platform_device *pdev;
 856
 857         /*
 858          * NOTE: caller is responsible for passing information matching
 859          * "pins" to whatever will be using each particular controller.
 860          */
 861         switch (id) {
 862         case AT91SAM9260_ID_SSC:
 863                 pdev = &at91sam9260_ssc_device;
 864                 configure_ssc_pins(pins);
 865                 break;
 866         default:
 867                 return;
 868         }
 869
 870         platform_device_register(pdev);
 871 }
 872
 873 #else
 874 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 875 #endif
 876
 877
 878 /* --------------------------------------------------------------------
 879  *  UART
 880  * -------------------------------------------------------------------- */
 881 #if defined(CONFIG_SERIAL_ATMEL)
 882 static struct resource dbgu_resources[] = {
 883         [0] = {
 884                 .start  = AT91SAM9260_BASE_DBGU,
 885                 .end    = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
 886                 .flags  = IORESOURCE_MEM,
 887         },
 888         [1] = {
 889                 .start  = NR_IRQS_LEGACY + AT91_ID_SYS,
 890                 .end    = NR_IRQS_LEGACY + AT91_ID_SYS,
 891                 .flags  = IORESOURCE_IRQ,
 892         },
 893 };
 894
 895 static struct atmel_uart_data dbgu_data = {
 896         .use_dma_tx     = 0,
 897         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 898 };
 899
 900 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 901
 902 static struct platform_device at91sam9260_dbgu_device = {
 903         .name           = "atmel_usart",
 904         .id             = 0,
 905         .dev            = {
 906                                 .dma_mask               = &dbgu_dmamask,
 907                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 908                                 .platform_data          = &dbgu_data,
 909         },
 910         .resource       = dbgu_resources,
 911         .num_resources  = ARRAY_SIZE(dbgu_resources),
 912 };
 913
 914 static inline void configure_dbgu_pins(void)
 915 {
 916         at91_set_A_periph(AT91_PIN_PB14, 0);            /* DRXD */
 917         at91_set_A_periph(AT91_PIN_PB15, 1);            /* DTXD */
 918 }
 919
 920 static struct resource uart0_resources[] = {
 921         [0] = {
 922                 .start  = AT91SAM9260_BASE_US0,
 923                 .end    = AT91SAM9260_BASE_US0 + SZ_16K - 1,
 924                 .flags  = IORESOURCE_MEM,
 925         },
 926         [1] = {
 927                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
 928                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US0,
 929                 .flags  = IORESOURCE_IRQ,
 930         },
 931 };
 932
 933 static struct atmel_uart_data uart0_data = {
 934         .use_dma_tx     = 1,
 935         .use_dma_rx     = 1,
 936 };
 937
 938 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 939
 940 static struct platform_device at91sam9260_uart0_device = {
 941         .name           = "atmel_usart",
 942         .id             = 1,
 943         .dev            = {
 944                                 .dma_mask               = &uart0_dmamask,
 945                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 946                                 .platform_data          = &uart0_data,
 947         },
 948         .resource       = uart0_resources,
 949         .num_resources  = ARRAY_SIZE(uart0_resources),
 950 };
 951
 952 static inline void configure_usart0_pins(unsigned pins)
 953 {
 954         at91_set_A_periph(AT91_PIN_PB4, 1);             /* TXD0 */
 955         at91_set_A_periph(AT91_PIN_PB5, 0);             /* RXD0 */
 956
 957         if (pins & ATMEL_UART_RTS)
 958                 at91_set_A_periph(AT91_PIN_PB26, 0);    /* RTS0 */
 959         if (pins & ATMEL_UART_CTS)
 960                 at91_set_A_periph(AT91_PIN_PB27, 0);    /* CTS0 */
 961         if (pins & ATMEL_UART_DTR)
 962                 at91_set_A_periph(AT91_PIN_PB24, 0);    /* DTR0 */
 963         if (pins & ATMEL_UART_DSR)
 964                 at91_set_A_periph(AT91_PIN_PB22, 0);    /* DSR0 */
 965         if (pins & ATMEL_UART_DCD)
 966                 at91_set_A_periph(AT91_PIN_PB23, 0);    /* DCD0 */
 967         if (pins & ATMEL_UART_RI)
 968                 at91_set_A_periph(AT91_PIN_PB25, 0);    /* RI0 */
 969 }
 970
 971 static struct resource uart1_resources[] = {
 972         [0] = {
 973                 .start  = AT91SAM9260_BASE_US1,
 974                 .end    = AT91SAM9260_BASE_US1 + SZ_16K - 1,
 975                 .flags  = IORESOURCE_MEM,
 976         },
 977         [1] = {
 978                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
 979                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US1,
 980                 .flags  = IORESOURCE_IRQ,
 981         },
 982 };
 983
 984 static struct atmel_uart_data uart1_data = {
 985         .use_dma_tx     = 1,
 986         .use_dma_rx     = 1,
 987 };
 988
 989 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 990
 991 static struct platform_device at91sam9260_uart1_device = {
 992         .name           = "atmel_usart",
 993         .id             = 2,
 994         .dev            = {
 995                                 .dma_mask               = &uart1_dmamask,
 996                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 997                                 .platform_data          = &uart1_data,
 998         },
 999         .resource       = uart1_resources,
1000         .num_resources  = ARRAY_SIZE(uart1_resources),
1001 };
1002
1003 static inline void configure_usart1_pins(unsigned pins)
1004 {
1005         at91_set_A_periph(AT91_PIN_PB6, 1);             /* TXD1 */
1006         at91_set_A_periph(AT91_PIN_PB7, 0);             /* RXD1 */
1007
1008         if (pins & ATMEL_UART_RTS)
1009                 at91_set_A_periph(AT91_PIN_PB28, 0);    /* RTS1 */
1010         if (pins & ATMEL_UART_CTS)
1011                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* CTS1 */
1012 }
1013
1014 static struct resource uart2_resources[] = {
1015         [0] = {
1016                 .start  = AT91SAM9260_BASE_US2,
1017                 .end    = AT91SAM9260_BASE_US2 + SZ_16K - 1,
1018                 .flags  = IORESOURCE_MEM,
1019         },
1020         [1] = {
1021                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1022                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US2,
1023                 .flags  = IORESOURCE_IRQ,
1024         },
1025 };
1026
1027 static struct atmel_uart_data uart2_data = {
1028         .use_dma_tx     = 1,
1029         .use_dma_rx     = 1,
1030 };
1031
1032 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1033
1034 static struct platform_device at91sam9260_uart2_device = {
1035         .name           = "atmel_usart",
1036         .id             = 3,
1037         .dev            = {
1038                                 .dma_mask               = &uart2_dmamask,
1039                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1040                                 .platform_data          = &uart2_data,
1041         },
1042         .resource       = uart2_resources,
1043         .num_resources  = ARRAY_SIZE(uart2_resources),
1044 };
1045
1046 static inline void configure_usart2_pins(unsigned pins)
1047 {
1048         at91_set_A_periph(AT91_PIN_PB8, 1);             /* TXD2 */
1049         at91_set_A_periph(AT91_PIN_PB9, 0);             /* RXD2 */
1050
1051         if (pins & ATMEL_UART_RTS)
1052                 at91_set_A_periph(AT91_PIN_PA4, 0);     /* RTS2 */
1053         if (pins & ATMEL_UART_CTS)
1054                 at91_set_A_periph(AT91_PIN_PA5, 0);     /* CTS2 */
1055 }
1056
1057 static struct resource uart3_resources[] = {
1058         [0] = {
1059                 .start  = AT91SAM9260_BASE_US3,
1060                 .end    = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1061                 .flags  = IORESOURCE_MEM,
1062         },
1063         [1] = {
1064                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1065                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US3,
1066                 .flags  = IORESOURCE_IRQ,
1067         },
1068 };
1069
1070 static struct atmel_uart_data uart3_data = {
1071         .use_dma_tx     = 1,
1072         .use_dma_rx     = 1,
1073 };
1074
1075 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1076
1077 static struct platform_device at91sam9260_uart3_device = {
1078         .name           = "atmel_usart",
1079         .id             = 4,
1080         .dev            = {
1081                                 .dma_mask               = &uart3_dmamask,
1082                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1083                                 .platform_data          = &uart3_data,
1084         },
1085         .resource       = uart3_resources,
1086         .num_resources  = ARRAY_SIZE(uart3_resources),
1087 };
1088
1089 static inline void configure_usart3_pins(unsigned pins)
1090 {
1091         at91_set_A_periph(AT91_PIN_PB10, 1);            /* TXD3 */
1092         at91_set_A_periph(AT91_PIN_PB11, 0);            /* RXD3 */
1093
1094         if (pins & ATMEL_UART_RTS)
1095                 at91_set_B_periph(AT91_PIN_PC8, 0);     /* RTS3 */
1096         if (pins & ATMEL_UART_CTS)
1097                 at91_set_B_periph(AT91_PIN_PC10, 0);    /* CTS3 */
1098 }
1099
1100 static struct resource uart4_resources[] = {
1101         [0] = {
1102                 .start  = AT91SAM9260_BASE_US4,
1103                 .end    = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1104                 .flags  = IORESOURCE_MEM,
1105         },
1106         [1] = {
1107                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1108                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US4,
1109                 .flags  = IORESOURCE_IRQ,
1110         },
1111 };
1112
1113 static struct atmel_uart_data uart4_data = {
1114         .use_dma_tx     = 1,
1115         .use_dma_rx     = 1,
1116 };
1117
1118 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1119
1120 static struct platform_device at91sam9260_uart4_device = {
1121         .name           = "atmel_usart",
1122         .id             = 5,
1123         .dev            = {
1124                                 .dma_mask               = &uart4_dmamask,
1125                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1126                                 .platform_data          = &uart4_data,
1127         },
1128         .resource       = uart4_resources,
1129         .num_resources  = ARRAY_SIZE(uart4_resources),
1130 };
1131
1132 static inline void configure_usart4_pins(void)
1133 {
1134         at91_set_B_periph(AT91_PIN_PA31, 1);            /* TXD4 */
1135         at91_set_B_periph(AT91_PIN_PA30, 0);            /* RXD4 */
1136 }
1137
1138 static struct resource uart5_resources[] = {
1139         [0] = {
1140                 .start  = AT91SAM9260_BASE_US5,
1141                 .end    = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1142                 .flags  = IORESOURCE_MEM,
1143         },
1144         [1] = {
1145                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1146                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_US5,
1147                 .flags  = IORESOURCE_IRQ,
1148         },
1149 };
1150
1151 static struct atmel_uart_data uart5_data = {
1152         .use_dma_tx     = 1,
1153         .use_dma_rx     = 1,
1154 };
1155
1156 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1157
1158 static struct platform_device at91sam9260_uart5_device = {
1159         .name           = "atmel_usart",
1160         .id             = 6,
1161         .dev            = {
1162                                 .dma_mask               = &uart5_dmamask,
1163                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1164                                 .platform_data          = &uart5_data,
1165         },
1166         .resource       = uart5_resources,
1167         .num_resources  = ARRAY_SIZE(uart5_resources),
1168 };
1169
1170 static inline void configure_usart5_pins(void)
1171 {
1172         at91_set_A_periph(AT91_PIN_PB12, 1);            /* TXD5 */
1173         at91_set_A_periph(AT91_PIN_PB13, 0);            /* RXD5 */
1174 }
1175
1176 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1177
1178 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1179 {
1180         struct platform_device *pdev;
1181         struct atmel_uart_data *pdata;
1182
1183         switch (id) {
1184                 case 0:         /* DBGU */
1185                         pdev = &at91sam9260_dbgu_device;
1186                         configure_dbgu_pins();
1187                         break;
1188                 case AT91SAM9260_ID_US0:
1189                         pdev = &at91sam9260_uart0_device;
1190                         configure_usart0_pins(pins);
1191                         break;
1192                 case AT91SAM9260_ID_US1:
1193                         pdev = &at91sam9260_uart1_device;
1194                         configure_usart1_pins(pins);
1195                         break;
1196                 case AT91SAM9260_ID_US2:
1197                         pdev = &at91sam9260_uart2_device;
1198                         configure_usart2_pins(pins);
1199                         break;
1200                 case AT91SAM9260_ID_US3:
1201                         pdev = &at91sam9260_uart3_device;
1202                         configure_usart3_pins(pins);
1203                         break;
1204                 case AT91SAM9260_ID_US4:
1205                         pdev = &at91sam9260_uart4_device;
1206                         configure_usart4_pins();
1207                         break;
1208                 case AT91SAM9260_ID_US5:
1209                         pdev = &at91sam9260_uart5_device;
1210                         configure_usart5_pins();
1211                         break;
1212                 default:
1213                         return;
1214         }
1215         pdata = pdev->dev.platform_data;
1216         pdata->num = portnr;            /* update to mapped ID */
1217
1218         if (portnr < ATMEL_MAX_UART)
1219                 at91_uarts[portnr] = pdev;
1220 }
1221
1222 void __init at91_add_device_serial(void)
1223 {
1224         int i;
1225
1226         for (i = 0; i < ATMEL_MAX_UART; i++) {
1227                 if (at91_uarts[i])
1228                         platform_device_register(at91_uarts[i]);
1229         }
1230 }
1231 #else
1232 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1233 void __init at91_add_device_serial(void) {}
1234 #endif
1235
1236 /* --------------------------------------------------------------------
1237  *  CF/IDE
1238  * -------------------------------------------------------------------- */
1239
1240 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1241         defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1242
1243 static struct at91_cf_data cf0_data;
1244
1245 static struct resource cf0_resources[] = {
1246         [0] = {
1247                 .start  = AT91_CHIPSELECT_4,
1248                 .end    = AT91_CHIPSELECT_4 + SZ_256M - 1,
1249                 .flags  = IORESOURCE_MEM,
1250         }
1251 };
1252
1253 static struct platform_device cf0_device = {
1254         .id             = 0,
1255         .dev            = {
1256                                 .platform_data  = &cf0_data,
1257         },
1258         .resource       = cf0_resources,
1259         .num_resources  = ARRAY_SIZE(cf0_resources),
1260 };
1261
1262 static struct at91_cf_data cf1_data;
1263
1264 static struct resource cf1_resources[] = {
1265         [0] = {
1266                 .start  = AT91_CHIPSELECT_5,
1267                 .end    = AT91_CHIPSELECT_5 + SZ_256M - 1,
1268                 .flags  = IORESOURCE_MEM,
1269         }
1270 };
1271
1272 static struct platform_device cf1_device = {
1273         .id             = 1,
1274         .dev            = {
1275                                 .platform_data  = &cf1_data,
1276         },
1277         .resource       = cf1_resources,
1278         .num_resources  = ARRAY_SIZE(cf1_resources),
1279 };
1280
1281 void __init at91_add_device_cf(struct at91_cf_data *data)
1282 {
1283         struct platform_device *pdev;
1284         unsigned long csa;
1285
1286         if (!data)
1287                 return;
1288
1289         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1290
1291         switch (data->chipselect) {
1292         case 4:
1293                 at91_set_multi_drive(AT91_PIN_PC8, 0);
1294                 at91_set_A_periph(AT91_PIN_PC8, 0);
1295                 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1296                 cf0_data = *data;
1297                 pdev = &cf0_device;
1298                 break;
1299         case 5:
1300                 at91_set_multi_drive(AT91_PIN_PC9, 0);
1301                 at91_set_A_periph(AT91_PIN_PC9, 0);
1302                 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1303                 cf1_data = *data;
1304                 pdev = &cf1_device;
1305                 break;
1306         default:
1307                 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1308                        data->chipselect);
1309                 return;
1310         }
1311
1312         at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1313
1314         if (gpio_is_valid(data->rst_pin)) {
1315                 at91_set_multi_drive(data->rst_pin, 0);
1316                 at91_set_gpio_output(data->rst_pin, 1);
1317         }
1318
1319         if (gpio_is_valid(data->irq_pin)) {
1320                 at91_set_gpio_input(data->irq_pin, 0);
1321                 at91_set_deglitch(data->irq_pin, 1);
1322         }
1323
1324         if (gpio_is_valid(data->det_pin)) {
1325                 at91_set_gpio_input(data->det_pin, 0);
1326                 at91_set_deglitch(data->det_pin, 1);
1327         }
1328
1329         at91_set_B_periph(AT91_PIN_PC6, 0);     /* CFCE1 */
1330         at91_set_B_periph(AT91_PIN_PC7, 0);     /* CFCE2 */
1331         at91_set_A_periph(AT91_PIN_PC10, 0);    /* CFRNW */
1332         at91_set_A_periph(AT91_PIN_PC15, 1);    /* NWAIT */
1333
1334         if (data->flags & AT91_CF_TRUE_IDE)
1335 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1336                 pdev->name = "pata_at91";
1337 #else
1338 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1339 #endif
1340         else
1341                 pdev->name = "at91_cf";
1342
1343         platform_device_register(pdev);
1344 }
1345
1346 #else
1347 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1348 #endif
1349
1350 /* --------------------------------------------------------------------
1351  *  ADCs
1352  * -------------------------------------------------------------------- */
1353
1354 #if IS_ENABLED(CONFIG_AT91_ADC)
1355 static struct at91_adc_data adc_data;
1356
1357 static struct resource adc_resources[] = {
1358         [0] = {
1359                 .start  = AT91SAM9260_BASE_ADC,
1360                 .end    = AT91SAM9260_BASE_ADC + SZ_16K - 1,
1361                 .flags  = IORESOURCE_MEM,
1362         },
1363         [1] = {
1364                 .start  = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1365                 .end    = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC,
1366                 .flags  = IORESOURCE_IRQ,
1367         },
1368 };
1369
1370 static struct platform_device at91_adc_device = {
1371         .name           = "at91_adc",
1372         .id             = -1,
1373         .dev            = {
1374                                 .platform_data          = &adc_data,
1375         },
1376         .resource       = adc_resources,
1377         .num_resources  = ARRAY_SIZE(adc_resources),
1378 };
1379
1380 static struct at91_adc_trigger at91_adc_triggers[] = {
1381         [0] = {
1382                 .name = "timer-counter-0",
1383                 .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN,
1384         },
1385         [1] = {
1386                 .name = "timer-counter-1",
1387                 .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN,
1388         },
1389         [2] = {
1390                 .name = "timer-counter-2",
1391                 .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN,
1392         },
1393         [3] = {
1394                 .name = "external",
1395                 .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN,
1396                 .is_external = true,
1397         },
1398 };
1399
1400 static struct at91_adc_reg_desc at91_adc_register_g20 = {
1401         .channel_base = AT91_ADC_CHR(0),
1402         .drdy_mask = AT91_ADC_DRDY,
1403         .status_register = AT91_ADC_SR,
1404         .trigger_register = AT91_ADC_MR,
1405 };
1406
1407 void __init at91_add_device_adc(struct at91_adc_data *data)
1408 {
1409         if (!data)
1410                 return;
1411
1412         if (test_bit(0, &data->channels_used))
1413                 at91_set_A_periph(AT91_PIN_PC0, 0);
1414         if (test_bit(1, &data->channels_used))
1415                 at91_set_A_periph(AT91_PIN_PC1, 0);
1416         if (test_bit(2, &data->channels_used))
1417                 at91_set_A_periph(AT91_PIN_PC2, 0);
1418         if (test_bit(3, &data->channels_used))
1419                 at91_set_A_periph(AT91_PIN_PC3, 0);
1420
1421         if (data->use_external_triggers)
1422                 at91_set_A_periph(AT91_PIN_PA22, 0);
1423
1424         data->num_channels = 4;
1425         data->startup_time = 10;
1426         data->registers = &at91_adc_register_g20;
1427         data->trigger_number = 4;
1428         data->trigger_list = at91_adc_triggers;
1429
1430         adc_data = *data;
1431         platform_device_register(&at91_adc_device);
1432 }
1433 #else
1434 void __init at91_add_device_adc(struct at91_adc_data *data) {}
1435 #endif
1436
1437 /* -------------------------------------------------------------------- */
1438 /*
1439  * These devices are always present and don't need any board-specific
1440  * setup.
1441  */
1442 static int __init at91_add_standard_devices(void)
1443 {
1444         if (of_have_populated_dt())
1445                 return 0;
1446
1447         at91_add_device_rtt();
1448         at91_add_device_watchdog();
1449         at91_add_device_tc();
1450         return 0;
1451 }
1452
1453 arch_initcall(at91_add_standard_devices);