arch/arm/mach-exynos/mach-exynos5-dt.c

   1 /*
   2  * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10 */
  11
  12 #include <linux/of_platform.h>
  13 #include <linux/of_fdt.h>
  14 #include <linux/memblock.h>
  15 #include <linux/io.h>
  16 #include <linux/clocksource.h>
  17 #include <linux/dma-mapping.h>
  18
  19 #include <asm/mach/arch.h>
  20 #include <mach/regs-pmu.h>
  21
  22 #include <plat/cpu.h>
  23 #include <plat/mfc.h>
  24
  25 #include "common.h"
  26
  27 static u64 dma_mask64 = DMA_BIT_MASK(64);
  28
  29 static void __init exynos5_dt_map_io(void)
  30 {
  31         exynos_init_io(NULL, 0);
  32 }
  33
  34 static int exynos5250_platform_notifier(struct notifier_block *nb,
  35                                   unsigned long event, void *__dev)
  36 {
  37         struct device *dev = __dev;
  38
  39         if (event != BUS_NOTIFY_ADD_DEVICE)
  40                 return NOTIFY_DONE;
  41
  42         dev->dma_mask = &dma_mask64;
  43         dev->coherent_dma_mask = DMA_BIT_MASK(64);
  44
  45         return NOTIFY_OK;
  46 }
  47
  48 static struct notifier_block exynos5250_platform_nb = {
  49         .notifier_call = exynos5250_platform_notifier,
  50 };
  51
  52 static void __init exynos5_dt_machine_init(void)
  53 {
  54         struct device_node *i2c_np;
  55         const char *i2c_compat = "samsung,s3c2440-i2c";
  56         unsigned int tmp;
  57
  58         /*
  59          * Exynos5's legacy i2c controller and new high speed i2c
  60          * controller have muxed interrupt sources. By default the
  61          * interrupts for 4-channel HS-I2C controller are enabled.
  62          * If node for first four channels of legacy i2c controller
  63          * are available then re-configure the interrupts via the
  64          * system register.
  65          */
  66         for_each_compatible_node(i2c_np, NULL, i2c_compat) {
  67                 if (of_device_is_available(i2c_np)) {
  68                         if (of_alias_get_id(i2c_np, "i2c") < 4) {
  69                                 tmp = readl(EXYNOS5_SYS_I2C_CFG);
  70                                 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
  71                                                 EXYNOS5_SYS_I2C_CFG);
  72                         }
  73                 }
  74         }
  75
  76         if (config_enabled(CONFIG_ARM_LPAE) &&
  77                         of_machine_is_compatible("samsung,exynos5250"))
  78                 bus_register_notifier(&platform_bus_type,
  79                                 &exynos5250_platform_nb);
  80
  81         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  82 }
  83
  84 static char const *exynos5_dt_compat[] __initdata = {
  85         "samsung,exynos5250",
  86         "samsung,exynos5440",
  87         NULL
  88 };
  89
  90 static void __init exynos5_reserve(void)
  91 {
  92 #ifdef CONFIG_S5P_DEV_MFC
  93         struct s5p_mfc_dt_meminfo mfc_mem;
  94
  95         /* Reserve memory for MFC only if it's available */
  96         mfc_mem.compatible = "samsung,mfc-v6";
  97         if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
  98                 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
  99                                 mfc_mem.lsize);
 100 #endif
 101 }
 102
 103 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
 104         /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
 105         .init_irq       = exynos5_init_irq,
 106         .smp            = smp_ops(exynos_smp_ops),
 107         .map_io         = exynos5_dt_map_io,
 108         .init_machine   = exynos5_dt_machine_init,
 109         .init_late      = exynos_init_late,
 110         .init_time      = exynos_init_time,
 111         .dt_compat      = exynos5_dt_compat,
 112         .restart        = exynos5_restart,
 113         .reserve        = exynos5_reserve,
 114 MACHINE_END