b2d600f149377a9570014e6b9139860e444239f3
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-imx / anatop.c
1 /*
2  * Copyright (C) 2013 Freescale Semiconductor, Inc.
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/regmap.h>
18 #include "common.h"
19 #include "hardware.h"
20
21 #define REG_SET         0x4
22 #define REG_CLR         0x8
23
24 #define ANADIG_REG_2P5          0x130
25 #define ANADIG_REG_CORE         0x140
26 #define ANADIG_ANA_MISC0        0x150
27 #define ANADIG_USB1_CHRG_DETECT 0x1b0
28 #define ANADIG_USB2_CHRG_DETECT 0x210
29 #define ANADIG_DIGPROG          0x260
30
31 #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG    0x40000
32 #define BM_ANADIG_REG_CORE_FET_ODRIVE           0x20000000
33 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG    0x1000
34 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B    0x80000
35 #define BM_ANADIG_USB_CHRG_DETECT_EN_B          0x100000
36
37 static struct regmap *anatop;
38
39 static void imx_anatop_enable_weak2p5(bool enable)
40 {
41         u32 reg, val;
42
43         regmap_read(anatop, ANADIG_ANA_MISC0, &val);
44
45         /* can only be enabled when stop_mode_config is clear. */
46         reg = ANADIG_REG_2P5;
47         reg += (enable && (val & BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG) == 0) ?
48                 REG_SET : REG_CLR;
49         regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG);
50 }
51
52 static void imx_anatop_enable_fet_odrive(bool enable)
53 {
54         regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR),
55                 BM_ANADIG_REG_CORE_FET_ODRIVE);
56 }
57
58 void imx_anatop_pre_suspend(void)
59 {
60         imx_anatop_enable_weak2p5(true);
61         imx_anatop_enable_fet_odrive(true);
62 }
63
64 void imx_anatop_post_resume(void)
65 {
66         imx_anatop_enable_fet_odrive(false);
67         imx_anatop_enable_weak2p5(false);
68 }
69
70 static void imx_anatop_usb_chrg_detect_disable(void)
71 {
72         regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
73                 BM_ANADIG_USB_CHRG_DETECT_EN_B
74                 | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
75         regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
76                 BM_ANADIG_USB_CHRG_DETECT_EN_B |
77                 BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
78 }
79
80 void __init imx_init_revision_from_anatop(void)
81 {
82         struct device_node *np;
83         void __iomem *anatop_base;
84         unsigned int revision;
85         u32 digprog;
86
87         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
88         anatop_base = of_iomap(np, 0);
89         WARN_ON(!anatop_base);
90         digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG);
91         iounmap(anatop_base);
92
93         switch (digprog & 0xff) {
94         case 0:
95                 revision = IMX_CHIP_REVISION_1_0;
96                 break;
97         case 1:
98                 revision = IMX_CHIP_REVISION_1_1;
99                 break;
100         case 2:
101                 revision = IMX_CHIP_REVISION_1_2;
102                 break;
103         default:
104                 revision = IMX_CHIP_REVISION_UNKNOWN;
105         }
106
107         mxc_set_cpu_type(digprog >> 16 & 0xff);
108         imx_set_soc_revision(revision);
109 }
110
111 void __init imx_anatop_init(void)
112 {
113         anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
114         if (IS_ERR(anatop)) {
115                 pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
116                 return;
117         }
118
119         imx_anatop_usb_chrg_detect_disable();
120 }