2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/delay.h>
19 #include <mach/common.h>
20 #include <mach/hardware.h>
21 #include <mach/imx-uart.h>
22 #include <mach/iomux-mx51.h>
23 #include <mach/mxc_ehci.h>
26 #include <asm/setup.h>
27 #include <asm/mach-types.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/time.h>
33 #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
34 #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
37 #define MX51_USB_CTRL_1_OFFSET 0x10
38 #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
40 #define MX51_USB_PLLDIV_12_MHZ 0x00
41 #define MX51_USB_PLL_DIV_19_2_MHZ 0x01
42 #define MX51_USB_PLL_DIV_24_MHZ 0x02
44 static struct platform_device *devices[] __initdata = {
48 static struct pad_desc mx51babbage_pads[] = {
50 MX51_PAD_UART1_RXD__UART1_RXD,
51 MX51_PAD_UART1_TXD__UART1_TXD,
52 MX51_PAD_UART1_RTS__UART1_RTS,
53 MX51_PAD_UART1_CTS__UART1_CTS,
56 MX51_PAD_UART2_RXD__UART2_RXD,
57 MX51_PAD_UART2_TXD__UART2_TXD,
60 MX51_PAD_EIM_D25__UART3_RXD,
61 MX51_PAD_EIM_D26__UART3_TXD,
62 MX51_PAD_EIM_D27__UART3_RTS,
63 MX51_PAD_EIM_D24__UART3_CTS,
66 MX51_PAD_USBH1_CLK__USBH1_CLK,
67 MX51_PAD_USBH1_DIR__USBH1_DIR,
68 MX51_PAD_USBH1_NXT__USBH1_NXT,
69 MX51_PAD_USBH1_DATA0__USBH1_DATA0,
70 MX51_PAD_USBH1_DATA1__USBH1_DATA1,
71 MX51_PAD_USBH1_DATA2__USBH1_DATA2,
72 MX51_PAD_USBH1_DATA3__USBH1_DATA3,
73 MX51_PAD_USBH1_DATA4__USBH1_DATA4,
74 MX51_PAD_USBH1_DATA5__USBH1_DATA5,
75 MX51_PAD_USBH1_DATA6__USBH1_DATA6,
76 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
78 /* USB HUB reset line*/
79 MX51_PAD_GPIO_1_7__GPIO1_7,
83 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
84 static struct imxuart_platform_data uart_pdata = {
85 .flags = IMXUART_HAVE_RTSCTS,
88 static inline void mxc_init_imx_uart(void)
90 mxc_register_device(&mxc_uart_device0, &uart_pdata);
91 mxc_register_device(&mxc_uart_device1, &uart_pdata);
92 mxc_register_device(&mxc_uart_device2, &uart_pdata);
94 #else /* !SERIAL_IMX */
95 static inline void mxc_init_imx_uart(void)
98 #endif /* SERIAL_IMX */
100 static int gpio_usbh1_active(void)
102 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27;
105 /* Set USBH1_STP to GPIO and toggle it */
106 mxc_iomux_v3_setup_pad(&usbh1stp_gpio);
107 ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
110 pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
113 gpio_direction_output(BABBAGE_USBH1_STP, 0);
114 gpio_set_value(BABBAGE_USBH1_STP, 1);
116 gpio_free(BABBAGE_USBH1_STP);
120 static inline void babbage_usbhub_reset(void)
124 /* Bring USB hub out of reset */
125 ret = gpio_request(BABBAGE_USB_HUB_RESET, "GPIO1_7");
127 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
130 gpio_direction_output(BABBAGE_USB_HUB_RESET, 0);
132 /* USB HUB RESET - De-assert USB HUB RESET_N */
134 gpio_set_value(BABBAGE_USB_HUB_RESET, 0);
136 gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
139 /* This function is board specific as the bit mask for the plldiv will also
140 be different for other Freescale SoCs, thus a common bitmask is not
141 possible and cannot get place in /plat-mxc/ehci.c.*/
142 static int initialize_otg_port(struct platform_device *pdev)
145 void __iomem *usb_base;
148 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
149 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
151 /* Set the PHY clock to 19.2MHz */
152 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
153 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
154 v |= MX51_USB_PLL_DIV_19_2_MHZ;
155 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
160 static int initialize_usbh1_port(struct platform_device *pdev)
163 void __iomem *usb_base;
166 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
167 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
169 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
170 v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
171 __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
176 static struct mxc_usbh_platform_data dr_utmi_config = {
177 .init = initialize_otg_port,
178 .portsc = MXC_EHCI_UTMI_16BIT,
179 .flags = MXC_EHCI_INTERNAL_PHY,
182 static struct mxc_usbh_platform_data usbh1_config = {
183 .init = initialize_usbh1_port,
184 .portsc = MXC_EHCI_MODE_ULPI,
185 .flags = (MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_ITC_NO_THRESHOLD),
189 * Board specific initialization.
191 static void __init mxc_board_init(void)
193 struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
195 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
196 ARRAY_SIZE(mx51babbage_pads));
198 platform_add_devices(devices, ARRAY_SIZE(devices));
200 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
203 mxc_register_device(&mxc_usbh1_device, &usbh1_config);
204 /* setback USBH1_STP to be function */
205 mxc_iomux_v3_setup_pad(&usbh1stp);
206 babbage_usbhub_reset();
209 static void __init mx51_babbage_timer_init(void)
211 mx51_clocks_init(32768, 24000000, 22579200, 0);
214 static struct sys_timer mxc_timer = {
215 .init = mx51_babbage_timer_init,
218 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
219 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
220 .phys_io = MX51_AIPS1_BASE_ADDR,
221 .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
222 .boot_params = PHYS_OFFSET + 0x100,
223 .map_io = mx51_map_io,
224 .init_irq = mx51_init_irq,
225 .init_machine = mxc_board_init,