2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009-2010 Amit Kucheria <amit.kucheria@canonical.com>
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/init.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/delay.h>
18 #include <linux/fsl_devices.h>
20 #include <mach/common.h>
21 #include <mach/hardware.h>
22 #include <mach/imx-uart.h>
23 #include <mach/iomux-mx51.h>
24 #include <mach/mxc_ehci.h>
27 #include <asm/setup.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/time.h>
34 #define BABBAGE_USB_HUB_RESET (0*32 + 7) /* GPIO_1_7 */
35 #define BABBAGE_USBH1_STP (0*32 + 27) /* GPIO_1_27 */
38 #define MX51_USB_CTRL_1_OFFSET 0x10
39 #define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25)
41 #define MX51_USB_PLLDIV_12_MHZ 0x00
42 #define MX51_USB_PLL_DIV_19_2_MHZ 0x01
43 #define MX51_USB_PLL_DIV_24_MHZ 0x02
45 static struct platform_device *devices[] __initdata = {
49 static struct pad_desc mx51babbage_pads[] = {
51 MX51_PAD_UART1_RXD__UART1_RXD,
52 MX51_PAD_UART1_TXD__UART1_TXD,
53 MX51_PAD_UART1_RTS__UART1_RTS,
54 MX51_PAD_UART1_CTS__UART1_CTS,
57 MX51_PAD_UART2_RXD__UART2_RXD,
58 MX51_PAD_UART2_TXD__UART2_TXD,
61 MX51_PAD_EIM_D25__UART3_RXD,
62 MX51_PAD_EIM_D26__UART3_TXD,
63 MX51_PAD_EIM_D27__UART3_RTS,
64 MX51_PAD_EIM_D24__UART3_CTS,
67 MX51_PAD_USBH1_CLK__USBH1_CLK,
68 MX51_PAD_USBH1_DIR__USBH1_DIR,
69 MX51_PAD_USBH1_NXT__USBH1_NXT,
70 MX51_PAD_USBH1_DATA0__USBH1_DATA0,
71 MX51_PAD_USBH1_DATA1__USBH1_DATA1,
72 MX51_PAD_USBH1_DATA2__USBH1_DATA2,
73 MX51_PAD_USBH1_DATA3__USBH1_DATA3,
74 MX51_PAD_USBH1_DATA4__USBH1_DATA4,
75 MX51_PAD_USBH1_DATA5__USBH1_DATA5,
76 MX51_PAD_USBH1_DATA6__USBH1_DATA6,
77 MX51_PAD_USBH1_DATA7__USBH1_DATA7,
79 /* USB HUB reset line*/
80 MX51_PAD_GPIO_1_7__GPIO1_7,
84 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
85 static struct imxuart_platform_data uart_pdata = {
86 .flags = IMXUART_HAVE_RTSCTS,
89 static inline void mxc_init_imx_uart(void)
91 mxc_register_device(&mxc_uart_device0, &uart_pdata);
92 mxc_register_device(&mxc_uart_device1, &uart_pdata);
93 mxc_register_device(&mxc_uart_device2, &uart_pdata);
95 #else /* !SERIAL_IMX */
96 static inline void mxc_init_imx_uart(void)
99 #endif /* SERIAL_IMX */
101 static int gpio_usbh1_active(void)
103 struct pad_desc usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO_1_27;
106 /* Set USBH1_STP to GPIO and toggle it */
107 mxc_iomux_v3_setup_pad(&usbh1stp_gpio);
108 ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
111 pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
114 gpio_direction_output(BABBAGE_USBH1_STP, 0);
115 gpio_set_value(BABBAGE_USBH1_STP, 1);
117 gpio_free(BABBAGE_USBH1_STP);
121 static inline void babbage_usbhub_reset(void)
125 /* Bring USB hub out of reset */
126 ret = gpio_request(BABBAGE_USB_HUB_RESET, "GPIO1_7");
128 printk(KERN_ERR"failed to get GPIO_USB_HUB_RESET: %d\n", ret);
131 gpio_direction_output(BABBAGE_USB_HUB_RESET, 0);
133 /* USB HUB RESET - De-assert USB HUB RESET_N */
135 gpio_set_value(BABBAGE_USB_HUB_RESET, 0);
137 gpio_set_value(BABBAGE_USB_HUB_RESET, 1);
140 /* This function is board specific as the bit mask for the plldiv will also
141 be different for other Freescale SoCs, thus a common bitmask is not
142 possible and cannot get place in /plat-mxc/ehci.c.*/
143 static int initialize_otg_port(struct platform_device *pdev)
146 void __iomem *usb_base;
149 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
150 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
152 /* Set the PHY clock to 19.2MHz */
153 v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
154 v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK;
155 v |= MX51_USB_PLL_DIV_19_2_MHZ;
156 __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET);
161 static int initialize_usbh1_port(struct platform_device *pdev)
164 void __iomem *usb_base;
167 usb_base = ioremap(MX51_OTG_BASE_ADDR, SZ_4K);
168 usbother_base = usb_base + MX5_USBOTHER_REGS_OFFSET;
170 /* The clock for the USBH1 ULPI port will come externally from the PHY. */
171 v = __raw_readl(usbother_base + MX51_USB_CTRL_1_OFFSET);
172 __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, usbother_base + MX51_USB_CTRL_1_OFFSET);
177 static struct mxc_usbh_platform_data dr_utmi_config = {
178 .init = initialize_otg_port,
179 .portsc = MXC_EHCI_UTMI_16BIT,
180 .flags = MXC_EHCI_INTERNAL_PHY,
183 static struct fsl_usb2_platform_data usb_pdata = {
184 .operating_mode = FSL_USB2_DR_DEVICE,
185 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
188 static struct mxc_usbh_platform_data usbh1_config = {
189 .init = initialize_usbh1_port,
190 .portsc = MXC_EHCI_MODE_ULPI,
191 .flags = (MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_ITC_NO_THRESHOLD),
194 static int otg_mode_host;
196 static int __init babbage_otg_mode(char *options)
198 if (!strcmp(options, "host"))
200 else if (!strcmp(options, "device"))
203 pr_info("otg_mode neither \"host\" nor \"device\". "
204 "Defaulting to device\n");
207 __setup("otg_mode=", babbage_otg_mode);
210 * Board specific initialization.
212 static void __init mxc_board_init(void)
214 struct pad_desc usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP;
216 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
217 ARRAY_SIZE(mx51babbage_pads));
219 platform_add_devices(devices, ARRAY_SIZE(devices));
222 mxc_register_device(&mxc_usbdr_host_device, &dr_utmi_config);
224 initialize_otg_port(NULL);
225 mxc_register_device(&mxc_usbdr_udc_device, &usb_pdata);
229 mxc_register_device(&mxc_usbh1_device, &usbh1_config);
230 /* setback USBH1_STP to be function */
231 mxc_iomux_v3_setup_pad(&usbh1stp);
232 babbage_usbhub_reset();
235 static void __init mx51_babbage_timer_init(void)
237 mx51_clocks_init(32768, 24000000, 22579200, 0);
240 static struct sys_timer mxc_timer = {
241 .init = mx51_babbage_timer_init,
244 MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board")
245 /* Maintainer: Amit Kucheria <amit.kucheria@canonical.com> */
246 .phys_io = MX51_AIPS1_BASE_ADDR,
247 .io_pg_offst = ((MX51_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
248 .boot_params = PHYS_OFFSET + 0x100,
249 .map_io = mx51_map_io,
250 .init_irq = mx51_init_irq,
251 .init_machine = mxc_board_init,