2 * Copyright 2012 Freescale Semiconductor, Inc.
3 * Copyright 2012 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <linux/clk.h>
14 #include <linux/clkdev.h>
15 #include <linux/can/platform/flexcan.h>
16 #include <linux/delay.h>
17 #include <linux/err.h>
18 #include <linux/gpio.h>
19 #include <linux/init.h>
20 #include <linux/micrel_phy.h>
21 #include <linux/mxsfb.h>
22 #include <linux/of_platform.h>
23 #include <linux/phy.h>
24 #include <linux/pinctrl/consumer.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/time.h>
27 #include <mach/common.h>
28 #include <mach/digctl.h>
31 static struct fb_videomode mx23evk_video_modes[] = {
33 .name = "Samsung-LMS430HF02",
37 .pixclock = 108096, /* picosecond (9.2 MHz) */
44 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
45 FB_SYNC_DOTCLK_FAILING_ACT,
49 static struct fb_videomode mx28evk_video_modes[] = {
51 .name = "Seiko-43WVF1G",
55 .pixclock = 29851, /* picosecond (33.5 MHz) */
62 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
63 FB_SYNC_DOTCLK_FAILING_ACT,
67 static struct fb_videomode m28evk_video_modes[] = {
69 .name = "Ampire AM-800480R2TMQW-T01H",
73 .pixclock = 30066, /* picosecond (33.26 MHz) */
80 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT,
84 static struct fb_videomode apx4devkit_video_modes[] = {
86 .name = "HannStar PJ70112A",
90 .pixclock = 33333, /* picosecond (30.00 MHz) */
97 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
98 FB_SYNC_DATA_ENABLE_HIGH_ACT |
99 FB_SYNC_DOTCLK_FAILING_ACT,
103 static struct fb_videomode apf28dev_video_modes[] = {
109 .pixclock = 30303, /* picosecond */
111 .right_margin = 96, /* at least 3 & 1 */
112 .upper_margin = 0x14,
113 .lower_margin = 0x15,
116 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT |
117 FB_SYNC_DATA_ENABLE_HIGH_ACT |
118 FB_SYNC_DOTCLK_FAILING_ACT,
122 static struct fb_videomode cfa10049_video_modes[] = {
124 .name = "Himax HX8357-B",
128 .pixclock = 108506, /* picosecond (9.216 MHz) */
135 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT
139 static struct mxsfb_platform_data mxsfb_pdata __initdata;
142 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
144 #define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
146 static int flexcan0_en, flexcan1_en;
148 static void mx28evk_flexcan_switch(void)
150 if (flexcan0_en || flexcan1_en)
151 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
153 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
156 static void mx28evk_flexcan0_switch(int enable)
158 flexcan0_en = enable;
159 mx28evk_flexcan_switch();
162 static void mx28evk_flexcan1_switch(int enable)
164 flexcan1_en = enable;
165 mx28evk_flexcan_switch();
168 static struct flexcan_platform_data flexcan_pdata[2];
170 static struct of_dev_auxdata mxs_auxdata_lookup[] __initdata = {
171 OF_DEV_AUXDATA("fsl,imx23-lcdif", 0x80030000, NULL, &mxsfb_pdata),
172 OF_DEV_AUXDATA("fsl,imx28-lcdif", 0x80030000, NULL, &mxsfb_pdata),
173 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80032000, NULL, &flexcan_pdata[0]),
174 OF_DEV_AUXDATA("fsl,imx28-flexcan", 0x80034000, NULL, &flexcan_pdata[1]),
178 static void __init imx23_timer_init(void)
183 static void __init imx28_timer_init(void)
194 static void __init update_fec_mac_prop(enum mac_oui oui)
196 struct device_node *np, *from = NULL;
197 struct property *newmac;
198 const u32 *ocotp = mxs_get_ocotp();
203 for (i = 0; i < 2; i++) {
204 np = of_find_compatible_node(from, NULL, "fsl,imx28-fec");
210 if (of_get_property(np, "local-mac-address", NULL))
213 newmac = kzalloc(sizeof(*newmac) + 6, GFP_KERNEL);
216 newmac->value = newmac + 1;
219 newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
226 * OCOTP only stores the last 4 octets for each mac address,
227 * so hard-code OUI here.
229 macaddr = newmac->value;
241 case OUI_CRYSTALFONTZ:
248 macaddr[3] = (val >> 16) & 0xff;
249 macaddr[4] = (val >> 8) & 0xff;
250 macaddr[5] = (val >> 0) & 0xff;
252 of_update_property(np, newmac);
256 static void __init imx23_evk_init(void)
258 mxsfb_pdata.mode_list = mx23evk_video_modes;
259 mxsfb_pdata.mode_count = ARRAY_SIZE(mx23evk_video_modes);
260 mxsfb_pdata.default_bpp = 32;
261 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
264 static inline void enable_clk_enet_out(void)
266 struct clk *clk = clk_get_sys("enet_out", NULL);
269 clk_prepare_enable(clk);
272 static void __init imx28_evk_init(void)
274 enable_clk_enet_out();
275 update_fec_mac_prop(OUI_FSL);
277 mxsfb_pdata.mode_list = mx28evk_video_modes;
278 mxsfb_pdata.mode_count = ARRAY_SIZE(mx28evk_video_modes);
279 mxsfb_pdata.default_bpp = 32;
280 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
282 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
285 static void __init imx28_evk_post_init(void)
287 if (!gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
289 flexcan_pdata[0].transceiver_switch = mx28evk_flexcan0_switch;
290 flexcan_pdata[1].transceiver_switch = mx28evk_flexcan1_switch;
294 static void __init m28evk_init(void)
296 mxsfb_pdata.mode_list = m28evk_video_modes;
297 mxsfb_pdata.mode_count = ARRAY_SIZE(m28evk_video_modes);
298 mxsfb_pdata.default_bpp = 16;
299 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
302 static void __init sc_sps1_init(void)
304 enable_clk_enet_out();
307 static int apx4devkit_phy_fixup(struct phy_device *phy)
309 phy->dev_flags |= MICREL_PHY_50MHZ_CLK;
313 static void __init apx4devkit_init(void)
315 enable_clk_enet_out();
317 if (IS_BUILTIN(CONFIG_PHYLIB))
318 phy_register_fixup_for_uid(PHY_ID_KSZ8051, MICREL_PHY_ID_MASK,
319 apx4devkit_phy_fixup);
321 mxsfb_pdata.mode_list = apx4devkit_video_modes;
322 mxsfb_pdata.mode_count = ARRAY_SIZE(apx4devkit_video_modes);
323 mxsfb_pdata.default_bpp = 32;
324 mxsfb_pdata.ld_intf_width = STMLCDIF_24BIT;
327 #define ENET0_MDC__GPIO_4_0 MXS_GPIO_NR(4, 0)
328 #define ENET0_MDIO__GPIO_4_1 MXS_GPIO_NR(4, 1)
329 #define ENET0_RX_EN__GPIO_4_2 MXS_GPIO_NR(4, 2)
330 #define ENET0_RXD0__GPIO_4_3 MXS_GPIO_NR(4, 3)
331 #define ENET0_RXD1__GPIO_4_4 MXS_GPIO_NR(4, 4)
332 #define ENET0_TX_EN__GPIO_4_6 MXS_GPIO_NR(4, 6)
333 #define ENET0_TXD0__GPIO_4_7 MXS_GPIO_NR(4, 7)
334 #define ENET0_TXD1__GPIO_4_8 MXS_GPIO_NR(4, 8)
335 #define ENET_CLK__GPIO_4_16 MXS_GPIO_NR(4, 16)
337 #define TX28_FEC_PHY_POWER MXS_GPIO_NR(3, 29)
338 #define TX28_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
339 #define TX28_FEC_nINT MXS_GPIO_NR(4, 5)
341 static const struct gpio tx28_gpios[] __initconst = {
342 { ENET0_MDC__GPIO_4_0, GPIOF_OUT_INIT_LOW, "GPIO_4_0" },
343 { ENET0_MDIO__GPIO_4_1, GPIOF_OUT_INIT_LOW, "GPIO_4_1" },
344 { ENET0_RX_EN__GPIO_4_2, GPIOF_OUT_INIT_LOW, "GPIO_4_2" },
345 { ENET0_RXD0__GPIO_4_3, GPIOF_OUT_INIT_LOW, "GPIO_4_3" },
346 { ENET0_RXD1__GPIO_4_4, GPIOF_OUT_INIT_LOW, "GPIO_4_4" },
347 { ENET0_TX_EN__GPIO_4_6, GPIOF_OUT_INIT_LOW, "GPIO_4_6" },
348 { ENET0_TXD0__GPIO_4_7, GPIOF_OUT_INIT_LOW, "GPIO_4_7" },
349 { ENET0_TXD1__GPIO_4_8, GPIOF_OUT_INIT_LOW, "GPIO_4_8" },
350 { ENET_CLK__GPIO_4_16, GPIOF_OUT_INIT_LOW, "GPIO_4_16" },
351 { TX28_FEC_PHY_POWER, GPIOF_OUT_INIT_LOW, "fec-phy-power" },
352 { TX28_FEC_PHY_RESET, GPIOF_OUT_INIT_LOW, "fec-phy-reset" },
353 { TX28_FEC_nINT, GPIOF_DIR_IN, "fec-int" },
356 static void __init tx28_post_init(void)
358 struct device_node *np;
359 struct platform_device *pdev;
360 struct pinctrl *pctl;
363 enable_clk_enet_out();
365 np = of_find_compatible_node(NULL, NULL, "fsl,imx28-fec");
366 pdev = of_find_device_by_node(np);
368 pr_err("%s: failed to find fec device\n", __func__);
372 pctl = pinctrl_get_select(&pdev->dev, "gpio_mode");
374 pr_err("%s: failed to get pinctrl state\n", __func__);
378 ret = gpio_request_array(tx28_gpios, ARRAY_SIZE(tx28_gpios));
380 pr_err("%s: failed to request gpios: %d\n", __func__, ret);
384 /* Power up fec phy */
385 gpio_set_value(TX28_FEC_PHY_POWER, 1);
386 msleep(26); /* 25ms according to data sheet */
388 /* Mode strap pins */
389 gpio_set_value(ENET0_RX_EN__GPIO_4_2, 1);
390 gpio_set_value(ENET0_RXD0__GPIO_4_3, 1);
391 gpio_set_value(ENET0_RXD1__GPIO_4_4, 1);
393 udelay(100); /* minimum assertion time for nRST */
395 /* Deasserting FEC PHY RESET */
396 gpio_set_value(TX28_FEC_PHY_RESET, 1);
401 static void __init cfa10049_init(void)
403 enable_clk_enet_out();
404 update_fec_mac_prop(OUI_CRYSTALFONTZ);
407 static void __init cfa10037_init(void)
409 enable_clk_enet_out();
410 update_fec_mac_prop(OUI_CRYSTALFONTZ);
412 mxsfb_pdata.mode_list = cfa10049_video_modes;
413 mxsfb_pdata.mode_count = ARRAY_SIZE(cfa10049_video_modes);
414 mxsfb_pdata.default_bpp = 32;
415 mxsfb_pdata.ld_intf_width = STMLCDIF_18BIT;
418 static void __init apf28_init(void)
420 enable_clk_enet_out();
422 mxsfb_pdata.mode_list = apf28dev_video_modes;
423 mxsfb_pdata.mode_count = ARRAY_SIZE(apf28dev_video_modes);
424 mxsfb_pdata.default_bpp = 16;
425 mxsfb_pdata.ld_intf_width = STMLCDIF_16BIT;
428 static void __init mxs_machine_init(void)
430 if (of_machine_is_compatible("fsl,imx28-evk"))
432 else if (of_machine_is_compatible("fsl,imx23-evk"))
434 else if (of_machine_is_compatible("denx,m28evk"))
436 else if (of_machine_is_compatible("bluegiga,apx4devkit"))
438 else if (of_machine_is_compatible("crystalfontz,cfa10037"))
440 else if (of_machine_is_compatible("crystalfontz,cfa10049"))
442 else if (of_machine_is_compatible("armadeus,imx28-apf28"))
444 else if (of_machine_is_compatible("schulercontrol,imx28-sps1"))
447 of_platform_populate(NULL, of_default_bus_match_table,
448 mxs_auxdata_lookup, NULL);
450 if (of_machine_is_compatible("karo,tx28"))
453 if (of_machine_is_compatible("fsl,imx28-evk"))
454 imx28_evk_post_init();
457 static const char *imx23_dt_compat[] __initdata = {
462 static const char *imx28_dt_compat[] __initdata = {
467 DT_MACHINE_START(IMX23, "Freescale i.MX23 (Device Tree)")
468 .map_io = mx23_map_io,
469 .init_irq = icoll_init_irq,
470 .handle_irq = icoll_handle_irq,
471 .init_time = imx23_timer_init,
472 .init_machine = mxs_machine_init,
473 .dt_compat = imx23_dt_compat,
474 .restart = mxs_restart,
477 DT_MACHINE_START(IMX28, "Freescale i.MX28 (Device Tree)")
478 .map_io = mx28_map_io,
479 .init_irq = icoll_init_irq,
480 .handle_irq = icoll_handle_irq,
481 .init_time = imx28_timer_init,
482 .init_machine = mxs_machine_init,
483 .dt_compat = imx28_dt_compat,
484 .restart = mxs_restart,