arch/arm/mach-omap2/omap4-common.c

   1 /*
   2  * OMAP4 specific common source file.
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Author:
   6  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   7  *
   8  *
   9  * This program is free software,you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/platform_device.h>
  18
  19 #include <asm/hardware/gic.h>
  20 #include <asm/hardware/cache-l2x0.h>
  21
  22 #include <plat/irqs.h>
  23
  24 #include <mach/hardware.h>
  25
  26 #include "common.h"
  27
  28 #ifdef CONFIG_CACHE_L2X0
  29 static void __iomem *l2cache_base;
  30 #endif
  31
  32 void __init gic_init_irq(void)
  33 {
  34         void __iomem *omap_irq_base;
  35         void __iomem *gic_dist_base_addr;
  36
  37         /* Static mapping, never released */
  38         gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
  39         BUG_ON(!gic_dist_base_addr);
  40
  41         /* Static mapping, never released */
  42         omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
  43         BUG_ON(!omap_irq_base);
  44
  45         gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
  46 }
  47
  48 #ifdef CONFIG_CACHE_L2X0
  49
  50 void __iomem *omap4_get_l2cache_base(void)
  51 {
  52         return l2cache_base;
  53 }
  54
  55 static void omap4_l2x0_disable(void)
  56 {
  57         /* Disable PL310 L2 Cache controller */
  58         omap_smc1(0x102, 0x0);
  59 }
  60
  61 static void omap4_l2x0_set_debug(unsigned long val)
  62 {
  63         /* Program PL310 L2 Cache controller debug register */
  64         omap_smc1(0x100, val);
  65 }
  66
  67 static int __init omap_l2_cache_init(void)
  68 {
  69         u32 aux_ctrl = 0;
  70
  71         /*
  72          * To avoid code running on other OMAPs in
  73          * multi-omap builds
  74          */
  75         if (!cpu_is_omap44xx())
  76                 return -ENODEV;
  77
  78         /* Static mapping, never released */
  79         l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
  80         if (WARN_ON(!l2cache_base))
  81                 return -ENOMEM;
  82
  83         /*
  84          * 16-way associativity, parity disabled
  85          * Way size - 32KB (es1.0)
  86          * Way size - 64KB (es2.0 +)
  87          */
  88         aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
  89                         (0x1 << 25) |
  90                         (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
  91                         (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
  92
  93         if (omap_rev() == OMAP4430_REV_ES1_0) {
  94                 aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
  95         } else {
  96                 aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
  97                         (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
  98                         (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
  99                         (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
 100                         (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
 101         }
 102         if (omap_rev() != OMAP4430_REV_ES1_0)
 103                 omap_smc1(0x109, aux_ctrl);
 104
 105         /* Enable PL310 L2 Cache controller */
 106         omap_smc1(0x102, 0x1);
 107
 108         l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
 109
 110         /*
 111          * Override default outer_cache.disable with a OMAP4
 112          * specific one
 113         */
 114         outer_cache.disable = omap4_l2x0_disable;
 115         outer_cache.set_debug = omap4_l2x0_set_debug;
 116
 117         return 0;
 118 }
 119 early_initcall(omap_l2_cache_init);
 120 #endif