arch/arm/mach-omap2/omap4-common.c

   1 /*
   2  * OMAP4 specific common source file.
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Author:
   6  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   7  *
   8  *
   9  * This program is free software,you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/platform_device.h>
  18
  19 #include <asm/hardware/gic.h>
  20 #include <asm/hardware/cache-l2x0.h>
  21
  22 #include <plat/irqs.h>
  23
  24 #include <mach/hardware.h>
  25
  26 #include "common.h"
  27
  28 #ifdef CONFIG_CACHE_L2X0
  29 void __iomem *l2cache_base;
  30 #endif
  31
  32 void __iomem *gic_dist_base_addr;
  33
  34
  35 void __init gic_init_irq(void)
  36 {
  37         /* Static mapping, never released */
  38         gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
  39         BUG_ON(!gic_dist_base_addr);
  40
  41         /* Static mapping, never released */
  42         omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
  43         BUG_ON(!omap_irq_base);
  44
  45         gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
  46 }
  47
  48 #ifdef CONFIG_CACHE_L2X0
  49
  50 static void omap4_l2x0_disable(void)
  51 {
  52         /* Disable PL310 L2 Cache controller */
  53         omap_smc1(0x102, 0x0);
  54 }
  55
  56 static void omap4_l2x0_set_debug(unsigned long val)
  57 {
  58         /* Program PL310 L2 Cache controller debug register */
  59         omap_smc1(0x100, val);
  60 }
  61
  62 static int __init omap_l2_cache_init(void)
  63 {
  64         u32 aux_ctrl = 0;
  65
  66         /*
  67          * To avoid code running on other OMAPs in
  68          * multi-omap builds
  69          */
  70         if (!cpu_is_omap44xx())
  71                 return -ENODEV;
  72
  73         /* Static mapping, never released */
  74         l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
  75         BUG_ON(!l2cache_base);
  76
  77         /*
  78          * 16-way associativity, parity disabled
  79          * Way size - 32KB (es1.0)
  80          * Way size - 64KB (es2.0 +)
  81          */
  82         aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
  83                         (0x1 << 25) |
  84                         (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
  85                         (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
  86
  87         if (omap_rev() == OMAP4430_REV_ES1_0) {
  88                 aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
  89         } else {
  90                 aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
  91                         (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
  92                         (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
  93                         (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
  94                         (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
  95         }
  96         if (omap_rev() != OMAP4430_REV_ES1_0)
  97                 omap_smc1(0x109, aux_ctrl);
  98
  99         /* Enable PL310 L2 Cache controller */
 100         omap_smc1(0x102, 0x1);
 101
 102         l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
 103
 104         /*
 105          * Override default outer_cache.disable with a OMAP4
 106          * specific one
 107         */
 108         outer_cache.disable = omap4_l2x0_disable;
 109         outer_cache.set_debug = omap4_l2x0_set_debug;
 110
 111         return 0;
 112 }
 113 early_initcall(omap_l2_cache_init);
 114 #endif