arch/arm/mach-omap2/serial.c

   1 /*
   2  * arch/arm/mach-omap2/serial.c
   3  *
   4  * OMAP2 serial support.
   5  *
   6  * Copyright (C) 2005-2008 Nokia Corporation
   7  * Author: Paul Mundt <paul.mundt@nokia.com>
   8  *
   9  * Major rework for PM support by Kevin Hilman
  10  *
  11  * Based off of arch/arm/mach-omap/omap1/serial.c
  12  *
  13  * Copyright (C) 2009 Texas Instruments
  14  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com
  15  *
  16  * This file is subject to the terms and conditions of the GNU General Public
  17  * License. See the file "COPYING" in the main directory of this archive
  18  * for more details.
  19  */
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/clk.h>
  23 #include <linux/io.h>
  24 #include <linux/delay.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/slab.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/console.h>
  29
  30 #include <plat/omap-serial.h>
  31 #include "common.h"
  32 #include <plat/board.h>
  33 #include <plat/dma.h>
  34 #include <plat/omap_hwmod.h>
  35 #include <plat/omap_device.h>
  36 #include <plat/omap-pm.h>
  37
  38 #include "prm2xxx_3xxx.h"
  39 #include "pm.h"
  40 #include "cm2xxx_3xxx.h"
  41 #include "prm-regbits-34xx.h"
  42 #include "control.h"
  43 #include "mux.h"
  44
  45 /*
  46  * NOTE: By default the serial timeout is disabled as it causes lost characters
  47  * over the serial ports. This means that the UART clocks will stay on until
  48  * disabled via sysfs. This also causes that any deeper omap sleep states are
  49  * blocked.
  50  */
  51 #define DEFAULT_TIMEOUT 0
  52
  53 #define MAX_UART_HWMOD_NAME_LEN         16
  54
  55 struct omap_uart_state {
  56         int num;
  57         int can_sleep;
  58
  59         void __iomem *wk_st;
  60         void __iomem *wk_en;
  61         u32 wk_mask;
  62
  63         int clocked;
  64
  65         struct list_head node;
  66         struct omap_hwmod *oh;
  67         struct platform_device *pdev;
  68 };
  69
  70 static LIST_HEAD(uart_list);
  71 static u8 num_uarts;
  72
  73 static inline void omap_uart_enable_clocks(struct omap_uart_state *uart)
  74 {
  75         if (uart->clocked)
  76                 return;
  77
  78         omap_device_enable(uart->pdev);
  79         uart->clocked = 1;
  80         omap_uart_restore_context(uart);
  81 }
  82
  83 #ifdef CONFIG_PM
  84
  85 static inline void omap_uart_disable_clocks(struct omap_uart_state *uart)
  86 {
  87         if (!uart->clocked)
  88                 return;
  89
  90         omap_uart_save_context(uart);
  91         uart->clocked = 0;
  92         omap_device_idle(uart->pdev);
  93 }
  94
  95 static void omap_uart_enable_wakeup(struct omap_uart_state *uart)
  96 {
  97         /* Set wake-enable bit */
  98         if (uart->wk_en && uart->wk_mask) {
  99                 u32 v = __raw_readl(uart->wk_en);
 100                 v |= uart->wk_mask;
 101                 __raw_writel(v, uart->wk_en);
 102         }
 103 }
 104
 105 static void omap_uart_disable_wakeup(struct omap_uart_state *uart)
 106 {
 107         /* Clear wake-enable bit */
 108         if (uart->wk_en && uart->wk_mask) {
 109                 u32 v = __raw_readl(uart->wk_en);
 110                 v &= ~uart->wk_mask;
 111                 __raw_writel(v, uart->wk_en);
 112         }
 113 }
 114
 115 static void omap_uart_block_sleep(struct omap_uart_state *uart)
 116 {
 117         omap_uart_enable_clocks(uart);
 118
 119         omap_uart_smart_idle_enable(uart, 0);
 120         uart->can_sleep = 0;
 121 }
 122
 123 int omap_uart_can_sleep(void)
 124 {
 125         struct omap_uart_state *uart;
 126         int can_sleep = 1;
 127
 128         list_for_each_entry(uart, &uart_list, node) {
 129                 if (!uart->clocked)
 130                         continue;
 131
 132                 if (!uart->can_sleep) {
 133                         can_sleep = 0;
 134                         continue;
 135                 }
 136
 137                 /* This UART can now safely sleep. */
 138                 omap_uart_allow_sleep(uart);
 139         }
 140
 141         return can_sleep;
 142 }
 143
 144 static void omap_uart_idle_init(struct omap_uart_state *uart)
 145 {
 146         int ret;
 147
 148         uart->can_sleep = 0;
 149         omap_uart_smart_idle_enable(uart, 0);
 150
 151         if (cpu_is_omap34xx() && !(cpu_is_ti81xx() || cpu_is_am33xx())) {
 152                 u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
 153                 u32 wk_mask = 0;
 154
 155                 /* XXX These PRM accesses do not belong here */
 156                 uart->wk_en = OMAP34XX_PRM_REGADDR(mod, PM_WKEN1);
 157                 uart->wk_st = OMAP34XX_PRM_REGADDR(mod, PM_WKST1);
 158                 switch (uart->num) {
 159                 case 0:
 160                         wk_mask = OMAP3430_ST_UART1_MASK;
 161                         break;
 162                 case 1:
 163                         wk_mask = OMAP3430_ST_UART2_MASK;
 164                         break;
 165                 case 2:
 166                         wk_mask = OMAP3430_ST_UART3_MASK;
 167                         break;
 168                 case 3:
 169                         wk_mask = OMAP3630_ST_UART4_MASK;
 170                         break;
 171                 }
 172                 uart->wk_mask = wk_mask;
 173         } else if (cpu_is_omap24xx()) {
 174                 u32 wk_mask = 0;
 175                 u32 wk_en = PM_WKEN1, wk_st = PM_WKST1;
 176
 177                 switch (uart->num) {
 178                 case 0:
 179                         wk_mask = OMAP24XX_ST_UART1_MASK;
 180                         break;
 181                 case 1:
 182                         wk_mask = OMAP24XX_ST_UART2_MASK;
 183                         break;
 184                 case 2:
 185                         wk_en = OMAP24XX_PM_WKEN2;
 186                         wk_st = OMAP24XX_PM_WKST2;
 187                         wk_mask = OMAP24XX_ST_UART3_MASK;
 188                         break;
 189                 }
 190                 uart->wk_mask = wk_mask;
 191                 if (cpu_is_omap2430()) {
 192                         uart->wk_en = OMAP2430_PRM_REGADDR(CORE_MOD, wk_en);
 193                         uart->wk_st = OMAP2430_PRM_REGADDR(CORE_MOD, wk_st);
 194                 } else if (cpu_is_omap2420()) {
 195                         uart->wk_en = OMAP2420_PRM_REGADDR(CORE_MOD, wk_en);
 196                         uart->wk_st = OMAP2420_PRM_REGADDR(CORE_MOD, wk_st);
 197                 }
 198         } else {
 199                 uart->wk_en = NULL;
 200                 uart->wk_st = NULL;
 201                 uart->wk_mask = 0;
 202         }
 203 }
 204
 205 /*
 206  * Errata i291: [UART]:Cannot Acknowledge Idle Requests
 207  * in Smartidle Mode When Configured for DMA Operations.
 208  * WA: configure uart in force idle mode.
 209  */
 210 static void omap_uart_set_noidle(struct platform_device *pdev)
 211 {
 212         struct omap_device *od = to_omap_device(pdev);
 213
 214         omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_NO);
 215 }
 216
 217 static void omap_uart_set_forceidle(struct platform_device *pdev)
 218 {
 219         struct omap_device *od = to_omap_device(pdev);
 220
 221         omap_hwmod_set_slave_idlemode(od->hwmods[0], HWMOD_IDLEMODE_FORCE);
 222 }
 223
 224 #else
 225 static void omap_uart_set_noidle(struct platform_device *pdev) {}
 226 static void omap_uart_set_forceidle(struct platform_device *pdev) {}
 227 static void omap_uart_block_sleep(struct omap_uart_state *uart)
 228 {
 229         /* Needed to enable UART clocks when built without CONFIG_PM */
 230         omap_uart_enable_clocks(uart);
 231 }
 232 #endif /* CONFIG_PM */
 233
 234 #ifdef CONFIG_OMAP_MUX
 235 static struct omap_device_pad default_uart1_pads[] __initdata = {
 236         {
 237                 .name   = "uart1_cts.uart1_cts",
 238                 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 239         },
 240         {
 241                 .name   = "uart1_rts.uart1_rts",
 242                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 243         },
 244         {
 245                 .name   = "uart1_tx.uart1_tx",
 246                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 247         },
 248         {
 249                 .name   = "uart1_rx.uart1_rx",
 250                 .flags  = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
 251                 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 252                 .idle   = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 253         },
 254 };
 255
 256 static struct omap_device_pad default_uart2_pads[] __initdata = {
 257         {
 258                 .name   = "uart2_cts.uart2_cts",
 259                 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 260         },
 261         {
 262                 .name   = "uart2_rts.uart2_rts",
 263                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 264         },
 265         {
 266                 .name   = "uart2_tx.uart2_tx",
 267                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 268         },
 269         {
 270                 .name   = "uart2_rx.uart2_rx",
 271                 .flags  = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
 272                 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 273                 .idle   = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 274         },
 275 };
 276
 277 static struct omap_device_pad default_uart3_pads[] __initdata = {
 278         {
 279                 .name   = "uart3_cts_rctx.uart3_cts_rctx",
 280                 .enable = OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0,
 281         },
 282         {
 283                 .name   = "uart3_rts_sd.uart3_rts_sd",
 284                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 285         },
 286         {
 287                 .name   = "uart3_tx_irtx.uart3_tx_irtx",
 288                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 289         },
 290         {
 291                 .name   = "uart3_rx_irrx.uart3_rx_irrx",
 292                 .flags  = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
 293                 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
 294                 .idle   = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
 295         },
 296 };
 297
 298 static struct omap_device_pad default_omap36xx_uart4_pads[] __initdata = {
 299         {
 300                 .name   = "gpmc_wait2.uart4_tx",
 301                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 302         },
 303         {
 304                 .name   = "gpmc_wait3.uart4_rx",
 305                 .flags  = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
 306                 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
 307                 .idle   = OMAP_PIN_INPUT | OMAP_MUX_MODE2,
 308         },
 309 };
 310
 311 static struct omap_device_pad default_omap4_uart4_pads[] __initdata = {
 312         {
 313                 .name   = "uart4_tx.uart4_tx",
 314                 .enable = OMAP_PIN_OUTPUT | OMAP_MUX_MODE0,
 315         },
 316         {
 317                 .name   = "uart4_rx.uart4_rx",
 318                 .flags  = OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
 319                 .enable = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
 320                 .idle   = OMAP_PIN_INPUT | OMAP_MUX_MODE0,
 321         },
 322 };
 323
 324 static void omap_serial_fill_default_pads(struct omap_board_data *bdata)
 325 {
 326         switch (bdata->id) {
 327         case 0:
 328                 bdata->pads = default_uart1_pads;
 329                 bdata->pads_cnt = ARRAY_SIZE(default_uart1_pads);
 330                 break;
 331         case 1:
 332                 bdata->pads = default_uart2_pads;
 333                 bdata->pads_cnt = ARRAY_SIZE(default_uart2_pads);
 334                 break;
 335         case 2:
 336                 bdata->pads = default_uart3_pads;
 337                 bdata->pads_cnt = ARRAY_SIZE(default_uart3_pads);
 338                 break;
 339         case 3:
 340                 if (cpu_is_omap44xx()) {
 341                         bdata->pads = default_omap4_uart4_pads;
 342                         bdata->pads_cnt =
 343                                 ARRAY_SIZE(default_omap4_uart4_pads);
 344                 } else if (cpu_is_omap3630()) {
 345                         bdata->pads = default_omap36xx_uart4_pads;
 346                         bdata->pads_cnt =
 347                                 ARRAY_SIZE(default_omap36xx_uart4_pads);
 348                 }
 349                 break;
 350         default:
 351                 break;
 352         }
 353 }
 354 #else
 355 static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {}
 356 #endif
 357
 358 static int __init omap_serial_early_init(void)
 359 {
 360         int i = 0;
 361
 362         do {
 363                 char oh_name[MAX_UART_HWMOD_NAME_LEN];
 364                 struct omap_hwmod *oh;
 365                 struct omap_uart_state *uart;
 366
 367                 snprintf(oh_name, MAX_UART_HWMOD_NAME_LEN,
 368                          "uart%d", i + 1);
 369                 oh = omap_hwmod_lookup(oh_name);
 370                 if (!oh)
 371                         break;
 372
 373                 uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
 374                 if (WARN_ON(!uart))
 375                         return -ENODEV;
 376
 377                 uart->oh = oh;
 378                 uart->num = i++;
 379                 list_add_tail(&uart->node, &uart_list);
 380                 num_uarts++;
 381
 382                 /*
 383                  * NOTE: omap_hwmod_setup*() has not yet been called,
 384                  *       so no hwmod functions will work yet.
 385                  */
 386
 387                 /*
 388                  * During UART early init, device need to be probed
 389                  * to determine SoC specific init before omap_device
 390                  * is ready.  Therefore, don't allow idle here
 391                  */
 392                 uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
 393         } while (1);
 394
 395         return 0;
 396 }
 397 core_initcall(omap_serial_early_init);
 398
 399 /**
 400  * omap_serial_init_port() - initialize single serial port
 401  * @bdata: port specific board data pointer
 402  *
 403  * This function initialies serial driver for given port only.
 404  * Platforms can call this function instead of omap_serial_init()
 405  * if they don't plan to use all available UARTs as serial ports.
 406  *
 407  * Don't mix calls to omap_serial_init_port() and omap_serial_init(),
 408  * use only one of the two.
 409  */
 410 void __init omap_serial_init_port(struct omap_board_data *bdata)
 411 {
 412         struct omap_uart_state *uart;
 413         struct omap_hwmod *oh;
 414         struct platform_device *pdev;
 415         void *pdata = NULL;
 416         u32 pdata_size = 0;
 417         char *name;
 418         struct omap_uart_port_info omap_up;
 419
 420         if (WARN_ON(!bdata))
 421                 return;
 422         if (WARN_ON(bdata->id < 0))
 423                 return;
 424         if (WARN_ON(bdata->id >= num_uarts))
 425                 return;
 426
 427         list_for_each_entry(uart, &uart_list, node)
 428                 if (bdata->id == uart->num)
 429                         break;
 430
 431         oh = uart->oh;
 432         name = DRIVER_NAME;
 433
 434         omap_up.dma_enabled = uart->dma_enabled;
 435         omap_up.uartclk = OMAP24XX_BASE_BAUD * 16;
 436         omap_up.flags = UPF_BOOT_AUTOCONF;
 437         omap_up.get_context_loss_count = omap_pm_get_dev_context_loss_count;
 438         omap_up.set_forceidle = omap_uart_set_forceidle;
 439         omap_up.set_noidle = omap_uart_set_noidle;
 440
 441         /* Enable the MDR1 Errata i202 for OMAP2430/3xxx/44xx */
 442         if (!cpu_is_omap2420() && !cpu_is_ti816x())
 443                 omap_up.errata |= UART_ERRATA_i202_MDR1_ACCESS;
 444
 445         /* Enable DMA Mode Force Idle Errata i291 for omap34xx/3630 */
 446         if (cpu_is_omap34xx() || cpu_is_omap3630())
 447                 omap_up.errata |= UART_ERRATA_i291_DMA_FORCEIDLE;
 448
 449         pdata = &omap_up;
 450         pdata_size = sizeof(struct omap_uart_port_info);
 451
 452         if (WARN_ON(!oh))
 453                 return;
 454
 455         pdev = omap_device_build(name, uart->num, oh, pdata, pdata_size,
 456                                  NULL, 0, false);
 457         WARN(IS_ERR(pdev), "Could not build omap_device for %s: %s.\n",
 458              name, oh->name);
 459
 460         omap_device_disable_idle_on_suspend(pdev);
 461         oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
 462
 463         uart->pdev = pdev;
 464
 465         oh->dev_attr = uart;
 466
 467         console_lock(); /* in case the earlycon is on the UART */
 468
 469         /*
 470          * Because of early UART probing, UART did not get idled
 471          * on init.  Now that omap_device is ready, ensure full idle
 472          * before doing omap_device_enable().
 473          */
 474         omap_hwmod_idle(uart->oh);
 475
 476         omap_device_enable(uart->pdev);
 477         omap_uart_idle_init(uart);
 478         omap_hwmod_enable_wakeup(uart->oh);
 479         omap_device_idle(uart->pdev);
 480
 481         omap_uart_block_sleep(uart);
 482         console_unlock();
 483
 484         if (((cpu_is_omap34xx() || cpu_is_omap44xx()) && bdata->pads) ||
 485                 (pdata->wk_en && pdata->wk_mask))
 486                 device_init_wakeup(&pdev->dev, true);
 487 }
 488
 489 /**
 490  * omap_serial_init() - initialize all supported serial ports
 491  *
 492  * Initializes all available UARTs as serial ports. Platforms
 493  * can call this function when they want to have default behaviour
 494  * for serial ports (e.g initialize them all as serial ports).
 495  */
 496 void __init omap_serial_init(void)
 497 {
 498         struct omap_uart_state *uart;
 499         struct omap_board_data bdata;
 500
 501         list_for_each_entry(uart, &uart_list, node) {
 502                 bdata.id = uart->num;
 503                 bdata.flags = 0;
 504                 bdata.pads = NULL;
 505                 bdata.pads_cnt = 0;
 506
 507                 if (cpu_is_omap44xx() || cpu_is_omap34xx())
 508                         omap_serial_fill_default_pads(&bdata);
 509
 510                 omap_serial_init_port(&bdata);
 511
 512         }
 513 }