2 * Support for the Arcom ZEUS.
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
6 * Loosely based on Arcom's 2.6.16.28.
7 * Maintained by Marc Zyngier <maz@misterjones.org>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/cpufreq.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
18 #include <linux/gpio.h>
19 #include <linux/serial_8250.h>
20 #include <linux/dm9000.h>
21 #include <linux/mmc/host.h>
22 #include <linux/spi/spi.h>
23 #include <linux/spi/pxa2xx_spi.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/i2c.h>
28 #include <linux/i2c/pxa-i2c.h>
29 #include <linux/platform_data/pca953x.h>
30 #include <linux/apm-emulation.h>
31 #include <linux/can/platform/mcp251x.h>
32 #include <linux/regulator/fixed.h>
33 #include <linux/regulator/machine.h>
35 #include <asm/mach-types.h>
36 #include <asm/suspend.h>
37 #include <asm/system_info.h>
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
41 #include <mach/pxa27x.h>
42 #include <mach/regs-uart.h>
43 #include <linux/platform_data/usb-ohci-pxa27x.h>
44 #include <linux/platform_data/mmc-pxamci.h>
45 #include <mach/pxa27x-udc.h>
47 #include <linux/platform_data/video-pxafb.h>
49 #include <mach/audio.h>
50 #include <linux/platform_data/pcmcia-pxa2xx_viper.h>
51 #include <mach/zeus.h>
52 #include <mach/smemc.h>
60 static unsigned long zeus_irq_enabled_mask;
61 static const int zeus_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, };
62 static const int zeus_isa_irq_map[] = {
63 0, /* ISA irq #0, invalid */
64 0, /* ISA irq #1, invalid */
65 0, /* ISA irq #2, invalid */
66 1 << 0, /* ISA irq #3 */
67 1 << 1, /* ISA irq #4 */
68 1 << 2, /* ISA irq #5 */
69 1 << 3, /* ISA irq #6 */
70 1 << 4, /* ISA irq #7 */
71 0, /* ISA irq #8, invalid */
72 0, /* ISA irq #9, invalid */
73 1 << 5, /* ISA irq #10 */
74 1 << 6, /* ISA irq #11 */
75 1 << 7, /* ISA irq #12 */
78 static inline int zeus_irq_to_bitmask(unsigned int irq)
80 return zeus_isa_irq_map[irq - PXA_ISA_IRQ(0)];
83 static inline int zeus_bit_to_irq(int bit)
85 return zeus_isa_irqs[bit] + PXA_ISA_IRQ(0);
88 static void zeus_ack_irq(struct irq_data *d)
90 __raw_writew(zeus_irq_to_bitmask(d->irq), ZEUS_CPLD_ISA_IRQ);
93 static void zeus_mask_irq(struct irq_data *d)
95 zeus_irq_enabled_mask &= ~(zeus_irq_to_bitmask(d->irq));
98 static void zeus_unmask_irq(struct irq_data *d)
100 zeus_irq_enabled_mask |= zeus_irq_to_bitmask(d->irq);
103 static inline unsigned long zeus_irq_pending(void)
105 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask;
108 static void zeus_irq_handler(unsigned int irq, struct irq_desc *desc)
110 unsigned long pending;
112 pending = zeus_irq_pending();
114 /* we're in a chained irq handler,
115 * so ack the interrupt by hand */
116 desc->irq_data.chip->irq_ack(&desc->irq_data);
118 if (likely(pending)) {
119 irq = zeus_bit_to_irq(__ffs(pending));
120 generic_handle_irq(irq);
122 pending = zeus_irq_pending();
126 static struct irq_chip zeus_irq_chip = {
128 .irq_ack = zeus_ack_irq,
129 .irq_mask = zeus_mask_irq,
130 .irq_unmask = zeus_unmask_irq,
133 static void __init zeus_init_irq(void)
140 /* Peripheral IRQs. It would be nice to move those inside driver
141 configuration, but it is not supported at the moment. */
142 irq_set_irq_type(gpio_to_irq(ZEUS_AC97_GPIO), IRQ_TYPE_EDGE_RISING);
143 irq_set_irq_type(gpio_to_irq(ZEUS_WAKEUP_GPIO), IRQ_TYPE_EDGE_RISING);
144 irq_set_irq_type(gpio_to_irq(ZEUS_PTT_GPIO), IRQ_TYPE_EDGE_RISING);
145 irq_set_irq_type(gpio_to_irq(ZEUS_EXTGPIO_GPIO),
146 IRQ_TYPE_EDGE_FALLING);
147 irq_set_irq_type(gpio_to_irq(ZEUS_CAN_GPIO), IRQ_TYPE_EDGE_FALLING);
150 for (level = 0; level < ARRAY_SIZE(zeus_isa_irqs); level++) {
151 isa_irq = zeus_bit_to_irq(level);
152 irq_set_chip_and_handler(isa_irq, &zeus_irq_chip,
154 set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
157 irq_set_irq_type(gpio_to_irq(ZEUS_ISA_GPIO), IRQ_TYPE_EDGE_RISING);
158 irq_set_chained_handler(gpio_to_irq(ZEUS_ISA_GPIO), zeus_irq_handler);
167 static struct resource zeus_mtd_resources[] = {
168 [0] = { /* NOR Flash (up to 64MB) */
169 .start = ZEUS_FLASH_PHYS,
170 .end = ZEUS_FLASH_PHYS + SZ_64M - 1,
171 .flags = IORESOURCE_MEM,
174 .start = ZEUS_SRAM_PHYS,
175 .end = ZEUS_SRAM_PHYS + SZ_512K - 1,
176 .flags = IORESOURCE_MEM,
180 static struct physmap_flash_data zeus_flash_data[] = {
188 static struct platform_device zeus_mtd_devices[] = {
190 .name = "physmap-flash",
193 .platform_data = &zeus_flash_data[0],
195 .resource = &zeus_mtd_resources[0],
201 static struct resource zeus_serial_resources[] = {
205 .flags = IORESOURCE_MEM,
210 .flags = IORESOURCE_MEM,
215 .flags = IORESOURCE_MEM,
220 .flags = IORESOURCE_MEM,
225 .flags = IORESOURCE_MEM,
230 .flags = IORESOURCE_MEM,
234 static struct plat_serial8250_port serial_platform_data[] = {
236 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
238 .mapbase = 0x10000000,
239 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
240 .irqflags = IRQF_TRIGGER_RISING,
243 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
247 .mapbase = 0x10800000,
248 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
249 .irqflags = IRQF_TRIGGER_RISING,
252 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
256 .mapbase = 0x11000000,
257 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
258 .irqflags = IRQF_TRIGGER_RISING,
261 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
265 .mapbase = 0x11800000,
266 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
267 .irqflags = IRQF_TRIGGER_RISING,
270 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
275 .membase = (void *)&FFUART,
276 .mapbase = __PREG(FFUART),
278 .uartclk = 921600 * 16,
280 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
284 .membase = (void *)&BTUART,
285 .mapbase = __PREG(BTUART),
287 .uartclk = 921600 * 16,
289 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
293 .membase = (void *)&STUART,
294 .mapbase = __PREG(STUART),
296 .uartclk = 921600 * 16,
298 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
304 static struct platform_device zeus_serial_device = {
305 .name = "serial8250",
306 .id = PLAT8250_DEV_PLATFORM,
308 .platform_data = serial_platform_data,
310 .num_resources = ARRAY_SIZE(zeus_serial_resources),
311 .resource = zeus_serial_resources,
315 static struct resource zeus_dm9k0_resource[] = {
317 .start = ZEUS_ETH0_PHYS,
318 .end = ZEUS_ETH0_PHYS + 1,
319 .flags = IORESOURCE_MEM
322 .start = ZEUS_ETH0_PHYS + 2,
323 .end = ZEUS_ETH0_PHYS + 3,
324 .flags = IORESOURCE_MEM
327 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
328 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
329 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
333 static struct resource zeus_dm9k1_resource[] = {
335 .start = ZEUS_ETH1_PHYS,
336 .end = ZEUS_ETH1_PHYS + 1,
337 .flags = IORESOURCE_MEM
340 .start = ZEUS_ETH1_PHYS + 2,
341 .end = ZEUS_ETH1_PHYS + 3,
342 .flags = IORESOURCE_MEM,
345 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
346 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
347 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
351 static struct dm9000_plat_data zeus_dm9k_platdata = {
352 .flags = DM9000_PLATF_16BITONLY,
355 static struct platform_device zeus_dm9k0_device = {
358 .num_resources = ARRAY_SIZE(zeus_dm9k0_resource),
359 .resource = zeus_dm9k0_resource,
361 .platform_data = &zeus_dm9k_platdata,
365 static struct platform_device zeus_dm9k1_device = {
368 .num_resources = ARRAY_SIZE(zeus_dm9k1_resource),
369 .resource = zeus_dm9k1_resource,
371 .platform_data = &zeus_dm9k_platdata,
376 static struct resource zeus_sram_resource = {
377 .start = ZEUS_SRAM_PHYS,
378 .end = ZEUS_SRAM_PHYS + ZEUS_SRAM_SIZE * 2 - 1,
379 .flags = IORESOURCE_MEM,
382 static struct platform_device zeus_sram_device = {
383 .name = "pxa2xx-8bit-sram",
386 .resource = &zeus_sram_resource,
389 /* SPI interface on SSP3 */
390 static struct pxa2xx_spi_master pxa2xx_spi_ssp3_master_info = {
396 static struct regulator_consumer_supply can_regulator_consumer =
397 REGULATOR_SUPPLY("vdd", "spi3.0");
399 static struct regulator_init_data can_regulator_init_data = {
401 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
403 .consumer_supplies = &can_regulator_consumer,
404 .num_consumer_supplies = 1,
407 static struct fixed_voltage_config can_regulator_pdata = {
408 .supply_name = "CAN_SHDN",
409 .microvolts = 3300000,
410 .gpio = ZEUS_CAN_SHDN_GPIO,
411 .init_data = &can_regulator_init_data,
414 static struct platform_device can_regulator_device = {
415 .name = "reg-fixed-volage",
418 .platform_data = &can_regulator_pdata,
422 static struct mcp251x_platform_data zeus_mcp2515_pdata = {
423 .oscillator_frequency = 16*1000*1000,
426 static struct spi_board_info zeus_spi_board_info[] = {
428 .modalias = "mcp2515",
429 .platform_data = &zeus_mcp2515_pdata,
430 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
431 .max_speed_hz = 1*1000*1000,
439 static struct gpio_led zeus_leds[] = {
441 .name = "zeus:yellow:1",
442 .default_trigger = "heartbeat",
443 .gpio = ZEUS_EXT0_GPIO(3),
447 .name = "zeus:yellow:2",
448 .default_trigger = "default-on",
449 .gpio = ZEUS_EXT0_GPIO(4),
453 .name = "zeus:yellow:3",
454 .default_trigger = "default-on",
455 .gpio = ZEUS_EXT0_GPIO(5),
460 static struct gpio_led_platform_data zeus_leds_info = {
462 .num_leds = ARRAY_SIZE(zeus_leds),
465 static struct platform_device zeus_leds_device = {
469 .platform_data = &zeus_leds_info,
473 static void zeus_cf_reset(int state)
475 u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL);
478 cpld_state |= ZEUS_CPLD_CONTROL_CF_RST;
480 cpld_state &= ~ZEUS_CPLD_CONTROL_CF_RST;
482 __raw_writew(cpld_state, ZEUS_CPLD_CONTROL);
485 static struct arcom_pcmcia_pdata zeus_pcmcia_info = {
486 .cd_gpio = ZEUS_CF_CD_GPIO,
487 .rdy_gpio = ZEUS_CF_RDY_GPIO,
488 .pwr_gpio = ZEUS_CF_PWEN_GPIO,
489 .reset = zeus_cf_reset,
492 static struct platform_device zeus_pcmcia_device = {
493 .name = "zeus-pcmcia",
496 .platform_data = &zeus_pcmcia_info,
500 static struct resource zeus_max6369_resource = {
501 .start = ZEUS_CPLD_EXTWDOG_PHYS,
502 .end = ZEUS_CPLD_EXTWDOG_PHYS,
503 .flags = IORESOURCE_MEM,
506 struct platform_device zeus_max6369_device = {
507 .name = "max6369_wdt",
509 .resource = &zeus_max6369_resource,
514 static pxa2xx_audio_ops_t zeus_ac97_info = {
523 static struct regulator_consumer_supply zeus_ohci_regulator_supplies[] = {
524 REGULATOR_SUPPLY("vbus2", "pxa27x-ohci"),
527 static struct regulator_init_data zeus_ohci_regulator_data = {
529 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
531 .num_consumer_supplies = ARRAY_SIZE(zeus_ohci_regulator_supplies),
532 .consumer_supplies = zeus_ohci_regulator_supplies,
535 static struct fixed_voltage_config zeus_ohci_regulator_config = {
536 .supply_name = "vbus2",
537 .microvolts = 5000000, /* 5.0V */
538 .gpio = ZEUS_USB2_PWREN_GPIO,
541 .init_data = &zeus_ohci_regulator_data,
544 static struct platform_device zeus_ohci_regulator_device = {
545 .name = "reg-fixed-voltage",
548 .platform_data = &zeus_ohci_regulator_config,
552 static struct pxaohci_platform_data zeus_ohci_platform_data = {
553 .port_mode = PMM_NPS_MODE,
554 /* Clear Power Control Polarity Low and set Power Sense
555 * Polarity Low. Supply power to USB ports. */
556 .flags = ENABLE_PORT_ALL | POWER_SENSE_LOW,
559 static void zeus_register_ohci(void)
561 /* Port 2 is shared between host and client interface. */
562 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
564 pxa_set_ohci_info(&zeus_ohci_platform_data);
571 static void zeus_lcd_power(int on, struct fb_var_screeninfo *si)
573 gpio_set_value(ZEUS_LCD_EN_GPIO, on);
576 static void zeus_backlight_power(int on)
578 gpio_set_value(ZEUS_BKLEN_GPIO, on);
581 static int zeus_setup_fb_gpios(void)
585 if ((err = gpio_request(ZEUS_LCD_EN_GPIO, "LCD_EN")))
588 if ((err = gpio_direction_output(ZEUS_LCD_EN_GPIO, 0)))
591 if ((err = gpio_request(ZEUS_BKLEN_GPIO, "BKLEN")))
594 if ((err = gpio_direction_output(ZEUS_BKLEN_GPIO, 0)))
600 gpio_free(ZEUS_BKLEN_GPIO);
602 gpio_free(ZEUS_LCD_EN_GPIO);
607 static struct pxafb_mode_info zeus_fb_mode_info[] = {
628 static struct pxafb_mach_info zeus_fb_info = {
629 .modes = zeus_fb_mode_info,
631 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
632 .pxafb_lcd_power = zeus_lcd_power,
633 .pxafb_backlight_power = zeus_backlight_power,
639 * The card detect interrupt isn't debounced so we delay it by 250ms
640 * to give the card a chance to fully insert/eject.
643 static struct pxamci_platform_data zeus_mci_platform_data = {
644 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
645 .detect_delay_ms = 250,
646 .gpio_card_detect = ZEUS_MMC_CD_GPIO,
647 .gpio_card_ro = ZEUS_MMC_WP_GPIO,
648 .gpio_card_ro_invert = 1,
653 * USB Device Controller
655 static void zeus_udc_command(int cmd)
658 case PXA2XX_UDC_CMD_DISCONNECT:
659 pr_info("zeus: disconnecting USB client\n");
660 UP2OCR = UP2OCR_HXOE | UP2OCR_HXS | UP2OCR_DMPDE | UP2OCR_DPPDE;
663 case PXA2XX_UDC_CMD_CONNECT:
664 pr_info("zeus: connecting USB client\n");
665 UP2OCR = UP2OCR_HXOE | UP2OCR_DPPUE;
670 static struct pxa2xx_udc_mach_info zeus_udc_info = {
671 .udc_command = zeus_udc_command,
674 static struct platform_device *zeus_devices[] __initdata = {
676 &zeus_mtd_devices[0],
682 &zeus_max6369_device,
683 &can_regulator_device,
684 &zeus_ohci_regulator_device,
688 static void zeus_power_off(void)
691 cpu_suspend(PWRMODE_DEEPSLEEP, pxa27x_finish_suspend);
694 #define zeus_power_off NULL
697 #ifdef CONFIG_APM_EMULATION
698 static void zeus_get_power_status(struct apm_power_info *info)
700 /* Power supply is always present */
701 info->ac_line_status = APM_AC_ONLINE;
702 info->battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
703 info->battery_flag = APM_BATTERY_FLAG_NOT_PRESENT;
706 static inline void zeus_setup_apm(void)
708 apm_get_power_status = zeus_get_power_status;
711 static inline void zeus_setup_apm(void)
716 static int zeus_get_pcb_info(struct i2c_client *client, unsigned gpio,
717 unsigned ngpio, void *context)
722 for (i = 0; i < 8; i++) {
723 int pcb_bit = gpio + i + 8;
725 if (gpio_request(pcb_bit, "pcb info")) {
726 dev_err(&client->dev, "Can't request pcb info %d\n", i);
730 if (gpio_direction_input(pcb_bit)) {
731 dev_err(&client->dev, "Can't read pcb info %d\n", i);
736 pcb_info |= !!gpio_get_value(pcb_bit) << i;
741 dev_info(&client->dev, "Zeus PCB version %d issue %d\n",
742 pcb_info >> 4, pcb_info & 0xf);
747 static struct pca953x_platform_data zeus_pca953x_pdata[] = {
748 [0] = { .gpio_base = ZEUS_EXT0_GPIO_BASE, },
750 .gpio_base = ZEUS_EXT1_GPIO_BASE,
751 .setup = zeus_get_pcb_info,
753 [2] = { .gpio_base = ZEUS_USER_GPIO_BASE, },
756 static struct i2c_board_info __initdata zeus_i2c_devices[] = {
758 I2C_BOARD_INFO("pca9535", 0x21),
759 .platform_data = &zeus_pca953x_pdata[0],
762 I2C_BOARD_INFO("pca9535", 0x22),
763 .platform_data = &zeus_pca953x_pdata[1],
766 I2C_BOARD_INFO("pca9535", 0x20),
767 .platform_data = &zeus_pca953x_pdata[2],
768 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
770 { I2C_BOARD_INFO("lm75a", 0x48) },
771 { I2C_BOARD_INFO("24c01", 0x50) },
772 { I2C_BOARD_INFO("isl1208", 0x6f) },
775 static mfp_cfg_t zeus_pin_config[] __initdata = {
778 GPIO29_AC97_SDATA_IN_0,
779 GPIO30_AC97_SDATA_OUT,
822 GPIO36_GPIO, /* CF CD */
823 GPIO97_GPIO, /* CF PWREN */
824 GPIO99_GPIO, /* CF RDY */
828 * DM9k MSCx settings: SRAM, 16 bits
829 * 17 cycles delay first access
830 * 5 cycles delay next access
831 * 13 cycles recovery time
834 #define DM9K_MSC_VALUE 0xe4c9
836 static void __init zeus_init(void)
838 u16 dm9000_msc = DM9K_MSC_VALUE;
841 system_rev = __raw_readw(ZEUS_CPLD_VERSION);
842 pr_info("Zeus CPLD V%dI%d\n", (system_rev & 0xf0) >> 4, (system_rev & 0x0f));
844 /* Fix timings for dm9000s (CS1/CS2)*/
845 msc0 = (__raw_readl(MSC0) & 0x0000ffff) | (dm9000_msc << 16);
846 msc1 = (__raw_readl(MSC1) & 0xffff0000) | dm9000_msc;
847 __raw_writel(msc0, MSC0);
848 __raw_writel(msc1, MSC1);
850 pm_power_off = zeus_power_off;
853 pxa2xx_mfp_config(ARRAY_AND_SIZE(zeus_pin_config));
855 platform_add_devices(zeus_devices, ARRAY_SIZE(zeus_devices));
857 zeus_register_ohci();
859 if (zeus_setup_fb_gpios())
860 pr_err("Failed to setup fb gpios\n");
862 pxa_set_fb_info(NULL, &zeus_fb_info);
864 pxa_set_mci_info(&zeus_mci_platform_data);
865 pxa_set_udc_info(&zeus_udc_info);
866 pxa_set_ac97_info(&zeus_ac97_info);
867 pxa_set_i2c_info(NULL);
868 i2c_register_board_info(0, ARRAY_AND_SIZE(zeus_i2c_devices));
869 pxa2xx_set_spi_info(3, &pxa2xx_spi_ssp3_master_info);
870 spi_register_board_info(zeus_spi_board_info, ARRAY_SIZE(zeus_spi_board_info));
873 static struct map_desc zeus_io_desc[] __initdata = {
875 .virtual = (unsigned long)ZEUS_CPLD_VERSION,
876 .pfn = __phys_to_pfn(ZEUS_CPLD_VERSION_PHYS),
881 .virtual = (unsigned long)ZEUS_CPLD_ISA_IRQ,
882 .pfn = __phys_to_pfn(ZEUS_CPLD_ISA_IRQ_PHYS),
887 .virtual = (unsigned long)ZEUS_CPLD_CONTROL,
888 .pfn = __phys_to_pfn(ZEUS_CPLD_CONTROL_PHYS),
893 .virtual = (unsigned long)ZEUS_PC104IO,
894 .pfn = __phys_to_pfn(ZEUS_PC104IO_PHYS),
895 .length = 0x00800000,
900 static void __init zeus_map_io(void)
904 iotable_init(zeus_io_desc, ARRAY_SIZE(zeus_io_desc));
906 /* Clear PSPR to ensure a full restart on wake-up. */
909 /* enable internal 32.768Khz oscillator (ignore OSCC_OOK) */
912 /* Some clock cycles later (from OSCC_ON), programme PCFR (OPDE...).
913 * float chip selects and PCMCIA */
914 PCFR = PCFR_OPDE | PCFR_DC_EN | PCFR_FS | PCFR_FP;
917 MACHINE_START(ARCOM_ZEUS, "Arcom/Eurotech ZEUS")
918 /* Maintainer: Marc Zyngier <maz@misterjones.org> */
919 .atag_offset = 0x100,
920 .map_io = zeus_map_io,
921 .nr_irqs = ZEUS_NR_IRQS,
922 .init_irq = zeus_init_irq,
923 .handle_irq = pxa27x_handle_irq,
924 .init_time = pxa_timer_init,
925 .init_machine = zeus_init,
926 .restart = pxa_restart,