arch/arm/mach-rk2818/include/mach/rk2818_iomap.h

   1 /* arch/arm/mach-rk2818/include/mach/rk281x_iomap.h
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  *
  15  *
  16  */
  17
  18 #ifndef __ASM_ARCH_RK2818_IOMAP_H
  19 #define __ASM_ARCH_RK2818_IOMAP_H
  20
  21 #include <asm/sizes.h>
  22
  23 /* defines */
  24
  25 #define         SZ_22K                          0x5800
  26
  27 /* Physical base address and size of peripherals.
  28  * Ordered by the virtual base addresses they will be mapped at.
  29  *
  30  * RK2818_VIC_BASE must be an value that can be loaded via a "mov"
  31  * instruction, otherwise entry-macro.S will not compile.
  32  *
  33  * If you add or remove entries here, you'll want to edit the
  34  * rk2818_io_desc array in arch/arm/mach-rk2818/io.c to reflect your
  35  * changes.
  36  *
  37  */
  38 //ÄÚ´æÎïÀíµØÖ·
  39 #ifdef CONFIG_DRAM_BASE
  40 #define RK2818_SDRAM_BASE               0x60000000//CONFIG_DRAM_BASE
  41 #else
  42 #define RK2818_SDRAM_PHYS               0x60000000
  43 #define RK2818_SDRAM_SIZE               (0x00100000*64)
  44 #endif
  45
  46 #define RK2818_AHB_PHYS                         0x10000000                      //AHB ×ÜÏßÉè±¸»ùÎïÀíµØÖ·
  47 #define RK2818_AHB_SIZE                             0x00100000                  // size:1M
  48
  49 #define RK2818_APB_BASE                     0xFF100000
  50 #define RK2818_APB_PHYS                         0x18000000                      // APB×ÜÏßÉè±¸»ùÎïÀíµØÖ·
  51 #define RK2818_APB_SIZE                             0x00100000                  // size:1M
  52
  53 #define RK2818_BOOTROM_PHYS             0x10000000
  54 #define RK2818_BOOTROM_SIZE             SZ_8K
  55
  56 #define RK2818_SRAM_PHYS                        0x10002000
  57 #define RK2818_SRAM_SIZE                SZ_8K
  58
  59 #define RK2818_USBOTG_PHYS              0x10040000
  60 #define RK2818_USBOTG_SIZE              SZ_256K
  61
  62 #define RK2818_MCDMA_BASE               0xFF080000
  63 #define RK2818_MCDMA_PHYS               0x10080000
  64 #define RK2818_MCDMA_SIZE               SZ_8K
  65
  66 #define RK2818_SHAREMEM_PHYS            0x10090000
  67 #define RK2818_SHAREMEM_SIZE            SZ_64K
  68
  69 #define RK2818_DWDMA_BASE               0xFF0A0000
  70 #define RK2818_DWDMA_PHYS               0x100A0000
  71 #define RK2818_DWDMA_SIZE               SZ_8K
  72
  73 #define RK2818_HOSTIF_PHYS              0x100A2000
  74 #define RK2818_HOSTIF_SIZE              SZ_8K
  75
  76 #define RK2818_LCDC_PHYS                0x100A4000
  77 #define RK2818_LCDC_SIZE                SZ_8K
  78
  79 #define RK2818_VIP_PHYS                 0x100A6000
  80 #define RK2818_VIP_SIZE                     SZ_8K
  81
  82 #define RK2818_SDMMC1_PHYS              0x100A8000
  83 #define RK2818_SDMMC1_SIZE              SZ_8K
  84
  85 #define RK2818_INTC_BASE                    0xFF0AA000
  86 #define RK2818_INTC_PHYS                    0x100AA000
  87 #define RK2818_INTC_SIZE                    SZ_8K
  88
  89 #define RK2818_SDMMC0_PHYS              0x100AC000
  90 #define RK2818_SDMMC0_SIZE              SZ_8K
  91
  92 #define RK2818_NANDC_PHYS                   0x100AE000
  93 #define RK2818_NANDC_SIZE                   SZ_16K
  94
  95 #define RK2818_SDRAMC_PHYS              0x100B0000
  96 #define RK2818_SDRAMC_SIZE              SZ_8K
  97
  98 #define RK2818_ARMDARBITER_BASE         0xFF0B4000
  99 #define RK2818_ARMDARBITER_PHYS         0x100B4000
 100 #define RK2818_ARMDARBITER_SIZE         SZ_8K
 101
 102 #define RK2818_VIDEOCOP_PHYS            0x100B8000
 103 #define RK2818_VIDEOCOP_SIZE            SZ_8K
 104
 105 #define RK2818_ESRAM_PHYS               0x100BA000
 106 #define RK2818_ESRAM_SIZE               SZ_8K
 107
 108 #define RK2818_USBHOST_PHYS             0x1010000
 109 #define RK2818_USBHOST_SIZE             SZ_256K
 110
 111 #define RK2818_UART0_BASE               0xFF100000
 112 #define RK2818_UART0_PHYS               0x18000000
 113 #define RK2818_UART0_SIZE               SZ_4K
 114
 115 #define RK2818_UART2_BASE               0xFF101000
 116 #define RK2818_UART2_PHYS               0x18001000
 117 #define RK2818_UART2_SIZE               SZ_4K
 118
 119 #define RK2818_UART1_BASE               0xFF102000
 120 #define RK2818_UART1_PHYS               0x18002000
 121 #define RK2818_UART1_SIZE               SZ_4K
 122
 123 #define RK2818_UART3_BASE               0xFF103000
 124 #define RK2818_UART3_PHYS               0x18003000
 125 #define RK2818_UART3_SIZE               SZ_4K
 126
 127 #define RK2818_TIMER_BASE               0xFF104000
 128 #define RK2818_TIMER_PHYS               0x18004000
 129 #define RK2818_TIMER_SIZE               SZ_8K
 130
 131 #define RK2818_eFUSE_BASE               0xFF106000
 132 #define RK2818_eFUSE_PHYS               0x18006000
 133 #define RK2818_eFUSE_SIZE               SZ_8K
 134
 135 #define RK2818_GPIO0_BASE               0xFF108000
 136 #define RK2818_GPIO0_PHYS               0x18008000
 137 #define RK2818_GPIO0_SIZE               SZ_8K
 138
 139 #define RK2818_GPIO1_BASE               0xFF109000
 140 #define RK2818_GPIO1_PHYS               0x18009000
 141 #define RK2818_GPIO1_SIZE               SZ_8K
 142
 143 #define RK2818_I2S_PHYS                 0x1800A000
 144 #define RK2818_I2S_SIZE                 SZ_8K
 145
 146 #define RK2818_I2C0_PHYS                0x1800C000
 147 #define RK2818_I2C0_SIZE                SZ_4K
 148
 149 #define RK2818_I2C1_PHYS                0x1800D000
 150 #define RK2818_I2C1_SIZE                SZ_4K
 151
 152 #define RK2818_SPIMASTER_PHYS         0x1800E000
 153 #define RK2818_SPIMASTER_SIZE         SZ_4K
 154
 155 #define RK2818_SPISLAVE_BASE          0xFF10F000
 156 #define RK2818_SPISLAVE_PHYS          0x1800F000
 157 #define RK2818_SPISLAVE_SIZE          SZ_4K
 158
 159 #define RK2818_WDT_BASE                 0xFF110000
 160 #define RK2818_WDT_PHYS                 0x18010000
 161 #define RK2818_WDT_SIZE                 SZ_8K
 162
 163 #define RK2818_PWM_BASE                 0xFF112000
 164 #define RK2818_PWM_PHYS                 0x18012000
 165 #define RK2818_PWM_SIZE                 SZ_8K
 166
 167 #define RK2818_RTC_BASE                 0xFF114000
 168 #define RK2818_RTC_PHYS                 0x18014000
 169 #define RK2818_RTC_SIZE                 SZ_8K
 170
 171 #define RK2818_ADC_BASE                 0xFF116000
 172 #define RK2818_ADC_PHYS                 0x18016000
 173 #define RK2818_ADC_SIZE                 SZ_8K
 174
 175 #define RK2818_SCU_BASE                 0xFF118000
 176 #define RK2818_SCU_PHYS                 0x18018000
 177 #define RK2818_SCU_SIZE                 SZ_4K
 178
 179 #define RK2818_REGFILE_BASE           0xFF119000
 180 #define RK2818_REGFILE_PHYS           0x18019000
 181 #define RK2818_REGFILE_SIZE           SZ_4K
 182
 183 #define RK2818_DSP_PHYS               0x80000000
 184 #define RK2818_DSP_SIZE               0x00600000
 185
 186 #endif