1 /* arch/arm/mach-rk29/board-rk29.c
3 * Copyright (C) 2010 ROCKCHIP, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/input.h>
21 #include <linux/delay.h>
22 #include <linux/i2c.h>
23 #include <linux/spi/spi.h>
24 #include <linux/mmc/host.h>
25 #include <linux/android_pmem.h>
26 #include <linux/usb/android_composite.h>
27 #include <linux/i2c/tps65910.h>
29 #include <mach/hardware.h>
30 #include <asm/setup.h>
31 #include <asm/mach-types.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/flash.h>
35 #include <asm/hardware/gic.h>
37 #include <mach/iomux.h>
38 #include <mach/gpio.h>
39 #include <mach/irqs.h>
40 #include <mach/rk29_iomap.h>
41 #include <mach/board.h>
42 #include <mach/rk29_nand.h>
43 #include <mach/rk29_camera.h> /* ddl@rock-chips.com : camera support */
44 #include <media/soc_camera.h> /* ddl@rock-chips.com : camera support */
45 #include <mach/vpu_mem.h>
46 #include <mach/sram.h>
48 #include <linux/regulator/rk29-pwm-regulator.h>
49 #include <linux/regulator/machine.h>
51 #include <linux/mtd/nand.h>
52 #include <linux/mtd/partitions.h>
55 #include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"
58 /* Set memory size of pmem */
59 #ifdef CONFIG_RK29_MEM_SIZE_M
60 #define SDRAM_SIZE (CONFIG_RK29_MEM_SIZE_M * SZ_1M)
62 #define SDRAM_SIZE SZ_512M
64 #define PMEM_GPU_SIZE SZ_64M
65 #define PMEM_UI_SIZE SZ_32M
66 #define PMEM_VPU_SIZE SZ_64M
67 #define PMEM_CAM_SIZE 0x01300000
68 #ifdef CONFIG_VIDEO_RK29_WORK_IPP
69 #define MEM_CAMIPP_SIZE SZ_4M
71 #define MEM_CAMIPP_SIZE 0
73 #define MEM_FB_SIZE (3*SZ_2M)
75 #define PMEM_GPU_BASE ((u32)RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)
76 #define PMEM_UI_BASE (PMEM_GPU_BASE - PMEM_UI_SIZE)
77 #define PMEM_VPU_BASE (PMEM_UI_BASE - PMEM_VPU_SIZE)
78 #define PMEM_CAM_BASE (PMEM_VPU_BASE - PMEM_CAM_SIZE)
79 #define MEM_CAMIPP_BASE (PMEM_CAM_BASE - MEM_CAMIPP_SIZE)
80 #define MEM_FB_BASE (MEM_CAMIPP_BASE - MEM_FB_SIZE)
81 #define LINUX_SIZE (MEM_FB_BASE - RK29_SDRAM_PHYS)
83 #define PREALLOC_WLAN_SEC_NUM 4
84 #define PREALLOC_WLAN_BUF_NUM 160
85 #define PREALLOC_WLAN_SECTION_HEADER 24
87 #define WLAN_SECTION_SIZE_0 (PREALLOC_WLAN_BUF_NUM * 128)
88 #define WLAN_SECTION_SIZE_1 (PREALLOC_WLAN_BUF_NUM * 128)
89 #define WLAN_SECTION_SIZE_2 (PREALLOC_WLAN_BUF_NUM * 512)
90 #define WLAN_SECTION_SIZE_3 (PREALLOC_WLAN_BUF_NUM * 1024)
92 #define WLAN_SKB_BUF_NUM 16
94 static struct sk_buff *wlan_static_skb[WLAN_SKB_BUF_NUM];
96 struct wifi_mem_prealloc {
101 extern struct sys_timer rk29_timer;
103 static int rk29_nand_io_init(void)
108 struct rk29_nand_platform_data rk29_nand_data = {
109 .width = 1, /* data bus width in bytes */
110 .hw_ecc = 1, /* hw ecc 0: soft ecc */
112 .io_init = rk29_nand_io_init,
115 #ifdef CONFIG_FB_RK29
116 /*****************************************************************************************
118 * author: zyw@rock-chips.com
119 *****************************************************************************************/
120 //#ifdef CONFIG_LCD_TD043MGEA1
121 #define LCD_TXD_PIN INVALID_GPIO
122 #define LCD_CLK_PIN INVALID_GPIO
123 #define LCD_CS_PIN INVALID_GPIO
124 /*****************************************************************************************
125 * frame buffe devices
126 * author: zyw@rock-chips.com
127 *****************************************************************************************/
129 #define FB_DISPLAY_ON_PIN RK29_PIN6_PD0
130 #define FB_LCD_STANDBY_PIN RK29_PIN6_PD1
131 #define FB_LCD_CABC_EN_PIN RK29_PIN6_PD2
132 #define FB_MCU_FMK_PIN INVALID_GPIO
134 #define FB_DISPLAY_ON_VALUE GPIO_HIGH
135 #define FB_LCD_STANDBY_VALUE GPIO_HIGH
138 static int rk29_lcd_io_init(void)
144 static int rk29_lcd_io_deinit(void)
150 static struct rk29lcd_info rk29_lcd_info = {
151 .txd_pin = LCD_TXD_PIN,
152 .clk_pin = LCD_CLK_PIN,
153 .cs_pin = LCD_CS_PIN,
154 .io_init = rk29_lcd_io_init,
155 .io_deinit = rk29_lcd_io_deinit,
159 static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)
162 if(fb_setting->mcu_fmk_en && (FB_MCU_FMK_PIN != INVALID_GPIO))
164 ret = gpio_request(FB_MCU_FMK_PIN, NULL);
167 gpio_free(FB_MCU_FMK_PIN);
168 printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");
170 gpio_direction_input(FB_MCU_FMK_PIN);
172 if(fb_setting->disp_on_en && (FB_DISPLAY_ON_PIN != INVALID_GPIO))
174 ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);
177 gpio_free(FB_DISPLAY_ON_PIN);
178 printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");
182 if(fb_setting->disp_on_en && (FB_LCD_STANDBY_PIN != INVALID_GPIO))
184 ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);
187 gpio_free(FB_LCD_STANDBY_PIN);
188 printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");
192 if(FB_LCD_CABC_EN_PIN != INVALID_GPIO)
194 ret = gpio_request(FB_LCD_CABC_EN_PIN, NULL);
197 gpio_free(FB_LCD_CABC_EN_PIN);
198 printk(">>>>>> FB_LCD_CABC_EN_PIN gpio_request err \n ");
200 gpio_direction_output(FB_LCD_CABC_EN_PIN, 0);
201 gpio_set_value(FB_LCD_CABC_EN_PIN, GPIO_LOW);
207 static struct rk29fb_info rk29_fb_info = {
209 .disp_on_pin = FB_DISPLAY_ON_PIN,
210 .disp_on_value = FB_DISPLAY_ON_VALUE,
211 .standby_pin = FB_LCD_STANDBY_PIN,
212 .standby_value = FB_LCD_STANDBY_VALUE,
213 .mcu_fmk_pin = FB_MCU_FMK_PIN,
214 .lcd_info = &rk29_lcd_info,
215 .io_init = rk29_fb_io_init,
218 /* rk29 fb resource */
219 static struct resource rk29_fb_resource[] = {
222 .start = RK29_LCDC_PHYS,
223 .end = RK29_LCDC_PHYS + RK29_LCDC_SIZE - 1,
224 .flags = IORESOURCE_MEM,
230 .flags = IORESOURCE_IRQ,
234 .start = MEM_FB_BASE,
235 .end = MEM_FB_BASE + MEM_FB_SIZE - 1,
236 .flags = IORESOURCE_MEM,
241 struct platform_device rk29_device_fb = {
244 .num_resources = ARRAY_SIZE(rk29_fb_resource),
245 .resource = rk29_fb_resource,
247 .platform_data = &rk29_fb_info,
251 struct platform_device rk29_device_dma_cpy = {
252 .name = "dma_memcpy",
259 static struct android_pmem_platform_data android_pmem_pdata = {
261 .start = PMEM_UI_BASE,
262 .size = PMEM_UI_SIZE,
267 static struct platform_device android_pmem_device = {
268 .name = "android_pmem",
271 .platform_data = &android_pmem_pdata,
276 static struct android_pmem_platform_data android_pmem_cam_pdata = {
278 .start = PMEM_CAM_BASE,
279 .size = PMEM_CAM_SIZE,
284 static struct platform_device android_pmem_cam_device = {
285 .name = "android_pmem",
288 .platform_data = &android_pmem_cam_pdata,
293 static struct vpu_mem_platform_data vpu_mem_pdata = {
295 .start = PMEM_VPU_BASE,
296 .size = PMEM_VPU_SIZE,
300 static struct platform_device rk29_vpu_mem_device = {
304 .platform_data = &vpu_mem_pdata,
308 static struct platform_device rk29_v4l2_output_devce = {
312 /*HANNSTAR_P1003 touch*/
313 #if defined (CONFIG_HANNSTAR_P1003)
314 #define TOUCH_RESET_PIN RK29_PIN6_PC3
315 #define TOUCH_INT_PIN RK29_PIN0_PA2
317 int p1003_init_platform_hw(void)
319 if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
320 gpio_free(TOUCH_RESET_PIN);
321 printk("p1003_init_platform_hw gpio_request error\n");
325 if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
326 gpio_free(TOUCH_INT_PIN);
327 printk("p1003_init_platform_hw gpio_request error\n");
330 gpio_pull_updown(TOUCH_INT_PIN, 1);
331 gpio_direction_output(TOUCH_RESET_PIN, 0);
333 gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
335 gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
341 struct p1003_platform_data p1003_info = {
343 .init_platform_hw= p1003_init_platform_hw,
347 #if defined (CONFIG_EETI_EGALAX)
348 #define TOUCH_RESET_PIN RK29_PIN6_PC3
349 #define TOUCH_INT_PIN RK29_PIN0_PA2
351 static int EETI_EGALAX_init_platform_hw(void)
353 if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){
354 gpio_free(TOUCH_RESET_PIN);
355 printk("p1003_init_platform_hw gpio_request error\n");
359 if(gpio_request(TOUCH_INT_PIN,NULL) != 0){
360 gpio_free(TOUCH_INT_PIN);
361 printk("p1003_init_platform_hw gpio_request error\n");
364 gpio_pull_updown(TOUCH_INT_PIN, 1);
365 gpio_direction_output(TOUCH_RESET_PIN, 0);
367 gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW);
369 gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH);
375 static struct eeti_egalax_platform_data eeti_egalax_info = {
377 .init_platform_hw= EETI_EGALAX_init_platform_hw,
382 #if defined (CONFIG_GS_MMA8452)
383 #define MMA8452_INT_PIN RK29_PIN0_PA3
385 static int mma8452_init_platform_hw(void)
388 if(gpio_request(MMA8452_INT_PIN,NULL) != 0){
389 gpio_free(MMA8452_INT_PIN);
390 printk("mma8452_init_platform_hw gpio_request error\n");
393 gpio_pull_updown(MMA8452_INT_PIN, 1);
398 static struct mma8452_platform_data mma8452_info = {
401 .init_platform_hw= mma8452_init_platform_hw,
407 /*****************************************************************************************
408 * TI TPS65910 voltage regulator devices
409 ******************************************************************************************/
410 #if defined (CONFIG_TPS65910_CORE)
412 static struct regulator_consumer_supply rk29_vdd1_supplies[] = {
414 .supply = "vcore", // set name vcore for all platform
419 static struct regulator_init_data rk29_regulator_vdd1 = {
423 .valid_modes_mask = REGULATOR_MODE_NORMAL,
424 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
428 .num_consumer_supplies = ARRAY_SIZE(rk29_vdd1_supplies),
429 .consumer_supplies = rk29_vdd1_supplies,
433 static struct regulator_consumer_supply rk29_vdd2_supplies[] = {
440 static struct regulator_init_data rk29_regulator_vdd2 = {
444 .valid_modes_mask = REGULATOR_MODE_NORMAL,
445 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
449 .num_consumer_supplies = ARRAY_SIZE(rk29_vdd2_supplies),
450 .consumer_supplies = rk29_vdd2_supplies,
454 static struct regulator_consumer_supply rk29_vio_supplies[] = {
461 static struct regulator_init_data rk29_regulator_vio = {
465 .valid_modes_mask = REGULATOR_MODE_NORMAL,
466 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
470 .num_consumer_supplies = ARRAY_SIZE(rk29_vio_supplies),
471 .consumer_supplies = rk29_vio_supplies,
475 static struct regulator_consumer_supply rk29_vaux1_supplies[] = {
482 static struct regulator_init_data rk29_regulator_vaux1 = {
486 .valid_modes_mask = REGULATOR_MODE_STANDBY,
487 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
490 .num_consumer_supplies = ARRAY_SIZE(rk29_vaux1_supplies),
491 .consumer_supplies = rk29_vaux1_supplies,
495 static struct regulator_consumer_supply rk29_vaux2_supplies[] = {
502 static struct regulator_init_data rk29_regulator_vaux2 = {
506 .valid_modes_mask = REGULATOR_MODE_NORMAL,
507 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
510 .num_consumer_supplies = ARRAY_SIZE(rk29_vaux2_supplies),
511 .consumer_supplies = rk29_vaux2_supplies,
515 static struct regulator_consumer_supply rk29_vdac_supplies[] = {
522 static struct regulator_init_data rk29_regulator_vdac = {
526 .valid_modes_mask = REGULATOR_MODE_NORMAL,
527 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
530 .num_consumer_supplies = ARRAY_SIZE(rk29_vdac_supplies),
531 .consumer_supplies = rk29_vdac_supplies,
535 static struct regulator_consumer_supply rk29_vaux33_supplies[] = {
542 static struct regulator_init_data rk29_regulator_vaux33 = {
546 .valid_modes_mask = REGULATOR_MODE_NORMAL,
547 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
550 .num_consumer_supplies = ARRAY_SIZE(rk29_vaux33_supplies),
551 .consumer_supplies = rk29_vaux33_supplies,
555 static struct regulator_consumer_supply rk29_vmmc_supplies[] = {
562 static struct regulator_init_data rk29_regulator_vmmc = {
566 .valid_modes_mask = REGULATOR_MODE_STANDBY,
567 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
570 .num_consumer_supplies = ARRAY_SIZE(rk29_vmmc_supplies),
571 .consumer_supplies = rk29_vmmc_supplies,
575 static struct regulator_consumer_supply rk29_vpll_supplies[] = {
582 static struct regulator_init_data rk29_regulator_vpll = {
586 .valid_modes_mask = REGULATOR_MODE_NORMAL,
587 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
591 .num_consumer_supplies = ARRAY_SIZE(rk29_vpll_supplies),
592 .consumer_supplies = rk29_vpll_supplies,
596 static struct regulator_consumer_supply rk29_vdig1_supplies[] = {
603 static struct regulator_init_data rk29_regulator_vdig1 = {
607 .valid_modes_mask = REGULATOR_MODE_STANDBY,
608 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
611 .num_consumer_supplies = ARRAY_SIZE(rk29_vdig1_supplies),
612 .consumer_supplies = rk29_vdig1_supplies,
616 static struct regulator_consumer_supply rk29_vdig2_supplies[] = {
623 static struct regulator_init_data rk29_regulator_vdig2 = {
627 .valid_modes_mask = REGULATOR_MODE_NORMAL,
628 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
632 .num_consumer_supplies = ARRAY_SIZE(rk29_vdig2_supplies),
633 .consumer_supplies = rk29_vdig2_supplies,
636 static int rk29_tps65910_config(struct tps65910_platform_data *pdata)
643 /* Configure TPS65910 for rk29 board needs */
644 printk("rk29_tps65910_config: tps65910 init config.\n");
646 err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_DEVCTRL2);
648 printk(KERN_ERR "Unable to read TPS65910_REG_DEVCTRL2 reg\n");
651 /* Set sleep state active high and allow device turn-off after PWRON long press */
652 val |= (TPS65910_DEV2_SLEEPSIG_POL | TPS65910_DEV2_PWON_LP_OFF);
654 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val,
655 TPS65910_REG_DEVCTRL2);
657 printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL2 reg\n");
661 /* Set the maxinum load current */
663 err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VDD1);
665 printk(KERN_ERR "Unable to read TPS65910_REG_VDD1 reg\n");
670 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VDD1);
672 printk(KERN_ERR "Unable to write TPS65910_REG_VDD1 reg\n");
677 err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VDD2);
679 printk(KERN_ERR "Unable to read TPS65910_REG_VDD2 reg\n");
684 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VDD2);
686 printk(KERN_ERR "Unable to write TPS65910_REG_VDD2 reg\n");
691 err = tps65910_i2c_read_u8(TPS65910_I2C_ID0, &val, TPS65910_REG_VIO);
693 printk(KERN_ERR "Unable to read TPS65910_REG_VIO reg\n");
698 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val, TPS65910_REG_VIO);
700 printk(KERN_ERR "Unable to write TPS65910_REG_VIO reg\n");
704 /* Mask ALL interrupts */
705 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0xFF,
706 TPS65910_REG_INT_MSK);
708 printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK reg\n");
711 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, 0x03,
712 TPS65910_REG_INT_MSK2);
714 printk(KERN_ERR "Unable to write TPS65910_REG_INT_MSK2 reg\n");
718 /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
720 val |= (TPS65910_SR_CTL_I2C_SEL);
721 err = tps65910_i2c_write_u8(TPS65910_I2C_ID0, val,
722 TPS65910_REG_DEVCTRL);
724 printk(KERN_ERR "Unable to write TPS65910_REG_DEVCTRL reg\n");
728 /* initilize all ISR work as NULL, specific driver will
729 * assign function(s) later.
731 for (i = 0; i < TPS65910_MAX_IRQS; i++)
732 pdata->handlers[i] = NULL;
737 struct tps65910_platform_data rk29_tps65910_data = {
738 .irq_num = (unsigned)TPS65910_HOST_IRQ,
740 .vio = &rk29_regulator_vio,
741 .vdd1 = &rk29_regulator_vdd1,
742 .vdd2 = &rk29_regulator_vdd2,
744 .vdig1 = &rk29_regulator_vdig1,
745 .vdig2 = &rk29_regulator_vdig2,
746 .vaux33 = &rk29_regulator_vaux33,
747 .vmmc = &rk29_regulator_vmmc,
748 .vaux1 = &rk29_regulator_vaux1,
749 .vaux2 = &rk29_regulator_vaux2,
750 .vdac = &rk29_regulator_vdac,
751 .vpll = &rk29_regulator_vpll,
752 .board_tps65910_config = rk29_tps65910_config,
755 #endif /* CONFIG_TPS65910_CORE */
758 /*****************************************************************************************
760 * author: kfx@rock-chips.com
761 *****************************************************************************************/
762 static int rk29_i2c0_io_init(void)
764 rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);
765 rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);
769 static int rk29_i2c1_io_init(void)
771 rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);
772 rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);
775 static int rk29_i2c2_io_init(void)
777 rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);
778 rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);
782 static int rk29_i2c3_io_init(void)
784 rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);
785 rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);
789 struct rk29_i2c_platform_data default_i2c0_data = {
793 .scl_rate = 400*1000,
794 .mode = I2C_MODE_IRQ,
795 .io_init = rk29_i2c0_io_init,
798 struct rk29_i2c_platform_data default_i2c1_data = {
802 .scl_rate = 400*1000,
803 .mode = I2C_MODE_POLL,
804 .io_init = rk29_i2c1_io_init,
807 struct rk29_i2c_platform_data default_i2c2_data = {
811 .scl_rate = 400*1000,
812 .mode = I2C_MODE_IRQ,
813 .io_init = rk29_i2c2_io_init,
816 struct rk29_i2c_platform_data default_i2c3_data = {
820 .scl_rate = 400*1000,
821 .mode = I2C_MODE_POLL,
822 .io_init = rk29_i2c3_io_init,
825 #ifdef CONFIG_I2C0_RK29
826 static struct i2c_board_info __initdata board_i2c0_devices[] = {
827 #if defined (CONFIG_RK1000_CONTROL)
829 .type = "rk1000_control",
834 #if defined (CONFIG_SND_SOC_RK1000)
836 .type = "rk1000_i2c_codec",
841 #if defined (CONFIG_SND_SOC_WM8900)
848 #if defined (CONFIG_BATTERY_STC3100)
855 #if defined (CONFIG_BATTERY_BQ27510)
862 #if defined (CONFIG_RTC_HYM8563)
864 .type = "rtc_hym8563",
867 .irq = RK29_PIN0_PA1,
870 #if defined (CONFIG_GS_MMA8452)
872 .type = "gs_mma8452",
875 .irq = MMA8452_INT_PIN,
876 .platform_data = &mma8452_info,
879 #if defined (CONFIG_SENSORS_AK8973)
884 .irq = RK29_PIN0_PA4,
887 #if defined (CONFIG_SENSORS_AK8975)
892 .irq = RK29_PIN0_PA4,
898 #ifdef CONFIG_I2C1_RK29
899 static struct i2c_board_info __initdata board_i2c1_devices[] = {
900 #if defined (CONFIG_RK1000_CONTROL1)
902 .type = "rk1000_control",
907 #if defined (CONFIG_ANX7150)
910 .addr = 0x39, //0x39, 0x3d
912 .irq = RK29_PIN1_PD7,
919 #ifdef CONFIG_I2C2_RK29
920 static struct i2c_board_info __initdata board_i2c2_devices[] = {
921 #if defined (CONFIG_HANNSTAR_P1003)
923 .type = "p1003_touch",
926 .irq = RK29_PIN0_PA2,
927 .platform_data = &p1003_info,
930 #if defined (CONFIG_EETI_EGALAX)
932 .type = "egalax_i2c",
935 .irq = RK29_PIN0_PA2,
936 .platform_data = &eeti_egalax_info,
939 #if defined (CONFIG_TPS65910_CORE)
942 .addr = TPS65910_I2C_ID0,
944 .irq = TPS65910_HOST_IRQ,
945 .platform_data = &rk29_tps65910_data,
951 #ifdef CONFIG_I2C3_RK29
952 static struct i2c_board_info __initdata board_i2c3_devices[] = {
956 /*****************************************************************************************
958 * author: ddl@rock-chips.com
959 *****************************************************************************************/
960 #ifdef CONFIG_VIDEO_RK29
961 #define SENSOR_NAME_0 RK29_CAM_SENSOR_NAME_OV5642 /* back camera sensor */
962 #define SENSOR_IIC_ADDR_0 0x78
963 #define SENSOR_IIC_ADAPTER_ID_0 1
964 #define SENSOR_POWER_PIN_0 INVALID_GPIO
965 #define SENSOR_RESET_PIN_0 INVALID_GPIO
966 #define SENSOR_POWERDN_PIN_0 RK29_PIN6_PB7
967 #define SENSOR_FALSH_PIN_0 INVALID_GPIO
968 #define SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
969 #define SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
970 #define SENSOR_POWERDNACTIVE_LEVEL_0 RK29_CAM_POWERDNACTIVE_H
971 #define SENSOR_FLASHACTIVE_LEVEL_0 RK29_CAM_FLASHACTIVE_L
973 #define SENSOR_NAME_1 RK29_CAM_SENSOR_NAME_OV2659 /* front camera sensor */
974 #define SENSOR_IIC_ADDR_1 0x60
975 #define SENSOR_IIC_ADAPTER_ID_1 1
976 #define SENSOR_POWER_PIN_1 INVALID_GPIO
977 #define SENSOR_RESET_PIN_1 INVALID_GPIO
978 #define SENSOR_POWERDN_PIN_1 RK29_PIN5_PD7
979 #define SENSOR_FALSH_PIN_1 INVALID_GPIO
980 #define SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
981 #define SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
982 #define SENSOR_POWERDNACTIVE_LEVEL_1 RK29_CAM_POWERDNACTIVE_H
983 #define SENSOR_FLASHACTIVE_LEVEL_1 RK29_CAM_FLASHACTIVE_L
985 static int rk29_sensor_io_init(void);
986 static int rk29_sensor_io_deinit(int sensor);
987 static int rk29_sensor_ioctrl(struct device *dev,enum rk29camera_ioctrl_cmd cmd,int on);
989 static struct rk29camera_platform_data rk29_camera_platform_data = {
990 .io_init = rk29_sensor_io_init,
991 .io_deinit = rk29_sensor_io_deinit,
992 .sensor_ioctrl = rk29_sensor_ioctrl,
995 .gpio_reset = SENSOR_RESET_PIN_0,
996 .gpio_power = SENSOR_POWER_PIN_0,
997 .gpio_powerdown = SENSOR_POWERDN_PIN_0,
998 .gpio_flash = SENSOR_FALSH_PIN_0,
999 .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0|SENSOR_POWERDNACTIVE_LEVEL_0|SENSOR_FLASHACTIVE_LEVEL_0),
1001 .dev_name = SENSOR_NAME_0,
1003 .gpio_reset = SENSOR_RESET_PIN_1,
1004 .gpio_power = SENSOR_POWER_PIN_1,
1005 .gpio_powerdown = SENSOR_POWERDN_PIN_1,
1006 .gpio_flash = SENSOR_FALSH_PIN_1,
1007 .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1|SENSOR_POWERDNACTIVE_LEVEL_1|SENSOR_FLASHACTIVE_LEVEL_1),
1009 .dev_name = SENSOR_NAME_1,
1012 #ifdef CONFIG_VIDEO_RK29_WORK_IPP
1014 .name = "camera_ipp_mem",
1015 .start = MEM_CAMIPP_BASE,
1016 .size = MEM_CAMIPP_SIZE,
1021 static int rk29_sensor_io_init(void)
1024 unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
1025 unsigned int camera_powerdown = INVALID_GPIO, camera_flash = INVALID_GPIO;
1026 unsigned int camera_ioflag;
1028 for (i=0; i<2; i++) {
1029 camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;
1030 camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;
1031 camera_powerdown = rk29_camera_platform_data.gpio_res[i].gpio_powerdown;
1032 camera_flash = rk29_camera_platform_data.gpio_res[i].gpio_flash;
1033 camera_ioflag = rk29_camera_platform_data.gpio_res[i].gpio_flag;
1034 rk29_camera_platform_data.gpio_res[i].gpio_init = 0;
1036 if (camera_power != INVALID_GPIO) {
1037 ret = gpio_request(camera_power, "camera power");
1039 goto sensor_io_int_loop_end;
1040 rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_POWERACTIVE_MASK;
1041 gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1042 gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1044 //printk("\n%s....power pin(%d) init success(0x%x) \n",__FUNCTION__,camera_power,(((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1048 if (camera_reset != INVALID_GPIO) {
1049 ret = gpio_request(camera_reset, "camera reset");
1051 goto sensor_io_int_loop_end;
1052 rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_RESETACTIVE_MASK;
1053 gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1054 gpio_direction_output(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1056 //printk("\n%s....reset pin(%d) init success(0x%x)\n",__FUNCTION__,camera_reset,((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1060 if (camera_powerdown != INVALID_GPIO) {
1061 ret = gpio_request(camera_powerdown, "camera powerdown");
1063 goto sensor_io_int_loop_end;
1064 rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_POWERDNACTIVE_MASK;
1065 gpio_set_value(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1066 gpio_direction_output(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1068 //printk("\n%s....powerdown pin(%d) init success(0x%x) \n",__FUNCTION__,camera_powerdown,((camera_ioflag&RK29_CAM_POWERDNACTIVE_BITPOS)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1072 if (camera_flash != INVALID_GPIO) {
1073 ret = gpio_request(camera_flash, "camera flash");
1075 goto sensor_io_int_loop_end;
1076 rk29_camera_platform_data.gpio_res[i].gpio_init |= RK29_CAM_FLASHACTIVE_MASK;
1077 gpio_set_value(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1078 gpio_direction_output(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1080 //printk("\n%s....flash pin(%d) init success(0x%x) \n",__FUNCTION__,camera_flash,((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1084 sensor_io_int_loop_end:
1085 rk29_sensor_io_deinit(i);
1092 static int rk29_sensor_io_deinit(int sensor)
1094 unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
1095 unsigned int camera_powerdown = INVALID_GPIO, camera_flash = INVALID_GPIO;
1097 camera_reset = rk29_camera_platform_data.gpio_res[sensor].gpio_reset;
1098 camera_power = rk29_camera_platform_data.gpio_res[sensor].gpio_power;
1099 camera_powerdown = rk29_camera_platform_data.gpio_res[sensor].gpio_powerdown;
1100 camera_flash = rk29_camera_platform_data.gpio_res[sensor].gpio_flash;
1102 if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_POWERACTIVE_MASK) {
1103 if (camera_power != INVALID_GPIO) {
1104 gpio_direction_input(camera_power);
1105 gpio_free(camera_power);
1109 if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_RESETACTIVE_MASK) {
1110 if (camera_reset != INVALID_GPIO) {
1111 gpio_direction_input(camera_reset);
1112 gpio_free(camera_reset);
1116 if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_POWERDNACTIVE_MASK) {
1117 if (camera_powerdown != INVALID_GPIO) {
1118 gpio_direction_input(camera_powerdown);
1119 gpio_free(camera_powerdown);
1123 if (rk29_camera_platform_data.gpio_res[sensor].gpio_init & RK29_CAM_FLASHACTIVE_MASK) {
1124 if (camera_flash != INVALID_GPIO) {
1125 gpio_direction_input(camera_flash);
1126 gpio_free(camera_flash);
1130 rk29_camera_platform_data.gpio_res[sensor].gpio_init = 0;
1133 static int rk29_sensor_ioctrl(struct device *dev,enum rk29camera_ioctrl_cmd cmd, int on)
1135 unsigned int camera_power=INVALID_GPIO,camera_reset=INVALID_GPIO, camera_powerdown=INVALID_GPIO,camera_flash = INVALID_GPIO;
1136 unsigned int camera_ioflag,camera_io_init;
1137 int ret = RK29_CAM_IO_SUCCESS;
1139 if(rk29_camera_platform_data.gpio_res[0].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {
1140 camera_power = rk29_camera_platform_data.gpio_res[0].gpio_power;
1141 camera_reset = rk29_camera_platform_data.gpio_res[0].gpio_reset;
1142 camera_powerdown = rk29_camera_platform_data.gpio_res[0].gpio_powerdown;
1143 camera_flash = rk29_camera_platform_data.gpio_res[0].gpio_flash;
1144 camera_ioflag = rk29_camera_platform_data.gpio_res[0].gpio_flag;
1145 camera_io_init = rk29_camera_platform_data.gpio_res[0].gpio_init;
1146 } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {
1147 camera_power = rk29_camera_platform_data.gpio_res[1].gpio_power;
1148 camera_reset = rk29_camera_platform_data.gpio_res[1].gpio_reset;
1149 camera_powerdown = rk29_camera_platform_data.gpio_res[1].gpio_powerdown;
1150 camera_flash = rk29_camera_platform_data.gpio_res[1].gpio_flash;
1151 camera_ioflag = rk29_camera_platform_data.gpio_res[1].gpio_flag;
1152 camera_io_init = rk29_camera_platform_data.gpio_res[1].gpio_init;
1159 if (camera_power != INVALID_GPIO) {
1160 if (camera_io_init & RK29_CAM_POWERACTIVE_MASK) {
1162 gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1163 //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1166 gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1167 //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
1170 ret = RK29_CAM_EIO_REQUESTFAIL;
1171 printk("\n%s..%s..ResetPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_reset);
1174 ret = RK29_CAM_EIO_INVALID;
1180 if (camera_reset != INVALID_GPIO) {
1181 if (camera_io_init & RK29_CAM_RESETACTIVE_MASK) {
1183 gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1184 //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1186 gpio_set_value(camera_reset,(((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1187 //printk("\n%s..%s..ResetPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
1190 ret = RK29_CAM_EIO_REQUESTFAIL;
1191 printk("\n%s..%s..ResetPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_reset);
1194 ret = RK29_CAM_EIO_INVALID;
1201 if (camera_powerdown != INVALID_GPIO) {
1202 if (camera_io_init & RK29_CAM_POWERDNACTIVE_MASK) {
1204 gpio_set_value(camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1205 //printk("\n%s..%s..PowerDownPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_powerdown, ((camera_ioflag&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1207 gpio_set_value(camera_powerdown,(((~camera_ioflag)&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1208 //printk("\n%s..%s..PowerDownPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_powerdown, (((~camera_ioflag)&RK29_CAM_POWERDNACTIVE_MASK)>>RK29_CAM_POWERDNACTIVE_BITPOS));
1211 ret = RK29_CAM_EIO_REQUESTFAIL;
1212 printk("\n%s..%s..PowerDownPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_powerdown);
1215 ret = RK29_CAM_EIO_INVALID;
1222 if (camera_flash != INVALID_GPIO) {
1223 if (camera_io_init & RK29_CAM_FLASHACTIVE_MASK) {
1225 gpio_set_value(camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1226 //printk("\n%s..%s..FlashPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_flash, ((camera_ioflag&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1228 gpio_set_value(camera_flash,(((~camera_ioflag)&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1229 //printk("\n%s..%s..FlashPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_flash, (((~camera_ioflag)&RK29_CAM_FLASHACTIVE_MASK)>>RK29_CAM_FLASHACTIVE_BITPOS));
1232 ret = RK29_CAM_EIO_REQUESTFAIL;
1233 printk("\n%s..%s..FlashPin=%d request failed!\n",__FUNCTION__,dev_name(dev),camera_flash);
1236 ret = RK29_CAM_EIO_INVALID;
1243 printk("%s cmd(0x%x) is unknown!\n",__FUNCTION__, cmd);
1249 static int rk29_sensor_power(struct device *dev, int on)
1251 rk29_sensor_ioctrl(dev,Cam_Power,on);
1254 static int rk29_sensor_reset(struct device *dev)
1256 rk29_sensor_ioctrl(dev,Cam_Reset,1);
1258 rk29_sensor_ioctrl(dev,Cam_Reset,0);
1261 static int rk29_sensor_powerdown(struct device *dev, int on)
1263 return rk29_sensor_ioctrl(dev,Cam_PowerDown,on);
1265 #if (SENSOR_IIC_ADDR_0 != 0x00)
1266 static struct i2c_board_info rk29_i2c_cam_info_0[] = {
1268 I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1)
1272 static struct soc_camera_link rk29_iclink_0 = {
1273 .bus_id = RK29_CAM_PLATFORM_DEV_ID,
1274 .power = rk29_sensor_power,
1275 .powerdown = rk29_sensor_powerdown,
1276 .board_info = &rk29_i2c_cam_info_0[0],
1277 .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0,
1278 .module_name = SENSOR_NAME_0,
1281 /*platform_device : soc-camera need */
1282 static struct platform_device rk29_soc_camera_pdrv_0 = {
1283 .name = "soc-camera-pdrv",
1286 .init_name = SENSOR_NAME_0,
1287 .platform_data = &rk29_iclink_0,
1291 static struct i2c_board_info rk29_i2c_cam_info_1[] = {
1293 I2C_BOARD_INFO(SENSOR_NAME_1, SENSOR_IIC_ADDR_1>>1)
1297 static struct soc_camera_link rk29_iclink_1 = {
1298 .bus_id = RK29_CAM_PLATFORM_DEV_ID,
1299 .power = rk29_sensor_power,
1300 .powerdown = rk29_sensor_powerdown,
1301 .board_info = &rk29_i2c_cam_info_1[0],
1302 .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_1,
1303 .module_name = SENSOR_NAME_1,
1306 /*platform_device : soc-camera need */
1307 static struct platform_device rk29_soc_camera_pdrv_1 = {
1308 .name = "soc-camera-pdrv",
1311 .init_name = SENSOR_NAME_1,
1312 .platform_data = &rk29_iclink_1,
1317 static u64 rockchip_device_camera_dmamask = 0xffffffffUL;
1318 static struct resource rk29_camera_resource[] = {
1320 .start = RK29_VIP_PHYS,
1321 .end = RK29_VIP_PHYS + RK29_VIP_SIZE - 1,
1322 .flags = IORESOURCE_MEM,
1327 .flags = IORESOURCE_IRQ,
1331 /*platform_device : */
1332 static struct platform_device rk29_device_camera = {
1333 .name = RK29_CAM_DRV_NAME,
1334 .id = RK29_CAM_PLATFORM_DEV_ID, /* This is used to put cameras on this interface */
1335 .num_resources = ARRAY_SIZE(rk29_camera_resource),
1336 .resource = rk29_camera_resource,
1338 .dma_mask = &rockchip_device_camera_dmamask,
1339 .coherent_dma_mask = 0xffffffffUL,
1340 .platform_data = &rk29_camera_platform_data,
1344 /*****************************************************************************************
1346 * author: nzy@rock-chips.com
1347 *****************************************************************************************/
1348 #ifdef CONFIG_BACKLIGHT_RK29_BL
1350 GPIO1B5_PWM0_NAME, GPIO1L_PWM0
1351 GPIO5D2_PWM1_UART1SIRIN_NAME, GPIO5H_PWM1
1352 GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME, GPIO2L_PWM2
1353 GPIO1A5_EMMCPWREN_PWM3_NAME, GPIO1L_PWM3
1357 #define PWM_MUX_NAME GPIO1B5_PWM0_NAME
1358 #define PWM_MUX_MODE GPIO1L_PWM0
1359 #define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5
1360 #define PWM_EFFECT_VALUE 1
1362 //#define LCD_DISP_ON_PIN
1364 #ifdef LCD_DISP_ON_PIN
1365 #define BL_EN_MUX_NAME GPIOF34_UART3_SEL_NAME
1366 #define BL_EN_MUX_MODE IOMUXB_GPIO1_B34
1368 #define BL_EN_PIN GPIO0L_GPIO0A5
1369 #define BL_EN_VALUE GPIO_HIGH
1371 static int rk29_backlight_io_init(void)
1375 rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
1376 #ifdef LCD_DISP_ON_PIN
1377 rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
1379 ret = gpio_request(BL_EN_PIN, NULL);
1382 gpio_free(BL_EN_PIN);
1385 gpio_direction_output(BL_EN_PIN, 0);
1386 gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
1391 static int rk29_backlight_io_deinit(void)
1394 #ifdef LCD_DISP_ON_PIN
1395 gpio_free(BL_EN_PIN);
1397 rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
1400 struct rk29_bl_info rk29_bl_info = {
1402 .bl_ref = PWM_EFFECT_VALUE,
1403 .io_init = rk29_backlight_io_init,
1404 .io_deinit = rk29_backlight_io_deinit,
1407 /*****************************************************************************************
1408 * pwm voltage regulator devices
1409 ******************************************************************************************/
1410 #if defined (CONFIG_RK29_PWM_REGULATOR)
1412 #define REGULATOR_PWM_ID 2
1413 #define REGULATOR_PWM_MUX_NAME GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME
1414 #define REGULATOR_PWM_MUX_MODE GPIO2L_PWM2
1415 #define REGULATOR_PWM_MUX_MODE_GPIO GPIO2L_GPIO2A3
1416 #define REGULATOR_PWM_GPIO RK29_PIN2_PA3
1418 static struct regulator_consumer_supply pwm_consumers[] = {
1424 static struct regulator_init_data rk29_pwm_regulator_data = {
1430 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
1432 .num_consumer_supplies = ARRAY_SIZE(pwm_consumers),
1433 .consumer_supplies = pwm_consumers,
1436 static struct pwm_platform_data rk29_regulator_pwm_platform_data = {
1437 .pwm_id = REGULATOR_PWM_ID,
1438 .pwm_gpio = REGULATOR_PWM_GPIO,
1439 //.pwm_iomux_name[] = REGULATOR_PWM_MUX_NAME;
1440 .pwm_iomux_name = REGULATOR_PWM_MUX_NAME,
1441 .pwm_iomux_pwm = REGULATOR_PWM_MUX_MODE,
1442 .pwm_iomux_gpio = REGULATOR_PWM_MUX_MODE_GPIO,
1443 .init_data = &rk29_pwm_regulator_data,
1446 static struct platform_device rk29_device_pwm_regulator = {
1447 .name = "pwm-voltage-regulator",
1450 .platform_data = &rk29_regulator_pwm_platform_data,
1457 /*****************************************************************************************
1459 *****************************************************************************************/
1460 #ifdef CONFIG_SDMMC0_RK29
1461 static int rk29_sdmmc0_cfg_gpio(void)
1463 rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
1464 rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
1465 rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
1466 rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
1467 rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
1468 rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
1469 rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
1470 rk29_mux_api_set(GPIO5D5_SDMMC0PWREN_NAME, GPIO5H_GPIO5D5); ///GPIO5H_SDMMC0_PWR_EN); ///GPIO5H_GPIO5D5);
1471 gpio_request(RK29_PIN5_PD5,"sdmmc");
1472 gpio_set_value(RK29_PIN5_PD5,GPIO_HIGH);
1474 gpio_set_value(RK29_PIN5_PD5,GPIO_LOW);
1478 #define CONFIG_SDMMC0_USE_DMA
1479 struct rk29_sdmmc_platform_data default_sdmmc0_data = {
1480 .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
1481 MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
1482 MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
1483 .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
1484 .io_init = rk29_sdmmc0_cfg_gpio,
1485 .dma_name = "sd_mmc",
1486 #ifdef CONFIG_SDMMC0_USE_DMA
1493 #ifdef CONFIG_SDMMC1_RK29
1494 #define CONFIG_SDMMC1_USE_DMA
1495 static int rk29_sdmmc1_cfg_gpio(void)
1497 rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
1498 rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
1499 rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
1500 rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
1501 rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
1502 rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
1503 //rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
1507 #ifdef CONFIG_WIFI_CONTROL_FUNC
1508 static int rk29sdk_wifi_status(struct device *dev);
1509 static int rk29sdk_wifi_status_register(void (*callback)(int card_presend, void *dev_id), void *dev_id);
1512 #define RK29SDK_WIFI_SDIO_CARD_DETECT_N RK29_PIN1_PD6
1514 struct rk29_sdmmc_platform_data default_sdmmc1_data = {
1515 .host_ocr_avail = (MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
1516 MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
1517 MMC_VDD_32_33|MMC_VDD_33_34),
1518 .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
1519 MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
1520 .io_init = rk29_sdmmc1_cfg_gpio,
1522 #ifdef CONFIG_SDMMC1_USE_DMA
1527 #ifdef CONFIG_WIFI_CONTROL_FUNC
1528 .status = rk29sdk_wifi_status,
1529 .register_status_notify = rk29sdk_wifi_status_register,
1532 .detect_irq = RK29SDK_WIFI_SDIO_CARD_DETECT_N,
1537 #ifdef CONFIG_WIFI_CONTROL_FUNC
1538 #define RK29SDK_WIFI_BT_GPIO_POWER_N RK29_PIN5_PD6
1539 #define RK29SDK_WIFI_GPIO_RESET_N RK29_PIN6_PC0
1540 #define RK29SDK_BT_GPIO_RESET_N RK29_PIN6_PC4
1542 static int rk29sdk_wifi_cd = 0; /* wifi virtual 'card detect' status */
1543 static void (*wifi_status_cb)(int card_present, void *dev_id);
1544 static void *wifi_status_cb_devid;
1545 int rk29sdk_wifi_power_state = 0;
1546 int rk29sdk_bt_power_state = 0;
1548 static int rk29sdk_wifi_status(struct device *dev)
1550 return rk29sdk_wifi_cd;
1553 static int rk29sdk_wifi_status_register(void (*callback)(int card_present, void *dev_id), void *dev_id)
1557 wifi_status_cb = callback;
1558 wifi_status_cb_devid = dev_id;
1562 static int rk29sdk_wifi_bt_gpio_control_init(void)
1564 if (gpio_request(RK29SDK_WIFI_BT_GPIO_POWER_N, "wifi_bt_power")) {
1565 pr_info("%s: request wifi_bt power gpio failed\n", __func__);
1569 if (gpio_request(RK29SDK_WIFI_GPIO_RESET_N, "wifi reset")) {
1570 pr_info("%s: request wifi reset gpio failed\n", __func__);
1571 gpio_free(RK29SDK_WIFI_BT_GPIO_POWER_N);
1575 if (gpio_request(RK29SDK_BT_GPIO_RESET_N, "bt reset")) {
1576 pr_info("%s: request bt reset gpio failed\n", __func__);
1577 gpio_free(RK29SDK_WIFI_GPIO_RESET_N);
1581 gpio_direction_output(RK29SDK_WIFI_BT_GPIO_POWER_N, GPIO_LOW);
1582 gpio_direction_output(RK29SDK_WIFI_GPIO_RESET_N, GPIO_LOW);
1583 gpio_direction_output(RK29SDK_BT_GPIO_RESET_N, GPIO_LOW);
1585 pr_info("%s: init finished\n",__func__);
1590 static int rk29sdk_wifi_power(int on)
1592 pr_info("%s: %d\n", __func__, on);
1594 gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, on);
1596 pr_info("wifi turn on power\n");
1598 if (!rk29sdk_bt_power_state){
1599 gpio_set_value(RK29SDK_WIFI_BT_GPIO_POWER_N, on);
1601 pr_info("wifi shut off power\n");
1604 pr_info("wifi shouldn't shut off power, bt is using it!\n");
1609 rk29sdk_wifi_power_state = on;
1613 static int rk29sdk_wifi_reset_state;
1614 static int rk29sdk_wifi_reset(int on)
1616 pr_info("%s: %d\n", __func__, on);
1617 gpio_set_value(RK29SDK_WIFI_GPIO_RESET_N, on);
1619 rk29sdk_wifi_reset_state = on;
1623 int rk29sdk_wifi_set_carddetect(int val)
1625 pr_info("%s:%d\n", __func__, val);
1626 rk29sdk_wifi_cd = val;
1627 if (wifi_status_cb){
1628 wifi_status_cb(val, wifi_status_cb_devid);
1630 pr_warning("%s, nobody to notify\n", __func__);
1634 EXPORT_SYMBOL(rk29sdk_wifi_set_carddetect);
1636 static struct wifi_mem_prealloc wifi_mem_array[PREALLOC_WLAN_SEC_NUM] = {
1637 {NULL, (WLAN_SECTION_SIZE_0 + PREALLOC_WLAN_SECTION_HEADER)},
1638 {NULL, (WLAN_SECTION_SIZE_1 + PREALLOC_WLAN_SECTION_HEADER)},
1639 {NULL, (WLAN_SECTION_SIZE_2 + PREALLOC_WLAN_SECTION_HEADER)},
1640 {NULL, (WLAN_SECTION_SIZE_3 + PREALLOC_WLAN_SECTION_HEADER)}
1643 static void *rk29sdk_mem_prealloc(int section, unsigned long size)
1645 if (section == PREALLOC_WLAN_SEC_NUM)
1646 return wlan_static_skb;
1648 if ((section < 0) || (section > PREALLOC_WLAN_SEC_NUM))
1651 if (wifi_mem_array[section].size < size)
1654 return wifi_mem_array[section].mem_ptr;
1657 int __init rk29sdk_init_wifi_mem(void)
1662 for (i = 0 ; i < WLAN_SKB_BUF_NUM ; i++) {
1663 wlan_static_skb[i] = dev_alloc_skb(
1664 ((i < (WLAN_SKB_BUF_NUM / 2)) ? 4096 : 8192));
1666 if (!wlan_static_skb[i])
1670 for (i = 0 ; i < PREALLOC_WLAN_SEC_NUM ; i++) {
1671 wifi_mem_array[i].mem_ptr =
1672 kmalloc(wifi_mem_array[i].size, GFP_KERNEL);
1674 if (!wifi_mem_array[i].mem_ptr)
1680 pr_err("Failed to mem_alloc for WLAN\n");
1681 for (j = 0 ; j < i ; j++)
1682 kfree(wifi_mem_array[j].mem_ptr);
1684 i = WLAN_SKB_BUF_NUM;
1687 pr_err("Failed to skb_alloc for WLAN\n");
1688 for (j = 0 ; j < i ; j++)
1689 dev_kfree_skb(wlan_static_skb[j]);
1694 static struct wifi_platform_data rk29sdk_wifi_control = {
1695 .set_power = rk29sdk_wifi_power,
1696 .set_reset = rk29sdk_wifi_reset,
1697 .set_carddetect = rk29sdk_wifi_set_carddetect,
1698 .mem_prealloc = rk29sdk_mem_prealloc,
1700 static struct platform_device rk29sdk_wifi_device = {
1701 .name = "bcm4329_wlan",
1704 .platform_data = &rk29sdk_wifi_control,
1710 /* bluetooth rfkill device */
1711 static struct platform_device rk29sdk_rfkill = {
1712 .name = "rk29sdk_rfkill",
1717 #ifdef CONFIG_VIVANTE
1718 static struct resource resources_gpu[] = {
1723 .flags = IORESOURCE_IRQ,
1727 .start = RK29_GPU_PHYS,
1728 .end = RK29_GPU_PHYS + RK29_GPU_PHYS_SIZE,
1729 .flags = IORESOURCE_MEM,
1733 .start = PMEM_GPU_BASE,
1734 .end = PMEM_GPU_BASE + PMEM_GPU_SIZE,
1735 .flags = IORESOURCE_MEM,
1738 static struct platform_device rk29_device_gpu = {
1741 .num_resources = ARRAY_SIZE(resources_gpu),
1742 .resource = resources_gpu,
1745 #ifdef CONFIG_KEYS_RK29
1746 extern struct rk29_keys_platform_data rk29_keys_pdata;
1747 static struct platform_device rk29_device_keys = {
1748 .name = "rk29-keypad",
1751 .platform_data = &rk29_keys_pdata,
1756 static void __init rk29_board_iomux_init(void)
1758 #ifdef CONFIG_UART0_RK29
1759 rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);
1760 rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);
1761 #ifdef CONFIG_UART0_CTS_RTS_RK29
1762 rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);
1763 rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);
1766 #ifdef CONFIG_UART1_RK29
1767 rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);
1768 rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN);
1770 #ifdef CONFIG_UART2_RK29
1771 rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME, GPIO2L_UART2_SOUT);
1772 rk29_mux_api_set(GPIO2B0_UART2SIN_NAME, GPIO2L_UART2_SIN);
1773 #ifdef CONFIG_UART2_CTS_RTS_RK29
1774 rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);
1775 rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME, GPIO2L_UART2_CTS_N);
1778 #ifdef CONFIG_UART3_RK29
1779 rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME, GPIO2L_UART3_SOUT);
1780 rk29_mux_api_set(GPIO2B2_UART3SIN_NAME, GPIO2L_UART3_SIN);
1781 #ifdef CONFIG_UART3_CTS_RTS_RK29
1782 rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_UART3_RTS_N);
1783 rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_UART3_CTS_N);
1786 #ifdef CONFIG_SPIM0_RK29
1787 rk29_mux_api_set(GPIO2C0_SPI0CLK_NAME, GPIO2H_SPI0_CLK);
1788 rk29_mux_api_set(GPIO2C1_SPI0CSN0_NAME, GPIO2H_SPI0_CSN0);
1789 rk29_mux_api_set(GPIO2C2_SPI0TXD_NAME, GPIO2H_SPI0_TXD);
1790 rk29_mux_api_set(GPIO2C3_SPI0RXD_NAME, GPIO2H_SPI0_RXD);
1792 #ifdef CONFIG_SPIM1_RK29
1793 rk29_mux_api_set(GPIO2C4_SPI1CLK_NAME, GPIO2H_SPI1_CLK);
1794 rk29_mux_api_set(GPIO2C5_SPI1CSN0_NAME, GPIO2H_SPI1_CSN0);
1795 rk29_mux_api_set(GPIO2C6_SPI1TXD_NAME, GPIO2H_SPI1_TXD);
1796 rk29_mux_api_set(GPIO2C7_SPI1RXD_NAME, GPIO2H_SPI1_RXD);
1798 #ifdef CONFIG_RK29_VMAC
1799 rk29_mux_api_set(GPIO4C0_RMIICLKOUT_RMIICLKIN_NAME, GPIO4H_RMII_CLKOUT);
1800 rk29_mux_api_set(GPIO4C1_RMIITXEN_MIITXEN_NAME, GPIO4H_RMII_TX_EN);
1801 rk29_mux_api_set(GPIO4C2_RMIITXD1_MIITXD1_NAME, GPIO4H_RMII_TXD1);
1802 rk29_mux_api_set(GPIO4C3_RMIITXD0_MIITXD0_NAME, GPIO4H_RMII_TXD0);
1803 rk29_mux_api_set(GPIO4C4_RMIIRXERR_MIIRXERR_NAME, GPIO4H_RMII_RX_ERR);
1804 rk29_mux_api_set(GPIO4C5_RMIICSRDVALID_MIIRXDVALID_NAME, GPIO4H_RMII_CSR_DVALID);
1805 rk29_mux_api_set(GPIO4C6_RMIIRXD1_MIIRXD1_NAME, GPIO4H_RMII_RXD1);
1806 rk29_mux_api_set(GPIO4C7_RMIIRXD0_MIIRXD0_NAME, GPIO4H_RMII_RXD0);
1808 rk29_mux_api_set(GPIO0A7_MIIMDCLK_NAME, GPIO0L_MII_MDCLK);
1809 rk29_mux_api_set(GPIO0A6_MIIMD_NAME, GPIO0L_MII_MD);
1811 #ifdef CONFIG_RK29_PWM_REGULATOR
1812 rk29_mux_api_set(REGULATOR_PWM_MUX_NAME,REGULATOR_PWM_MUX_MODE);
1816 static struct platform_device *devices[] __initdata = {
1817 #ifdef CONFIG_UART1_RK29
1820 #ifdef CONFIG_UART0_RK29
1823 #ifdef CONFIG_UART2_RK29
1827 #ifdef CONFIG_RK29_PWM_REGULATOR
1828 &rk29_device_pwm_regulator,
1830 #ifdef CONFIG_SPIM0_RK29
1831 &rk29xx_device_spi0m,
1833 #ifdef CONFIG_SPIM1_RK29
1834 &rk29xx_device_spi1m,
1836 #ifdef CONFIG_ADC_RK29
1839 #ifdef CONFIG_I2C0_RK29
1842 #ifdef CONFIG_I2C1_RK29
1845 #ifdef CONFIG_I2C2_RK29
1848 #ifdef CONFIG_I2C3_RK29
1852 #ifdef CONFIG_SND_RK29_SOC_I2S_2CH
1853 &rk29_device_iis_2ch,
1855 #ifdef CONFIG_SND_RK29_SOC_I2S_8CH
1856 &rk29_device_iis_8ch,
1859 #ifdef CONFIG_KEYS_RK29
1862 #ifdef CONFIG_SDMMC0_RK29
1863 &rk29_device_sdmmc0,
1865 #ifdef CONFIG_SDMMC1_RK29
1866 &rk29_device_sdmmc1,
1869 #ifdef CONFIG_MTD_NAND_RK29XX
1870 &rk29xx_device_nand,
1873 #ifdef CONFIG_WIFI_CONTROL_FUNC
1874 &rk29sdk_wifi_device,
1881 #ifdef CONFIG_MTD_NAND_RK29
1885 #ifdef CONFIG_FB_RK29
1887 &rk29_device_dma_cpy,
1889 #ifdef CONFIG_BACKLIGHT_RK29_BL
1890 &rk29_device_backlight,
1892 #ifdef CONFIG_RK29_VMAC
1895 #ifdef CONFIG_VIVANTE
1898 #ifdef CONFIG_VIDEO_RK29
1899 &rk29_device_camera, /* ddl@rock-chips.com : camera support */
1900 #if (SENSOR_IIC_ADDR_0 != 0x00)
1901 &rk29_soc_camera_pdrv_0,
1903 &rk29_soc_camera_pdrv_1,
1904 &android_pmem_cam_device,
1906 &android_pmem_device,
1907 &rk29_vpu_mem_device,
1908 #ifdef CONFIG_USB20_OTG
1909 &rk29_device_usb20_otg,
1911 #ifdef CONFIG_USB20_HOST
1912 &rk29_device_usb20_host,
1914 #ifdef CONFIG_USB11_HOST
1915 &rk29_device_usb11_host,
1917 #ifdef CONFIG_USB_ANDROID
1918 &android_usb_device,
1919 &usb_mass_storage_device,
1921 #ifdef CONFIG_RK29_IPP
1924 #ifdef CONFIG_VIDEO_RK29XX_VOUT
1925 &rk29_v4l2_output_devce,
1929 /*****************************************************************************************
1931 * author: cmc@rock-chips.com
1932 *****************************************************************************************/
1933 static int rk29_vmac_register_set(void)
1935 //config rk29 vmac as rmii, 100MHz
1936 u32 value= readl(RK29_GRF_BASE + 0xbc);
1937 value = (value & 0xfff7ff) | (0x400);
1938 writel(value, RK29_GRF_BASE + 0xbc);
1942 static int rk29_rmii_io_init(void)
1947 err = gpio_request(RK29_PIN6_PB0, "phy_power_en");
1949 gpio_free(RK29_PIN6_PB0);
1950 printk("-------request RK29_PIN6_PB0 fail--------\n");
1954 gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1955 gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1960 static int rk29_rmii_io_deinit(void)
1963 gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1964 gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1966 gpio_free(RK29_PIN6_PB0);
1970 static int rk29_rmii_power_control(int enable)
1974 gpio_direction_output(RK29_PIN6_PB0, GPIO_HIGH);
1975 gpio_set_value(RK29_PIN6_PB0, GPIO_HIGH);
1978 gpio_direction_output(RK29_PIN6_PB0, GPIO_LOW);
1979 gpio_set_value(RK29_PIN6_PB0, GPIO_LOW);
1984 struct rk29_vmac_platform_data rk29_vmac_pdata = {
1985 .vmac_register_set = rk29_vmac_register_set,
1986 .rmii_io_init = rk29_rmii_io_init,
1987 .rmii_io_deinit = rk29_rmii_io_deinit,
1988 .rmii_power_control = rk29_rmii_power_control,
1991 /*****************************************************************************************
1993 * author: cmc@rock-chips.com
1994 *****************************************************************************************/
1995 #define SPI_CHIPSELECT_NUM 2
1996 static struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
1999 .cs_gpio = RK29_PIN2_PC1,
2000 .cs_iomux_name = NULL,
2004 .cs_gpio = RK29_PIN1_PA4,
2005 .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL
2006 .cs_iomux_mode = GPIO1L_SPI0_CSN1,
2010 static struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
2013 .cs_gpio = RK29_PIN2_PC5,
2014 .cs_iomux_name = NULL,
2018 .cs_gpio = RK29_PIN1_PA3,
2019 .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL
2020 .cs_iomux_mode = GPIO1L_SPI1_CSN1,
2024 static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
2031 for (i=0; i<cs_num; i++) {
2032 rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
2033 ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
2036 gpio_free(cs_gpios[j].cs_gpio);
2037 //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
2039 printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
2042 gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
2049 static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
2055 for (i=0; i<cs_num; i++) {
2056 gpio_free(cs_gpios[i].cs_gpio);
2057 //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
2064 static int spi_io_fix_leakage_bug(void)
2067 gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
2072 static int spi_io_resume_leakage_bug(void)
2075 gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
2080 struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
2081 .num_chipselect = SPI_CHIPSELECT_NUM,
2082 .chipselect_gpios = rk29xx_spi0_cs_gpios,
2083 .io_init = spi_io_init,
2084 .io_deinit = spi_io_deinit,
2085 .io_fix_leakage_bug = spi_io_fix_leakage_bug,
2086 .io_resume_leakage_bug = spi_io_resume_leakage_bug,
2089 struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
2090 .num_chipselect = SPI_CHIPSELECT_NUM,
2091 .chipselect_gpios = rk29xx_spi1_cs_gpios,
2092 .io_init = spi_io_init,
2093 .io_deinit = spi_io_deinit,
2094 .io_fix_leakage_bug = spi_io_fix_leakage_bug,
2095 .io_resume_leakage_bug = spi_io_resume_leakage_bug,
2098 /*****************************************************************************************
2099 * xpt2046 touch panel
2100 * author: cmc@rock-chips.com
2101 *****************************************************************************************/
2102 #define XPT2046_GPIO_INT RK29_PIN0_PA3
2103 #define DEBOUNCE_REPTIME 3
2105 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)
2106 static struct xpt2046_platform_data xpt2046_info = {
2115 .debounce_rep = DEBOUNCE_REPTIME,
2117 .gpio_pendown = XPT2046_GPIO_INT,
2118 .penirq_recheck_delay_usecs = 1,
2120 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)
2121 static struct xpt2046_platform_data xpt2046_info = {
2130 .debounce_rep = DEBOUNCE_REPTIME,
2132 .gpio_pendown = XPT2046_GPIO_INT,
2133 .penirq_recheck_delay_usecs = 1,
2135 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)
2136 static struct xpt2046_platform_data xpt2046_info = {
2145 .debounce_rep = DEBOUNCE_REPTIME,
2147 .gpio_pendown = XPT2046_GPIO_INT,
2149 .penirq_recheck_delay_usecs = 1,
2151 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
2152 static struct xpt2046_platform_data xpt2046_info = {
2161 .debounce_rep = DEBOUNCE_REPTIME,
2163 .gpio_pendown = XPT2046_GPIO_INT,
2165 .penirq_recheck_delay_usecs = 1,
2169 static struct spi_board_info board_spi_devices[] = {
2170 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\
2171 ||defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
2173 .modalias = "xpt2046_ts",
2175 .max_speed_hz = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */
2177 .irq = XPT2046_GPIO_INT,
2178 .platform_data = &xpt2046_info,
2184 static void __init rk29_gic_init_irq(void)
2186 gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);
2187 gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);
2190 static void __init machine_rk29_init_irq(void)
2192 rk29_gic_init_irq();
2196 #define POWER_ON_PIN RK29_PIN4_PA4
2197 static void rk29_pm_power_off(void)
2199 printk(KERN_ERR "rk29_pm_power_off start...\n");
2200 gpio_direction_output(POWER_ON_PIN, GPIO_LOW);
2204 static void __init machine_rk29_board_init(void)
2206 rk29_board_iomux_init();
2208 gpio_request(POWER_ON_PIN,"poweronpin");
2209 gpio_set_value(POWER_ON_PIN, GPIO_HIGH);
2210 gpio_direction_output(POWER_ON_PIN, GPIO_HIGH);
2211 pm_power_off = rk29_pm_power_off;
2213 #ifdef CONFIG_WIFI_CONTROL_FUNC
2214 rk29sdk_wifi_bt_gpio_control_init();
2217 platform_add_devices(devices, ARRAY_SIZE(devices));
2218 #ifdef CONFIG_I2C0_RK29
2219 i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
2220 ARRAY_SIZE(board_i2c0_devices));
2222 #ifdef CONFIG_I2C1_RK29
2223 i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
2224 ARRAY_SIZE(board_i2c1_devices));
2226 #ifdef CONFIG_I2C2_RK29
2227 i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
2228 ARRAY_SIZE(board_i2c2_devices));
2230 #ifdef CONFIG_I2C3_RK29
2231 i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
2232 ARRAY_SIZE(board_i2c3_devices));
2235 spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
2237 rk29sdk_init_wifi_mem();
2240 static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,
2241 char **cmdline, struct meminfo *mi)
2244 mi->bank[0].start = RK29_SDRAM_PHYS;
2245 mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);
2246 mi->bank[0].size = LINUX_SIZE;
2249 static void __init machine_rk29_mapio(void)
2251 rk29_map_common_io();
2257 MACHINE_START(RK29, "RK29board")
2258 /* UART for LL DEBUG */
2259 .phys_io = RK29_UART1_PHYS,
2260 .io_pg_offst = ((RK29_UART1_BASE) >> 18) & 0xfffc,
2261 .boot_params = RK29_SDRAM_PHYS + 0x88000,
2262 .fixup = machine_rk29_fixup,
2263 .map_io = machine_rk29_mapio,
2264 .init_irq = machine_rk29_init_irq,
2265 .init_machine = machine_rk29_board_init,
2266 .timer = &rk29_timer,