8341b29bb37bd205d47987ec567bfc630bfc1de4
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk29 / board-rk29sdk.c
1 /* arch/arm/mach-rk29/board-rk29.c\r
2  *\r
3  * Copyright (C) 2010 ROCKCHIP, Inc.\r
4  *\r
5  * This software is licensed under the terms of the GNU General Public\r
6  * License version 2, as published by the Free Software Foundation, and\r
7  * may be copied, distributed, and modified under those terms.\r
8  *\r
9  * This program is distributed in the hope that it will be useful,\r
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
12  * GNU General Public License for more details.\r
13  *\r
14  */\r
15 \r
16 #include <linux/kernel.h>\r
17 #include <linux/init.h>\r
18 #include <linux/platform_device.h>\r
19 #include <linux/input.h>\r
20 #include <linux/io.h>\r
21 #include <linux/delay.h>\r
22 #include <linux/i2c.h>\r
23 #include <linux/spi/spi.h>\r
24 #include <linux/mmc/host.h>\r
25 #include <linux/android_pmem.h>\r
26 \r
27 #include <mach/hardware.h>\r
28 #include <asm/setup.h>\r
29 #include <asm/mach-types.h>\r
30 #include <asm/mach/arch.h>\r
31 #include <asm/mach/map.h>\r
32 #include <asm/mach/flash.h>\r
33 #include <asm/hardware/gic.h>\r
34 \r
35 #include <mach/iomux.h>\r
36 #include <mach/gpio.h>\r
37 #include <mach/irqs.h>\r
38 #include <mach/rk29_iomap.h>\r
39 #include <mach/board.h>\r
40 #include <mach/rk29_nand.h>\r
41 #include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */\r
42 #include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */\r
43 #include <mach/vpu_mem.h>\r
44 \r
45 \r
46 #include <linux/mtd/nand.h>\r
47 #include <linux/mtd/partitions.h>\r
48 \r
49 #include "devices.h"\r
50 #include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"\r
51 \r
52 \r
53 /* Set memory size of pmem */\r
54 #define SDRAM_SIZE          SZ_512M\r
55 #define PMEM_GPU_SIZE       (12 * SZ_1M)\r
56 #define PMEM_UI_SIZE        SZ_16M\r
57 #define PMEM_VPU_SIZE       SZ_32M\r
58 \r
59 #define PMEM_GPU_BASE       ((u32)RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)\r
60 #define PMEM_UI_BASE        (PMEM_GPU_BASE - PMEM_UI_SIZE)\r
61 #define PMEM_VPU_BASE       (PMEM_UI_BASE - PMEM_VPU_SIZE)\r
62 #define LINUX_SIZE          (PMEM_VPU_BASE - RK29_SDRAM_PHYS)\r
63 \r
64 extern struct sys_timer rk29_timer;\r
65 \r
66 int rk29_nand_io_init(void)\r
67 {\r
68     return 0;\r
69 }\r
70 \r
71 struct rk29_nand_platform_data rk29_nand_data = {\r
72     .width      = 1,     /* data bus width in bytes */\r
73     .hw_ecc     = 1,     /* hw ecc 0: soft ecc */\r
74     .num_flash    = 1,\r
75     .io_init   = rk29_nand_io_init,\r
76 };\r
77 \r
78 static struct rk29_gpio_bank rk29_gpiobankinit[] = {\r
79         {\r
80                 .id             = RK29_ID_GPIO0,\r
81                 .offset = RK29_GPIO0_BASE,\r
82         },\r
83         {\r
84                 .id             = RK29_ID_GPIO1,\r
85                 .offset = RK29_GPIO1_BASE,\r
86         },\r
87         {\r
88                 .id             = RK29_ID_GPIO2,\r
89                 .offset = RK29_GPIO2_BASE,\r
90         },\r
91         {\r
92                 .id             = RK29_ID_GPIO3,\r
93                 .offset = RK29_GPIO3_BASE,\r
94         },\r
95         {\r
96                 .id             = RK29_ID_GPIO4,\r
97                 .offset = RK29_GPIO4_BASE,\r
98         },\r
99         {\r
100                 .id             = RK29_ID_GPIO5,\r
101                 .offset = RK29_GPIO5_BASE,\r
102         },\r
103         {\r
104                 .id             = RK29_ID_GPIO6,\r
105                 .offset = RK29_GPIO6_BASE,\r
106         },\r
107 };\r
108 \r
109 /*****************************************************************************************\r
110  * lcd  devices\r
111  * author: zyw@rock-chips.com\r
112  *****************************************************************************************/\r
113 //#ifdef  CONFIG_LCD_TD043MGEA1\r
114 #define LCD_TXD_PIN          INVALID_GPIO\r
115 #define LCD_CLK_PIN          INVALID_GPIO\r
116 #define LCD_CS_PIN           INVALID_GPIO\r
117 /*****************************************************************************************\r
118 * frame buffe  devices\r
119 * author: zyw@rock-chips.com\r
120 *****************************************************************************************/\r
121 #define FB_ID                       0\r
122 #define FB_DISPLAY_ON_PIN           RK29_PIN6_PD0\r
123 #define FB_LCD_STANDBY_PIN          RK29_PIN6_PD1\r
124 #define FB_MCU_FMK_PIN              INVALID_GPIO\r
125 \r
126 #define FB_DISPLAY_ON_VALUE         GPIO_HIGH\r
127 #define FB_LCD_STANDBY_VALUE        GPIO_HIGH\r
128 \r
129 //#endif\r
130 static int rk29_lcd_io_init(void)\r
131 {\r
132     int ret = 0;\r
133     return ret;\r
134 }\r
135 \r
136 static int rk29_lcd_io_deinit(void)\r
137 {\r
138     int ret = 0;\r
139     return ret;\r
140 }\r
141 \r
142 struct rk29lcd_info rk29_lcd_info = {\r
143     .txd_pin  = LCD_TXD_PIN,\r
144     .clk_pin = LCD_CLK_PIN,\r
145     .cs_pin = LCD_CS_PIN,\r
146     .io_init   = rk29_lcd_io_init,\r
147     .io_deinit = rk29_lcd_io_deinit,\r
148 };\r
149 \r
150 \r
151 static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)\r
152 {\r
153     int ret = 0;\r
154     if(fb_setting->mcu_fmk_en && (FB_MCU_FMK_PIN != INVALID_GPIO))\r
155     {\r
156         ret = gpio_request(FB_MCU_FMK_PIN, NULL);\r
157         if(ret != 0)\r
158         {\r
159             gpio_free(FB_MCU_FMK_PIN);\r
160             printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");\r
161         }\r
162         gpio_direction_input(FB_MCU_FMK_PIN);\r
163     }\r
164     if(fb_setting->disp_on_en && (FB_DISPLAY_ON_PIN != INVALID_GPIO))\r
165     {\r
166         ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);\r
167         if(ret != 0)\r
168         {\r
169             gpio_free(FB_DISPLAY_ON_PIN);\r
170             printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");\r
171         }\r
172     }\r
173 \r
174     if(fb_setting->disp_on_en && (FB_LCD_STANDBY_PIN != INVALID_GPIO))\r
175     {\r
176         ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);\r
177         if(ret != 0)\r
178         {\r
179             gpio_free(FB_LCD_STANDBY_PIN);\r
180             printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");\r
181         }\r
182     }\r
183     return ret;\r
184 }\r
185 \r
186 struct rk29fb_info rk29_fb_info = {\r
187     .fb_id   = FB_ID,\r
188     .disp_on_pin = FB_DISPLAY_ON_PIN,\r
189     .disp_on_value = FB_DISPLAY_ON_VALUE,\r
190     .standby_pin = FB_LCD_STANDBY_PIN,\r
191     .standby_value = FB_LCD_STANDBY_VALUE,\r
192     .mcu_fmk_pin = FB_MCU_FMK_PIN,\r
193     .lcd_info = &rk29_lcd_info,\r
194     .io_init   = rk29_fb_io_init,\r
195 };\r
196 \r
197 static struct android_pmem_platform_data android_pmem_pdata = {\r
198         .name           = "pmem",\r
199         .start          = PMEM_UI_BASE,\r
200         .size           = PMEM_UI_SIZE,\r
201         .no_allocator   = 0,\r
202         .cached         = 1,\r
203 };\r
204 \r
205 static struct platform_device android_pmem_device = {\r
206         .name           = "android_pmem",\r
207         .id             = 0,\r
208         .dev            = {\r
209                 .platform_data = &android_pmem_pdata,\r
210         },\r
211 };\r
212 \r
213 \r
214 static struct vpu_mem_platform_data vpu_mem_pdata = {\r
215         .name           = "vpu_mem",\r
216         .start          = PMEM_VPU_BASE,\r
217         .size           = PMEM_VPU_SIZE,\r
218         .cached         = 1,\r
219 };\r
220 \r
221 static struct platform_device rk29_vpu_mem_device = {\r
222         .name           = "vpu_mem",\r
223         .id                 = 2,\r
224         .dev            = {\r
225         .platform_data = &vpu_mem_pdata,\r
226         },\r
227 };\r
228 \r
229 /*****************************************************************************************\r
230  * i2c devices\r
231  * author: kfx@rock-chips.com\r
232 *****************************************************************************************/\r
233 static int rk29_i2c0_io_init(void)\r
234 {\r
235         rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);\r
236         rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);\r
237         return 0;\r
238 }\r
239 \r
240 static int rk29_i2c1_io_init(void)\r
241 {\r
242         rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);\r
243         rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);\r
244         return 0;\r
245 }\r
246 static int rk29_i2c2_io_init(void)\r
247 {\r
248         rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);\r
249         rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);\r
250         return 0;\r
251 }\r
252 \r
253 static int rk29_i2c3_io_init(void)\r
254 {\r
255         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);\r
256         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);\r
257         return 0;\r
258 }\r
259 \r
260 struct rk29_i2c_platform_data default_i2c0_data = {\r
261         .bus_num    = 0,\r
262         .flags      = 0,\r
263         .slave_addr = 0xff,\r
264         .scl_rate  = 400*1000,\r
265         .mode           = I2C_MODE_IRQ,\r
266         .io_init = rk29_i2c0_io_init,\r
267 };\r
268 \r
269 struct rk29_i2c_platform_data default_i2c1_data = {\r
270         .bus_num    = 1,\r
271         .flags      = 0,\r
272         .slave_addr = 0xff,\r
273         .scl_rate  = 400*1000,\r
274         .mode           = I2C_MODE_POLL,\r
275         .io_init = rk29_i2c1_io_init,\r
276 };\r
277 \r
278 struct rk29_i2c_platform_data default_i2c2_data = {\r
279         .bus_num    = 2,\r
280         .flags      = 0,\r
281         .slave_addr = 0xff,\r
282         .scl_rate  = 400*1000,\r
283         .mode           = I2C_MODE_IRQ,\r
284         .io_init = rk29_i2c2_io_init,\r
285 };\r
286 \r
287 struct rk29_i2c_platform_data default_i2c3_data = {\r
288         .bus_num    = 3,\r
289         .flags      = 0,\r
290         .slave_addr = 0xff,\r
291         .scl_rate  = 400*1000,\r
292         .mode           = I2C_MODE_POLL,\r
293         .io_init = rk29_i2c3_io_init,\r
294 };\r
295 \r
296 #ifdef CONFIG_I2C0_RK29\r
297 static struct i2c_board_info __initdata board_i2c0_devices[] = {\r
298 #if defined (CONFIG_RK1000_CONTROL)\r
299         {\r
300                 .type                   = "rk1000_control",\r
301                 .addr           = 0x40,\r
302                 .flags                  = 0,\r
303         },\r
304 #endif\r
305 #if defined (CONFIG_SND_SOC_RK1000)\r
306         {\r
307                 .type                   = "rk1000_i2c_codec",\r
308                 .addr           = 0x60,\r
309                 .flags                  = 0,\r
310         },\r
311 #endif\r
312 #if defined (CONFIG_SND_SOC_WM8900)\r
313         {\r
314                 .type                   = "wm8900",\r
315                 .addr           = 0x1A,\r
316                 .flags                  = 0,\r
317         },\r
318 #endif\r
319 #if defined (CONFIG_BATTERY_STC3100)\r
320         {\r
321                 .type                   = "stc3100-battery",\r
322                 .addr           = 0x70,\r
323                 .flags                  = 0,\r
324         },\r
325 #endif\r
326 #if defined (CONFIG_BATTERY_BQ27510)\r
327         {\r
328                 .type                   = "bq27510-battery",\r
329                 .addr           = 0x55,\r
330                 .flags                  = 0,\r
331         },\r
332 #endif\r
333 #if defined (CONFIG_RTC_HYM8563)\r
334         {\r
335                 .type                   = "rtc_hym8563",\r
336                 .addr           = 0x51,\r
337                 .flags                  = 0,\r
338                 ///.irq            = RK2818_PIN_PA4,\r
339         },\r
340 #endif\r
341 };\r
342 #endif\r
343 \r
344 #ifdef CONFIG_I2C1_RK29\r
345 static struct i2c_board_info __initdata board_i2c1_devices[] = {\r
346 #if defined (CONFIG_RK1000_CONTROL1)\r
347         {\r
348                 .type                   = "rk1000_control",\r
349                 .addr                   = 0x40,\r
350                 .flags                  = 0,\r
351         },\r
352 #endif\r
353 #if defined (CONFIG_SENSORS_AK8973)\r
354         {\r
355                 .type                   = "ak8973",\r
356                 .addr           = 0x1c,\r
357                 .flags                  = 0,\r
358                 .irq                    = RK29_PIN4_PA1,\r
359         },\r
360 #endif\r
361 #if defined (CONFIG_SENSORS_AK8975)\r
362         {\r
363                 .type                   = "ak8975",\r
364                 .addr           = 0x1c,\r
365                 .flags                  = 0,\r
366                 .irq                    = RK29_PIN4_PA1,\r
367         },\r
368 #endif\r
369 };\r
370 #endif\r
371 \r
372 #ifdef CONFIG_I2C2_RK29\r
373 static struct i2c_board_info __initdata board_i2c2_devices[] = {\r
374 };\r
375 #endif\r
376 \r
377 #ifdef CONFIG_I2C3_RK29\r
378 static struct i2c_board_info __initdata board_i2c3_devices[] = {\r
379 };\r
380 #endif\r
381 \r
382 /*****************************************************************************************\r
383  * camera  devices\r
384  * author: ddl@rock-chips.com\r
385  *****************************************************************************************/\r
386 #ifdef CONFIG_VIDEO_RK29\r
387 #define SENSOR_NAME_0 RK29_CAM_SENSOR_NAME_OV2655                       /* back camera sensor */\r
388 #define SENSOR_IIC_ADDR_0           0x60\r
389 #define SENSOR_IIC_ADAPTER_ID_0    1\r
390 #define SENSOR_POWER_PIN_0         INVALID_GPIO\r
391 #define SENSOR_RESET_PIN_0         RK29_PIN0_PA2\r
392 #define SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L\r
393 #define SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L\r
394 \r
395 \r
396 #define SENSOR_NAME_1 RK29_CAM_SENSOR_NAME_OV2659                       /* front camera sensor */\r
397 #define SENSOR_IIC_ADDR_1           0x60\r
398 #define SENSOR_IIC_ADAPTER_ID_1    1\r
399 #define SENSOR_POWER_PIN_1         INVALID_GPIO\r
400 #define SENSOR_RESET_PIN_1         INVALID_GPIO\r
401 #define SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L\r
402 #define SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L\r
403 \r
404 static int rk29_sensor_io_init(void);\r
405 static int rk29_sensor_io_deinit(void);\r
406 \r
407 struct rk29camera_platform_data rk29_camera_platform_data = {\r
408     .io_init = rk29_sensor_io_init,\r
409     .io_deinit = rk29_sensor_io_deinit,\r
410     .gpio_res = {\r
411         {\r
412             .gpio_reset = SENSOR_RESET_PIN_0,\r
413             .gpio_power = SENSOR_POWER_PIN_0,\r
414             .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0),\r
415             .dev_name = SENSOR_NAME_0,\r
416         }, {\r
417             .gpio_reset = SENSOR_RESET_PIN_1,\r
418             .gpio_power = SENSOR_POWER_PIN_1,\r
419             .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1),\r
420             .dev_name = SENSOR_NAME_1,\r
421         }\r
422     }\r
423 };\r
424 \r
425 static int rk29_sensor_io_init(void)\r
426 {\r
427     int ret = 0, i;\r
428     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
429         unsigned int camera_ioflag;\r
430 \r
431     for (i=0; i<2; i++) {\r
432         camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;\r
433         camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;\r
434                 camera_ioflag = rk29_camera_platform_data.gpio_res[i].gpio_flag;\r
435 \r
436         if (camera_power != INVALID_GPIO) {\r
437             ret = gpio_request(camera_power, "camera power");\r
438             if (ret)\r
439                 continue;\r
440 \r
441             gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
442             gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
443 \r
444                         //printk("\n%s....%d  %x   \n",__FUNCTION__,__LINE__,(((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
445 \r
446         }\r
447 \r
448         if (camera_reset != INVALID_GPIO) {\r
449             ret = gpio_request(camera_reset, "camera reset");\r
450             if (ret) {\r
451                 if (camera_power != INVALID_GPIO)\r
452                     gpio_free(camera_power);\r
453 \r
454                 continue;\r
455             }\r
456 \r
457             gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
458             gpio_direction_output(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
459 \r
460                         //printk("\n%s....%d  %x \n",__FUNCTION__,__LINE__,((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
461 \r
462         }\r
463     }\r
464 \r
465     return 0;\r
466 }\r
467 \r
468 static int rk29_sensor_io_deinit(void)\r
469 {\r
470     unsigned int i;\r
471     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
472 \r
473     //printk("\n%s....%d    ******** ddl *********\n",__FUNCTION__,__LINE__);\r
474 \r
475     for (i=0; i<2; i++) {\r
476         camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;\r
477         camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;\r
478 \r
479         if (camera_power != INVALID_GPIO){\r
480             gpio_direction_input(camera_power);\r
481             gpio_free(camera_power);\r
482         }\r
483 \r
484         if (camera_reset != INVALID_GPIO)  {\r
485             gpio_direction_input(camera_reset);\r
486             gpio_free(camera_reset);\r
487         }\r
488     }\r
489 \r
490     return 0;\r
491 }\r
492 \r
493 \r
494 static int rk29_sensor_power(struct device *dev, int on)\r
495 {\r
496     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
497         unsigned int camera_ioflag;\r
498 \r
499     if(rk29_camera_platform_data.gpio_res[0].dev_name &&  (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {\r
500         camera_reset = rk29_camera_platform_data.gpio_res[0].gpio_reset;\r
501         camera_power = rk29_camera_platform_data.gpio_res[0].gpio_power;\r
502                 camera_ioflag = rk29_camera_platform_data.gpio_res[0].gpio_flag;\r
503     } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {\r
504         camera_reset = rk29_camera_platform_data.gpio_res[1].gpio_reset;\r
505         camera_power = rk29_camera_platform_data.gpio_res[1].gpio_power;\r
506                 camera_ioflag = rk29_camera_platform_data.gpio_res[1].gpio_flag;\r
507     }\r
508 \r
509     if (camera_reset != INVALID_GPIO) {\r
510         gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
511         //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
512     }\r
513     if (camera_power != INVALID_GPIO)  {\r
514         if (on) {\r
515                 gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
516                         //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
517                 } else {\r
518                         gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
519                         //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
520                 }\r
521         }\r
522 \r
523     if (camera_reset != INVALID_GPIO)  {\r
524                 if (on) {\r
525                 msleep(3);          /* delay 3 ms */\r
526                 gpio_set_value(camera_reset,(((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
527                 //printk("\n%s..%s..ResetPin= %d..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
528                 }\r
529     }\r
530     return 0;\r
531 }\r
532 \r
533 static struct i2c_board_info rk29_i2c_cam_info_0[] = {\r
534         {\r
535                 I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1)\r
536         },\r
537 };\r
538 \r
539 struct soc_camera_link rk29_iclink_0 = {\r
540         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
541         .power          = rk29_sensor_power,\r
542         .board_info     = &rk29_i2c_cam_info_0[0],\r
543         .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0,\r
544         .module_name    = SENSOR_NAME_0,\r
545 };\r
546 \r
547 /*platform_device : soc-camera need  */\r
548 struct platform_device rk29_soc_camera_pdrv_0 = {\r
549         .name   = "soc-camera-pdrv",\r
550         .id     = 0,\r
551         .dev    = {\r
552                 .init_name = SENSOR_NAME_0,\r
553                 .platform_data = &rk29_iclink_0,\r
554         },\r
555 };\r
556 \r
557 static struct i2c_board_info rk29_i2c_cam_info_1[] = {\r
558         {\r
559                 I2C_BOARD_INFO(SENSOR_NAME_1, SENSOR_IIC_ADDR_1>>1)\r
560         },\r
561 };\r
562 \r
563 struct soc_camera_link rk29_iclink_1 = {\r
564         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
565         .power          = rk29_sensor_power,\r
566         .board_info     = &rk29_i2c_cam_info_1[0],\r
567         .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_1,\r
568         .module_name    = SENSOR_NAME_1,\r
569 };\r
570 \r
571 /*platform_device : soc-camera need  */\r
572 struct platform_device rk29_soc_camera_pdrv_1 = {\r
573         .name   = "soc-camera-pdrv",\r
574         .id     = 1,\r
575         .dev    = {\r
576                 .init_name = SENSOR_NAME_1,\r
577                 .platform_data = &rk29_iclink_1,\r
578         },\r
579 };\r
580 \r
581 \r
582 extern struct platform_device rk29_device_camera;\r
583 #endif\r
584 /*****************************************************************************************\r
585  * backlight  devices\r
586  * author: nzy@rock-chips.com\r
587  *****************************************************************************************/\r
588 #ifdef CONFIG_BACKLIGHT_RK29_BL\r
589  /*\r
590  GPIO1B5_PWM0_NAME,       GPIO1L_PWM0\r
591  GPIO5D2_PWM1_UART1SIRIN_NAME,  GPIO5H_PWM1\r
592  GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME,   GPIO2L_PWM2\r
593  GPIO1A5_EMMCPWREN_PWM3_NAME,     GPIO1L_PWM3\r
594  */\r
595 \r
596 #define PWM_ID            0\r
597 #define PWM_MUX_NAME      GPIO1B5_PWM0_NAME\r
598 #define PWM_MUX_MODE      GPIO1L_PWM0\r
599 #define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5\r
600 #define PWM_EFFECT_VALUE  0\r
601 \r
602 //#define LCD_DISP_ON_PIN\r
603 \r
604 #ifdef  LCD_DISP_ON_PIN\r
605 #define BL_EN_MUX_NAME    GPIOF34_UART3_SEL_NAME\r
606 #define BL_EN_MUX_MODE    IOMUXB_GPIO1_B34\r
607 \r
608 #define BL_EN_PIN         GPIO0L_GPIO0A5\r
609 #define BL_EN_VALUE       GPIO_HIGH\r
610 #endif\r
611 static int rk29_backlight_io_init(void)\r
612 {\r
613     int ret = 0;\r
614 \r
615     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);\r
616         #ifdef  LCD_DISP_ON_PIN\r
617     rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);\r
618 \r
619     ret = gpio_request(BL_EN_PIN, NULL);\r
620     if(ret != 0)\r
621     {\r
622         gpio_free(BL_EN_PIN);\r
623     }\r
624 \r
625     gpio_direction_output(BL_EN_PIN, 0);\r
626     gpio_set_value(BL_EN_PIN, BL_EN_VALUE);\r
627         #endif\r
628     return ret;\r
629 }\r
630 \r
631 static int rk29_backlight_io_deinit(void)\r
632 {\r
633     int ret = 0;\r
634     #ifdef  LCD_DISP_ON_PIN\r
635     gpio_free(BL_EN_PIN);\r
636     #endif\r
637     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);\r
638     return ret;\r
639 }\r
640 struct rk29_bl_info rk29_bl_info = {\r
641     .pwm_id   = PWM_ID,\r
642     .bl_ref   = PWM_EFFECT_VALUE,\r
643     .io_init   = rk29_backlight_io_init,\r
644     .io_deinit = rk29_backlight_io_deinit,\r
645 };\r
646 #endif\r
647 /*****************************************************************************************\r
648  * SDMMC devices\r
649 *****************************************************************************************/\r
650 #ifdef CONFIG_SDMMC0_RK29\r
651 static int rk29_sdmmc0_cfg_gpio(void)\r
652 {\r
653         rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);\r
654         rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);\r
655         rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);\r
656         rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);\r
657         rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);\r
658         rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);\r
659         rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);\r
660         return 0;\r
661 }\r
662 \r
663 #define CONFIG_SDMMC0_USE_DMA\r
664 struct rk29_sdmmc_platform_data default_sdmmc0_data = {\r
665         .host_ocr_avail = (MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|\r
666                                            MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|\r
667                                            MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),\r
668         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),\r
669         .io_init = rk29_sdmmc0_cfg_gpio,\r
670         .dma_name = "sd_mmc",\r
671 #ifdef CONFIG_SDMMC0_USE_DMA\r
672         .use_dma  = 1,\r
673 #else\r
674         .use_dma = 0,\r
675 #endif\r
676 };\r
677 #endif\r
678 #ifdef CONFIG_SDMMC1_RK29\r
679 //#define CONFIG_SDMMC1_USE_DMA\r
680 static int rk29_sdmmc1_cfg_gpio(void)\r
681 {\r
682         rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);\r
683         rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);\r
684         rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);\r
685         rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);\r
686         rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);\r
687         rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);\r
688         rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);\r
689         return 0;\r
690 }\r
691 \r
692 struct rk29_sdmmc_platform_data default_sdmmc1_data = {\r
693         .host_ocr_avail = (MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|\r
694                                            MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|\r
695                                            MMC_VDD_32_33|MMC_VDD_33_34),\r
696         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|\r
697                                    MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),\r
698         .io_init = rk29_sdmmc1_cfg_gpio,\r
699         .dma_name = "sdio",\r
700 #ifdef CONFIG_SDMMC1_USE_DMA\r
701         .use_dma  = 1,\r
702 #else\r
703         .use_dma = 0,\r
704 #endif\r
705 };\r
706 #endif\r
707 \r
708 #ifdef CONFIG_VIVANTE\r
709 static struct resource resources_gpu[] = {\r
710     [0] = {\r
711                 .name   = "gpu_irq",\r
712         .start  = IRQ_GPU,\r
713         .end    = IRQ_GPU,\r
714         .flags  = IORESOURCE_IRQ,\r
715     },\r
716     [1] = {\r
717                 .name = "gpu_base",\r
718         .start  = RK29_GPU_PHYS,\r
719         .end    = RK29_GPU_PHYS + (256 << 10),\r
720         .flags  = IORESOURCE_MEM,\r
721     },\r
722     [2] = {\r
723                 .name = "gpu_mem",\r
724         .start  = PMEM_GPU_BASE,\r
725         .end    = PMEM_GPU_BASE + PMEM_GPU_SIZE,\r
726         .flags  = IORESOURCE_MEM,\r
727     },\r
728 };\r
729 struct platform_device rk29_device_gpu = {\r
730     .name             = "galcore",\r
731     .id               = 0,\r
732     .num_resources    = ARRAY_SIZE(resources_gpu),\r
733     .resource         = resources_gpu,\r
734 };\r
735 #endif\r
736 #ifdef CONFIG_KEYS_RK29\r
737 extern struct rk29_keys_platform_data rk29_keys_pdata;\r
738 static struct platform_device rk29_device_keys = {\r
739         .name           = "rk29-keys",\r
740         .id             = -1,\r
741         .dev            = {\r
742                 .platform_data  = &rk29_keys_pdata,\r
743         },\r
744 };\r
745 #endif\r
746 \r
747 static void __init rk29_board_iomux_init(void)\r
748 {\r
749         #ifdef CONFIG_UART0_RK29\r
750         rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);\r
751         rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);\r
752         #ifdef CONFIG_UART0_CTS_RTS_RK29\r
753         rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);\r
754         rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);\r
755         #endif\r
756         #endif\r
757         #ifdef CONFIG_UART1_RK29\r
758         rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);\r
759         rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN);\r
760         #endif\r
761         #ifdef CONFIG_UART2_RK29\r
762         rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME, GPIO2L_UART2_SOUT);\r
763         rk29_mux_api_set(GPIO2B0_UART2SIN_NAME, GPIO2L_UART2_SIN);\r
764         #ifdef CONFIG_UART2_CTS_RTS_RK29\r
765         rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);\r
766         rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME, GPIO2L_UART2_CTS_N);\r
767         #endif\r
768         #endif\r
769         #ifdef CONFIG_UART3_RK29\r
770         rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME, GPIO2L_UART3_SOUT);\r
771         rk29_mux_api_set(GPIO2B2_UART3SIN_NAME, GPIO2L_UART3_SIN);\r
772         #ifdef CONFIG_UART3_CTS_RTS_RK29\r
773         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_UART3_RTS_N);\r
774         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_UART3_CTS_N);\r
775         #endif\r
776         #endif\r
777 }\r
778 \r
779 static struct platform_device *devices[] __initdata = {\r
780 #ifdef CONFIG_UART1_RK29\r
781         &rk29_device_uart1,\r
782 #endif\r
783 #ifdef CONFIG_SPIM0_RK29\r
784     &rk29xx_device_spi0m,\r
785 #endif\r
786 #ifdef CONFIG_SPIM1_RK29\r
787     &rk29xx_device_spi1m,\r
788 #endif\r
789 #ifdef CONFIG_ADC_RK29\r
790         &rk29_device_adc,\r
791 #endif\r
792 #ifdef CONFIG_I2C0_RK29\r
793         &rk29_device_i2c0,\r
794 #endif\r
795 #ifdef CONFIG_I2C1_RK29\r
796         &rk29_device_i2c1,\r
797 #endif\r
798 #ifdef CONFIG_I2C2_RK29\r
799         &rk29_device_i2c2,\r
800 #endif\r
801 #ifdef CONFIG_I2C3_RK29\r
802         &rk29_device_i2c3,\r
803 #endif\r
804 \r
805 #ifdef CONFIG_SND_RK29_SOC_I2S_2CH\r
806         &rk29_device_iis_2ch,\r
807 #endif\r
808 #ifdef CONFIG_SND_RK29_SOC_I2S_8CH\r
809         &rk29_device_iis_8ch,\r
810 #endif\r
811 \r
812 #ifdef CONFIG_KEYS_RK29\r
813         &rk29_device_keys,\r
814 #endif\r
815 #ifdef CONFIG_SDMMC0_RK29\r
816         &rk29_device_sdmmc0,\r
817 #endif\r
818 #ifdef CONFIG_SDMMC1_RK29\r
819         &rk29_device_sdmmc1,\r
820 #endif\r
821 #ifdef CONFIG_MTD_NAND_RK29\r
822         &rk29_device_nand,\r
823 #endif\r
824 \r
825 #ifdef CONFIG_FB_RK29\r
826         &rk29_device_fb,\r
827 #endif\r
828 #ifdef CONFIG_BACKLIGHT_RK29_BL\r
829         &rk29_device_backlight,\r
830 #endif\r
831 #ifdef CONFIG_VIVANTE\r
832         &rk29_device_gpu,\r
833 #endif\r
834 #ifdef CONFIG_VIDEO_RK29\r
835         &rk29_device_camera,      /* ddl@rock-chips.com : camera support  */\r
836         &rk29_soc_camera_pdrv_0,\r
837         &rk29_soc_camera_pdrv_1,\r
838 #endif\r
839         &android_pmem_device,\r
840         &rk29_vpu_mem_device,\r
841 };\r
842 \r
843 /*****************************************************************************************\r
844  * spi devices\r
845  * author: cmc@rock-chips.com\r
846  *****************************************************************************************/\r
847 #define SPI_CHIPSELECT_NUM 2\r
848 struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
849     {\r
850                 .name = "spi0 cs0",\r
851                 .cs_gpio = RK29_PIN2_PC1,\r
852                 .cs_iomux_name = NULL,\r
853         },\r
854         {\r
855                 .name = "spi0 cs1",\r
856                 .cs_gpio = RK29_PIN1_PA4,\r
857                 .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL\r
858                 .cs_iomux_mode = GPIO1L_SPI0_CSN1,\r
859         }\r
860 };\r
861 \r
862 struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
863     {\r
864                 .name = "spi1 cs0",\r
865                 .cs_gpio = RK29_PIN2_PC5,\r
866                 .cs_iomux_name = NULL,\r
867         },\r
868         {\r
869                 .name = "spi1 cs1",\r
870                 .cs_gpio = RK29_PIN1_PA3,\r
871                 .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL\r
872                 .cs_iomux_mode = GPIO1L_SPI0_CSN1,\r
873         }\r
874 };\r
875 \r
876 static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)\r
877 {\r
878 #if 0\r
879         int i,j,ret;\r
880 \r
881         //cs\r
882         if (cs_gpios) {\r
883                 for (i=0; i<cs_num; i++) {\r
884                         rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);\r
885                         ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);\r
886                         if (ret) {\r
887                                 for (j=0;j<i;j++) {\r
888                                         gpio_free(cs_gpios[j].cs_gpio);\r
889                                         //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);\r
890                                 }\r
891                                 printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);\r
892                                 return -1;\r
893                         }\r
894                         gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);\r
895                 }\r
896         }\r
897 #endif\r
898         return 0;\r
899 }\r
900 \r
901 static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)\r
902 {\r
903 #if 0\r
904         int i;\r
905 \r
906         if (cs_gpios) {\r
907                 for (i=0; i<cs_num; i++) {\r
908                         gpio_free(cs_gpios[i].cs_gpio);\r
909                         //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);\r
910                 }\r
911         }\r
912 #endif\r
913         return 0;\r
914 }\r
915 \r
916 static int spi_io_fix_leakage_bug(void)\r
917 {\r
918 #if 0\r
919         gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);\r
920 #endif\r
921         return 0;\r
922 }\r
923 \r
924 static int spi_io_resume_leakage_bug(void)\r
925 {\r
926 #if 0\r
927         gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);\r
928 #endif\r
929         return 0;\r
930 }\r
931 \r
932 struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {\r
933         .num_chipselect = SPI_CHIPSELECT_NUM,\r
934         .chipselect_gpios = rk29xx_spi0_cs_gpios,\r
935         .io_init = spi_io_init,\r
936         .io_deinit = spi_io_deinit,\r
937         .io_fix_leakage_bug = spi_io_fix_leakage_bug,\r
938         .io_resume_leakage_bug = spi_io_resume_leakage_bug,\r
939 };\r
940 \r
941 struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {\r
942         .num_chipselect = SPI_CHIPSELECT_NUM,\r
943         .chipselect_gpios = rk29xx_spi1_cs_gpios,\r
944         .io_init = spi_io_init,\r
945         .io_deinit = spi_io_deinit,\r
946         .io_fix_leakage_bug = spi_io_fix_leakage_bug,\r
947         .io_resume_leakage_bug = spi_io_resume_leakage_bug,\r
948 };\r
949 \r
950 /*****************************************************************************************\r
951  * xpt2046 touch panel\r
952  * author: cmc@rock-chips.com\r
953  *****************************************************************************************/\r
954 #define XPT2046_GPIO_INT           RK29_PIN0_PA3\r
955 #define DEBOUNCE_REPTIME  3\r
956 \r
957 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)\r
958 static struct xpt2046_platform_data xpt2046_info = {\r
959         .model                  = 2046,\r
960         .keep_vref_on   = 1,\r
961         .swap_xy                = 0,\r
962         .x_min                  = 0,\r
963         .x_max                  = 320,\r
964         .y_min                  = 0,\r
965         .y_max                  = 480,\r
966         .debounce_max           = 7,\r
967         .debounce_rep           = DEBOUNCE_REPTIME,\r
968         .debounce_tol           = 20,\r
969         .gpio_pendown           = XPT2046_GPIO_INT,\r
970         .penirq_recheck_delay_usecs = 1,\r
971 };\r
972 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\r
973 static struct xpt2046_platform_data xpt2046_info = {\r
974         .model                  = 2046,\r
975         .keep_vref_on   = 1,\r
976         .swap_xy                = 0,\r
977         .x_min                  = 0,\r
978         .x_max                  = 320,\r
979         .y_min                  = 0,\r
980         .y_max                  = 480,\r
981         .debounce_max           = 7,\r
982         .debounce_rep           = DEBOUNCE_REPTIME,\r
983         .debounce_tol           = 20,\r
984         .gpio_pendown           = XPT2046_GPIO_INT,\r
985         .penirq_recheck_delay_usecs = 1,\r
986 };\r
987 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)\r
988 static struct xpt2046_platform_data xpt2046_info = {\r
989         .model                  = 2046,\r
990         .keep_vref_on   = 1,\r
991         .swap_xy                = 1,\r
992         .x_min                  = 0,\r
993         .x_max                  = 800,\r
994         .y_min                  = 0,\r
995         .y_max                  = 480,\r
996         .debounce_max           = 7,\r
997         .debounce_rep           = DEBOUNCE_REPTIME,\r
998         .debounce_tol           = 20,\r
999         .gpio_pendown           = XPT2046_GPIO_INT,\r
1000 \r
1001         .penirq_recheck_delay_usecs = 1,\r
1002 };\r
1003 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)\r
1004 static struct xpt2046_platform_data xpt2046_info = {\r
1005         .model                  = 2046,\r
1006         .keep_vref_on   = 1,\r
1007         .swap_xy                = 1,\r
1008         .x_min                  = 0,\r
1009         .x_max                  = 800,\r
1010         .y_min                  = 0,\r
1011         .y_max                  = 480,\r
1012         .debounce_max           = 7,\r
1013         .debounce_rep           = DEBOUNCE_REPTIME,\r
1014         .debounce_tol           = 20,\r
1015         .gpio_pendown           = XPT2046_GPIO_INT,\r
1016 \r
1017         .penirq_recheck_delay_usecs = 1,\r
1018 };\r
1019 #endif\r
1020 \r
1021 static struct spi_board_info board_spi_devices[] = {\r
1022 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\\r
1023     ||defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)\r
1024         {\r
1025                 .modalias       = "xpt2046_ts",\r
1026                 .chip_select    = 0,\r
1027                 .max_speed_hz   = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */\r
1028                 .bus_num        = 0,\r
1029                 .irq = XPT2046_GPIO_INT,\r
1030                 .platform_data = &xpt2046_info,\r
1031         },\r
1032 #endif\r
1033 };\r
1034 \r
1035 \r
1036 static void __init rk29_gic_init_irq(void)\r
1037 {\r
1038         gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);\r
1039         gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);\r
1040 }\r
1041 \r
1042 static void __init machine_rk29_init_irq(void)\r
1043 {\r
1044         rk29_gic_init_irq();\r
1045         rk29_gpio_init(rk29_gpiobankinit, MAX_BANK);\r
1046         rk29_gpio_irq_setup();\r
1047 }\r
1048 \r
1049 static void __init machine_rk29_board_init(void)\r
1050 {\r
1051         rk29_board_iomux_init();\r
1052                 platform_add_devices(devices, ARRAY_SIZE(devices));\r
1053 #ifdef CONFIG_I2C0_RK29\r
1054         i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,\r
1055                         ARRAY_SIZE(board_i2c0_devices));\r
1056 #endif\r
1057 #ifdef CONFIG_I2C1_RK29\r
1058         i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,\r
1059                         ARRAY_SIZE(board_i2c1_devices));\r
1060 #endif\r
1061 #ifdef CONFIG_I2C2_RK29\r
1062         i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,\r
1063                         ARRAY_SIZE(board_i2c2_devices));\r
1064 #endif\r
1065 #ifdef CONFIG_I2C3_RK29\r
1066         i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,\r
1067                         ARRAY_SIZE(board_i2c3_devices));\r
1068 #endif\r
1069 \r
1070         spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));\r
1071 }\r
1072 \r
1073 static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,\r
1074                                         char **cmdline, struct meminfo *mi)\r
1075 {\r
1076         mi->nr_banks = 1;\r
1077         mi->bank[0].start = RK29_SDRAM_PHYS;\r
1078         mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);\r
1079         mi->bank[0].size = LINUX_SIZE;\r
1080 }\r
1081 \r
1082 static void __init machine_rk29_mapio(void)\r
1083 {\r
1084         rk29_map_common_io();\r
1085         rk29_clock_init();\r
1086         rk29_iomux_init();\r
1087 }\r
1088 \r
1089 MACHINE_START(RK29, "RK29board")\r
1090         /* UART for LL DEBUG */\r
1091         .phys_io        = RK29_UART1_PHYS,\r
1092         .io_pg_offst    = ((RK29_UART1_BASE) >> 18) & 0xfffc,\r
1093         .boot_params    = RK29_SDRAM_PHYS + 0x88000,\r
1094         .fixup          = machine_rk29_fixup,\r
1095         .map_io         = machine_rk29_mapio,\r
1096         .init_irq       = machine_rk29_init_irq,\r
1097         .init_machine   = machine_rk29_board_init,\r
1098         .timer          = &rk29_timer,\r
1099 MACHINE_END\r