arch/arm/mach-rk29/board-rk29sdk.c

   1 /* arch/arm/mach-rk29/board-rk29.c\r
   2  *\r
   3  * Copyright (C) 2010 ROCKCHIP, Inc.\r
   4  *\r
   5  * This software is licensed under the terms of the GNU General Public\r
   6  * License version 2, as published by the Free Software Foundation, and\r
   7  * may be copied, distributed, and modified under those terms.\r
   8  *\r
   9  * This program is distributed in the hope that it will be useful,\r
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of\r
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\r
  12  * GNU General Public License for more details.\r
  13  *\r
  14  */\r
  15 \r
  16 #include <linux/kernel.h>\r
  17 #include <linux/init.h>\r
  18 #include <linux/platform_device.h>\r
  19 #include <linux/input.h>\r
  20 #include <linux/io.h>\r
  21 #include <linux/delay.h>\r
  22 #include <linux/i2c.h>\r
  23 #include <linux/spi/spi.h>\r
  24 #include <linux/mmc/host.h>\r
  25 #include <linux/android_pmem.h>\r
  26 \r
  27 #include <mach/hardware.h>\r
  28 #include <asm/setup.h>\r
  29 #include <asm/mach-types.h>\r
  30 #include <asm/mach/arch.h>\r
  31 #include <asm/mach/map.h>\r
  32 #include <asm/mach/flash.h>\r
  33 #include <asm/hardware/gic.h>\r
  34 \r
  35 #include <mach/iomux.h>\r
  36 #include <mach/gpio.h>\r
  37 #include <mach/irqs.h>\r
  38 #include <mach/rk29_iomap.h>\r
  39 #include <mach/board.h>\r
  40 #include <mach/rk29_nand.h>\r
  41 #include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */\r
  42 #include <media/soc_camera.h>                               /* ddl@rock-chips.com : camera support */\r
  43 #include <mach/vpu_mem.h>\r
  44 \r
  45 \r
  46 #include <linux/mtd/nand.h>\r
  47 #include <linux/mtd/partitions.h>\r
  48 \r
  49 #include "devices.h"\r
  50 #include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"\r
  51 \r
  52 \r
  53 /* Set memory size of pmem */\r
  54 #define SDRAM_SIZE          SZ_512M\r
  55 #define PMEM_GPU_SIZE       (12 * SZ_1M)\r
  56 #define PMEM_UI_SIZE        SZ_16M\r
  57 #define PMEM_VPU_SIZE       SZ_32M\r
  58 \r
  59 #define PMEM_GPU_BASE       (RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)\r
  60 #define PMEM_UI_BASE        (PMEM_GPU_BASE - PMEM_UI_SIZE)\r
  61 #define PMEM_VPU_BASE       (PMEM_UI_BASE - PMEM_VPU_SIZE)\r
  62 #define LINUX_SIZE          (PMEM_VPU_BASE - RK29_SDRAM_PHYS)\r
  63 \r
  64 extern struct sys_timer rk29_timer;\r
  65 \r
  66 int rk29_nand_io_init(void)\r
  67 {\r
  68     return 0;\r
  69 }\r
  70 \r
  71 struct rk29_nand_platform_data rk29_nand_data = {\r
  72     .width      = 1,     /* data bus width in bytes */\r
  73     .hw_ecc     = 1,     /* hw ecc 0: soft ecc */\r
  74     .num_flash    = 1,\r
  75     .io_init   = rk29_nand_io_init,\r
  76 };\r
  77 \r
  78 static struct rk29_gpio_bank rk29_gpiobankinit[] = {\r
  79         {\r
  80                 .id             = RK29_ID_GPIO0,\r
  81                 .offset = RK29_GPIO0_BASE,\r
  82         },\r
  83         {\r
  84                 .id             = RK29_ID_GPIO1,\r
  85                 .offset = RK29_GPIO1_BASE,\r
  86         },\r
  87         {\r
  88                 .id             = RK29_ID_GPIO2,\r
  89                 .offset = RK29_GPIO2_BASE,\r
  90         },\r
  91         {\r
  92                 .id             = RK29_ID_GPIO3,\r
  93                 .offset = RK29_GPIO3_BASE,\r
  94         },\r
  95         {\r
  96                 .id             = RK29_ID_GPIO4,\r
  97                 .offset = RK29_GPIO4_BASE,\r
  98         },\r
  99         {\r
 100                 .id             = RK29_ID_GPIO5,\r
 101                 .offset = RK29_GPIO5_BASE,\r
 102         },\r
 103         {\r
 104                 .id             = RK29_ID_GPIO6,\r
 105                 .offset = RK29_GPIO6_BASE,\r
 106         },\r
 107 };\r
 108 \r
 109 /*****************************************************************************************\r
 110  * lcd  devices\r
 111  * author: zyw@rock-chips.com\r
 112  *****************************************************************************************/\r
 113 //#ifdef  CONFIG_LCD_TD043MGEA1\r
 114 #define LCD_TXD_PIN          RK29_PIN0_PA6   // ÂÒÌî,µÃÐÞ¸Ä\r
 115 #define LCD_CLK_PIN          RK29_PIN0_PA7   // ÂÒÌî,µÃÐÞ¸Ä\r
 116 #define LCD_CS_PIN           RK29_PIN0_PB6   // ÂÒÌî,µÃÐÞ¸Ä\r
 117 #define LCD_TXD_MUX_NAME     GPIOE_U1IR_I2C1_NAME\r
 118 #define LCD_CLK_MUX_NAME     NULL\r
 119 #define LCD_CS_MUX_NAME      GPIOH6_IQ_SEL_NAME\r
 120 #define LCD_TXD_MUX_MODE     0\r
 121 #define LCD_CLK_MUX_MODE     0\r
 122 #define LCD_CS_MUX_MODE      0\r
 123 //#endif\r
 124 static int rk29_lcd_io_init(void)\r
 125 {\r
 126     int ret = 0;\r
 127 \r
 128 #if 0\r
 129     rk29_mux_api_set(LCD_CS_MUX_NAME, LCD_CS_MUX_MODE);\r
 130     if (LCD_CS_PIN != INVALID_GPIO) {\r
 131         ret = gpio_request(LCD_CS_PIN, NULL);\r
 132         if(ret != 0)\r
 133         {\r
 134             goto err1;\r
 135             printk(">>>>>> lcd cs gpio_request err \n ");\r
 136         }\r
 137     }\r
 138 \r
 139     rk29_mux_api_set(LCD_CLK_MUX_NAME, LCD_CLK_MUX_MODE);\r
 140     if (LCD_CLK_PIN != INVALID_GPIO) {\r
 141         ret = gpio_request(LCD_CLK_PIN, NULL);\r
 142         if(ret != 0)\r
 143         {\r
 144             goto err2;\r
 145             printk(">>>>>> lcd clk gpio_request err \n ");\r
 146         }\r
 147     }\r
 148 \r
 149     rk29_mux_api_set(LCD_TXD_MUX_NAME, LCD_TXD_MUX_MODE);\r
 150     if (LCD_TXD_PIN != INVALID_GPIO) {\r
 151         ret = gpio_request(LCD_TXD_PIN, NULL);\r
 152         if(ret != 0)\r
 153         {\r
 154             goto err3;\r
 155             printk(">>>>>> lcd txd gpio_request err \n ");\r
 156         }\r
 157     }\r
 158 \r
 159     return 0;\r
 160 \r
 161 err3:\r
 162     if (LCD_CLK_PIN != INVALID_GPIO) {\r
 163         gpio_free(LCD_CLK_PIN);\r
 164     }\r
 165 err2:\r
 166     if (LCD_CS_PIN != INVALID_GPIO) {\r
 167         gpio_free(LCD_CS_PIN);\r
 168     }\r
 169 err1:\r
 170 #endif\r
 171     return ret;\r
 172 }\r
 173 \r
 174 static int rk29_lcd_io_deinit(void)\r
 175 {\r
 176     int ret = 0;\r
 177 #if 0\r
 178     gpio_direction_output(LCD_CLK_PIN, 0);\r
 179     gpio_set_value(LCD_CLK_PIN, GPIO_HIGH);\r
 180     gpio_direction_output(LCD_TXD_PIN, 0);\r
 181     gpio_set_value(LCD_TXD_PIN, GPIO_HIGH);\r
 182 \r
 183     gpio_free(LCD_CS_PIN);\r
 184     rk29_mux_api_mode_resume(LCD_CS_MUX_NAME);\r
 185     gpio_free(LCD_CLK_PIN);\r
 186     gpio_free(LCD_TXD_PIN);\r
 187     rk29_mux_api_mode_resume(LCD_TXD_MUX_NAME);\r
 188     rk29_mux_api_mode_resume(LCD_CLK_MUX_NAME);\r
 189 #endif\r
 190     return ret;\r
 191 }\r
 192 \r
 193 struct rk29lcd_info rk29_lcd_info = {\r
 194     //.txd_pin  = LCD_TXD_PIN,\r
 195     //.clk_pin = LCD_CLK_PIN,\r
 196     //.cs_pin = LCD_CS_PIN,\r
 197     .io_init   = rk29_lcd_io_init,\r
 198     .io_deinit = rk29_lcd_io_deinit,\r
 199 };\r
 200 \r
 201 \r
 202 /*****************************************************************************************\r
 203  * frame buffe  devices\r
 204  * author: zyw@rock-chips.com\r
 205  *****************************************************************************************/\r
 206 \r
 207 #define FB_ID                       0\r
 208 #define FB_DISPLAY_ON_PIN           RK29_PIN0_PB1   // ÂÒÌî,µÃÐÞ¸Ä\r
 209 #define FB_LCD_STANDBY_PIN          INVALID_GPIO\r
 210 #define FB_MCU_FMK_PIN              INVALID_GPIO\r
 211 \r
 212 #if 0\r
 213 #define FB_DISPLAY_ON_VALUE         GPIO_LOW\r
 214 #define FB_LCD_STANDBY_VALUE        0\r
 215 \r
 216 #define FB_DISPLAY_ON_MUX_NAME      GPIOB1_SMCS1_MMC0PCA_NAME\r
 217 #define FB_DISPLAY_ON_MUX_MODE      IOMUXA_GPIO0_B1\r
 218 \r
 219 #define FB_LCD_STANDBY_MUX_NAME     NULL\r
 220 #define FB_LCD_STANDBY_MUX_MODE     1\r
 221 \r
 222 #define FB_MCU_FMK_PIN_MUX_NAME     NULL\r
 223 #define FB_MCU_FMK_MUX_MODE         0\r
 224 \r
 225 #define FB_DATA0_16_MUX_NAME       GPIOC_LCDC16BIT_SEL_NAME\r
 226 #define FB_DATA0_16_MUX_MODE        1\r
 227 \r
 228 #define FB_DATA17_18_MUX_NAME      GPIOC_LCDC18BIT_SEL_NAME\r
 229 #define FB_DATA17_18_MUX_MODE       1\r
 230 \r
 231 #define FB_DATA19_24_MUX_NAME      GPIOC_LCDC24BIT_SEL_NAME\r
 232 #define FB_DATA19_24_MUX_MODE       1\r
 233 \r
 234 #define FB_DEN_MUX_NAME            CXGPIO_LCDDEN_SEL_NAME\r
 235 #define FB_DEN_MUX_MODE             1\r
 236 \r
 237 #define FB_VSYNC_MUX_NAME          CXGPIO_LCDVSYNC_SEL_NAME\r
 238 #define FB_VSYNC_MUX_MODE           1\r
 239 \r
 240 #define FB_MCU_FMK_MUX_NAME        NULL\r
 241 #define FB_MCU_FMK_MUX_MODE         0\r
 242 #endif\r
 243 static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)\r
 244 {\r
 245     int ret = 0;\r
 246 #if 0\r
 247     if(fb_setting->data_num <=16)\r
 248         rk29_mux_api_set(FB_DATA0_16_MUX_NAME, FB_DATA0_16_MUX_MODE);\r
 249     if(fb_setting->data_num >16 && fb_setting->data_num<=18)\r
 250         rk29_mux_api_set(FB_DATA17_18_MUX_NAME, FB_DATA17_18_MUX_MODE);\r
 251     if(fb_setting->data_num >18)\r
 252         rk29_mux_api_set(FB_DATA19_24_MUX_NAME, FB_DATA19_24_MUX_MODE);\r
 253 \r
 254     if(fb_setting->vsync_en)\r
 255         rk29_mux_api_set(FB_VSYNC_MUX_NAME, FB_VSYNC_MUX_MODE);\r
 256 \r
 257     if(fb_setting->den_en)\r
 258         rk29_mux_api_set(FB_DEN_MUX_NAME, FB_DEN_MUX_MODE);\r
 259 \r
 260     if(fb_setting->mcu_fmk_en && FB_MCU_FMK_MUX_NAME && (FB_MCU_FMK_PIN != INVALID_GPIO))\r
 261     {\r
 262         rk29_mux_api_set(FB_MCU_FMK_MUX_NAME, FB_MCU_FMK_MUX_MODE);\r
 263         ret = gpio_request(FB_MCU_FMK_PIN, NULL);\r
 264         if(ret != 0)\r
 265         {\r
 266             gpio_free(FB_MCU_FMK_PIN);\r
 267             printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");\r
 268         }\r
 269         gpio_direction_input(FB_MCU_FMK_PIN);\r
 270     }\r
 271 \r
 272     if(fb_setting->disp_on_en && FB_DISPLAY_ON_MUX_NAME && (FB_DISPLAY_ON_PIN != INVALID_GPIO))\r
 273     {\r
 274         rk29_mux_api_set(FB_DISPLAY_ON_MUX_NAME, FB_DISPLAY_ON_MUX_MODE);\r
 275         ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);\r
 276         if(ret != 0)\r
 277         {\r
 278             gpio_free(FB_DISPLAY_ON_PIN);\r
 279             printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");\r
 280         }\r
 281     }\r
 282 \r
 283     if(fb_setting->disp_on_en && FB_LCD_STANDBY_MUX_NAME && (FB_LCD_STANDBY_PIN != INVALID_GPIO))\r
 284     {\r
 285         rk29_mux_api_set(FB_LCD_STANDBY_MUX_NAME, FB_LCD_STANDBY_MUX_MODE);\r
 286         ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);\r
 287         if(ret != 0)\r
 288         {\r
 289             gpio_free(FB_LCD_STANDBY_PIN);\r
 290             printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");\r
 291         }\r
 292     }\r
 293 #endif\r
 294     return ret;\r
 295 }\r
 296 \r
 297 struct rk29fb_info rk29_fb_info = {\r
 298     .fb_id   = FB_ID,\r
 299     //.disp_on_pin = FB_DISPLAY_ON_PIN,\r
 300     //.disp_on_value = FB_DISPLAY_ON_VALUE,\r
 301     //.standby_pin = FB_LCD_STANDBY_PIN,\r
 302     //.standby_value = FB_LCD_STANDBY_VALUE,\r
 303     //.mcu_fmk_pin = FB_MCU_FMK_PIN,\r
 304     .lcd_info = &rk29_lcd_info,\r
 305     .io_init   = rk29_fb_io_init,\r
 306 };\r
 307 \r
 308 static struct android_pmem_platform_data android_pmem_pdata = {\r
 309         .name           = "pmem",\r
 310         .start          = PMEM_UI_BASE,\r
 311         .size           = PMEM_UI_SIZE,\r
 312         .no_allocator   = 0,\r
 313         .cached         = 1,\r
 314 };\r
 315 \r
 316 static struct platform_device android_pmem_device = {\r
 317         .name           = "android_pmem",\r
 318         .id             = 0,\r
 319         .dev            = {\r
 320                 .platform_data = &android_pmem_pdata,\r
 321         },\r
 322 };\r
 323 \r
 324 \r
 325 static struct vpu_mem_platform_data vpu_mem_pdata = {\r
 326         .name           = "vpu_mem",\r
 327         .start          = PMEM_VPU_BASE,\r
 328         .size           = PMEM_VPU_SIZE,\r
 329         .cached         = 1,\r
 330 };\r
 331 \r
 332 static struct platform_device rk29_vpu_mem_device = {\r
 333         .name           = "vpu_mem",\r
 334         .id                 = 2,\r
 335         .dev            = {\r
 336         .platform_data = &vpu_mem_pdata,\r
 337         },\r
 338 };\r
 339 \r
 340 /*****************************************************************************************\r
 341  * i2c devices\r
 342  * author: kfx@rock-chips.com\r
 343 *****************************************************************************************/\r
 344 static int rk29_i2c0_io_init(void)\r
 345 {\r
 346         rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);\r
 347         rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);\r
 348         return 0;\r
 349 }\r
 350 \r
 351 static int rk29_i2c1_io_init(void)\r
 352 {\r
 353         rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);\r
 354         rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);\r
 355         return 0;\r
 356 }\r
 357 static int rk29_i2c2_io_init(void)\r
 358 {\r
 359         rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);\r
 360         rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);\r
 361         return 0;\r
 362 }\r
 363 \r
 364 static int rk29_i2c3_io_init(void)\r
 365 {\r
 366         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);\r
 367         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);\r
 368         return 0;\r
 369 }\r
 370 \r
 371 struct rk29_i2c_platform_data default_i2c0_data = {\r
 372         .bus_num    = 0,\r
 373         .flags      = 0,\r
 374         .slave_addr = 0xff,\r
 375         .scl_rate  = 400*1000,\r
 376         .mode           = I2C_MODE_IRQ,\r
 377         .io_init = rk29_i2c0_io_init,\r
 378 };\r
 379 \r
 380 struct rk29_i2c_platform_data default_i2c1_data = {\r
 381         .bus_num    = 1,\r
 382         .flags      = 0,\r
 383         .slave_addr = 0xff,\r
 384         .scl_rate  = 400*1000,\r
 385         .mode           = I2C_MODE_POLL,\r
 386         .io_init = rk29_i2c1_io_init,\r
 387 };\r
 388 \r
 389 struct rk29_i2c_platform_data default_i2c2_data = {\r
 390         .bus_num    = 2,\r
 391         .flags      = 0,\r
 392         .slave_addr = 0xff,\r
 393         .scl_rate  = 400*1000,\r
 394         .mode           = I2C_MODE_IRQ,\r
 395         .io_init = rk29_i2c2_io_init,\r
 396 };\r
 397 \r
 398 struct rk29_i2c_platform_data default_i2c3_data = {\r
 399         .bus_num    = 3,\r
 400         .flags      = 0,\r
 401         .slave_addr = 0xff,\r
 402         .scl_rate  = 400*1000,\r
 403         .mode           = I2C_MODE_POLL,\r
 404         .io_init = rk29_i2c3_io_init,\r
 405 };\r
 406 \r
 407 #ifdef CONFIG_I2C0_RK29\r
 408 static struct i2c_board_info __initdata board_i2c0_devices[] = {\r
 409 #if defined (CONFIG_RK1000_CONTROL)\r
 410         {\r
 411                 .type                   = "rk1000_control",\r
 412                 .addr           = 0x40,\r
 413                 .flags                  = 0,\r
 414         },\r
 415 #endif\r
 416 #if defined (CONFIG_SND_SOC_RK1000)\r
 417         {\r
 418                 .type                   = "rk1000_i2c_codec",\r
 419                 .addr           = 0x60,\r
 420                 .flags                  = 0,\r
 421         },\r
 422 #endif\r
 423 #if defined (CONFIG_BATTERY_STC3100)\r
 424         {\r
 425                 .type                   = "stc3100-battery",\r
 426                 .addr           = 0x70,\r
 427                 .flags                  = 0,\r
 428         },\r
 429 #endif\r
 430 #if defined (CONFIG_BATTERY_BQ27510)\r
 431         {\r
 432                 .type                   = "bq27510-battery",\r
 433                 .addr           = 0x55,\r
 434                 .flags                  = 0,\r
 435         },\r
 436 #endif\r
 437 };\r
 438 #endif\r
 439 \r
 440 #ifdef CONFIG_I2C1_RK29\r
 441 static struct i2c_board_info __initdata board_i2c1_devices[] = {\r
 442 #if defined (CONFIG_RK1000_CONTROL1)\r
 443         {\r
 444                 .type                   = "rk1000_control",\r
 445                 .addr                   = 0x40,\r
 446                 .flags                  = 0,\r
 447         },\r
 448 #endif\r
 449 #if defined (CONFIG_SENSORS_AK8973)\r
 450         {\r
 451                 .type                   = "ak8973",\r
 452                 .addr           = 0x1c,\r
 453                 .flags                  = 0,\r
 454                 .irq                    = RK29_PIN4_PA1,\r
 455         },\r
 456 #endif\r
 457 #if defined (CONFIG_SENSORS_AK8975)\r
 458         {\r
 459                 .type                   = "ak8975",\r
 460                 .addr           = 0x1c,\r
 461                 .flags                  = 0,\r
 462                 .irq                    = RK29_PIN4_PA1,\r
 463         },\r
 464 #endif\r
 465 };\r
 466 #endif\r
 467 \r
 468 #ifdef CONFIG_I2C2_RK29\r
 469 static struct i2c_board_info __initdata board_i2c2_devices[] = {\r
 470 };\r
 471 #endif\r
 472 \r
 473 #ifdef CONFIG_I2C3_RK29\r
 474 static struct i2c_board_info __initdata board_i2c3_devices[] = {\r
 475 };\r
 476 #endif\r
 477 \r
 478 /*****************************************************************************************\r
 479  * camera  devices\r
 480  * author: ddl@rock-chips.com\r
 481  *****************************************************************************************/\r
 482 #ifdef CONFIG_VIDEO_RK29\r
 483 #define SENSOR_NAME_0 RK29_CAM_SENSOR_NAME_OV2655                       /* back camera sensor */\r
 484 #define SENSOR_IIC_ADDR_0           0x60\r
 485 #define SENSOR_IIC_ADAPTER_ID_0    1\r
 486 #define SENSOR_POWER_PIN_0         INVALID_GPIO\r
 487 #define SENSOR_RESET_PIN_0         RK29_PIN0_PA2\r
 488 #define SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L\r
 489 #define SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L\r
 490 \r
 491 \r
 492 #define SENSOR_NAME_1 RK29_CAM_SENSOR_NAME_OV2659                       /* front camera sensor */\r
 493 #define SENSOR_IIC_ADDR_1           0x60\r
 494 #define SENSOR_IIC_ADAPTER_ID_1    1\r
 495 #define SENSOR_POWER_PIN_1         INVALID_GPIO\r
 496 #define SENSOR_RESET_PIN_1         INVALID_GPIO\r
 497 #define SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L\r
 498 #define SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L\r
 499 \r
 500 static int rk29_sensor_io_init(void);\r
 501 static int rk29_sensor_io_deinit(void);\r
 502 \r
 503 struct rk29camera_platform_data rk29_camera_platform_data = {\r
 504     .io_init = rk29_sensor_io_init,\r
 505     .io_deinit = rk29_sensor_io_deinit,\r
 506     .gpio_res = {\r
 507         {\r
 508             .gpio_reset = SENSOR_RESET_PIN_0,\r
 509             .gpio_power = SENSOR_POWER_PIN_0,\r
 510             .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0),\r
 511             .dev_name = SENSOR_NAME_0,\r
 512         }, {\r
 513             .gpio_reset = SENSOR_RESET_PIN_1,\r
 514             .gpio_power = SENSOR_POWER_PIN_1,\r
 515             .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1),\r
 516             .dev_name = SENSOR_NAME_1,\r
 517         }\r
 518     }\r
 519 };\r
 520 \r
 521 static int rk29_sensor_io_init(void)\r
 522 {\r
 523     int ret = 0, i;\r
 524     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
 525         unsigned int camera_ioflag;\r
 526 \r
 527     for (i=0; i<2; i++) {\r
 528         camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;\r
 529         camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;\r
 530                 camera_ioflag = rk29_camera_platform_data.gpio_res[i].gpio_flag;\r
 531 \r
 532         if (camera_power != INVALID_GPIO) {\r
 533             ret = gpio_request(camera_power, "camera power");\r
 534             if (ret)\r
 535                 continue;\r
 536 \r
 537             gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 538             gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 539 \r
 540                         //printk("\n%s....%d  %x   \n",__FUNCTION__,__LINE__,(((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 541 \r
 542         }\r
 543 \r
 544         if (camera_reset != INVALID_GPIO) {\r
 545             ret = gpio_request(camera_reset, "camera reset");\r
 546             if (ret) {\r
 547                 if (camera_power != INVALID_GPIO)\r
 548                     gpio_free(camera_power);\r
 549 \r
 550                 continue;\r
 551             }\r
 552 \r
 553             gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 554             gpio_direction_output(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 555 \r
 556                         //printk("\n%s....%d  %x \n",__FUNCTION__,__LINE__,((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 557 \r
 558         }\r
 559     }\r
 560 \r
 561     return 0;\r
 562 }\r
 563 \r
 564 static int rk29_sensor_io_deinit(void)\r
 565 {\r
 566     unsigned int i;\r
 567     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
 568 \r
 569     //printk("\n%s....%d    ******** ddl *********\n",__FUNCTION__,__LINE__);\r
 570 \r
 571     for (i=0; i<2; i++) {\r
 572         camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;\r
 573         camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;\r
 574 \r
 575         if (camera_power != INVALID_GPIO){\r
 576             gpio_direction_input(camera_power);\r
 577             gpio_free(camera_power);\r
 578         }\r
 579 \r
 580         if (camera_reset != INVALID_GPIO)  {\r
 581             gpio_direction_input(camera_reset);\r
 582             gpio_free(camera_reset);\r
 583         }\r
 584     }\r
 585 \r
 586     return 0;\r
 587 }\r
 588 \r
 589 \r
 590 static int rk29_sensor_power(struct device *dev, int on)\r
 591 {\r
 592     unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;\r
 593         unsigned int camera_ioflag;\r
 594 \r
 595     if(rk29_camera_platform_data.gpio_res[0].dev_name &&  (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {\r
 596         camera_reset = rk29_camera_platform_data.gpio_res[0].gpio_reset;\r
 597         camera_power = rk29_camera_platform_data.gpio_res[0].gpio_power;\r
 598                 camera_ioflag = rk29_camera_platform_data.gpio_res[0].gpio_flag;\r
 599     } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {\r
 600         camera_reset = rk29_camera_platform_data.gpio_res[1].gpio_reset;\r
 601         camera_power = rk29_camera_platform_data.gpio_res[1].gpio_power;\r
 602                 camera_ioflag = rk29_camera_platform_data.gpio_res[1].gpio_flag;\r
 603     }\r
 604 \r
 605     if (camera_reset != INVALID_GPIO) {\r
 606         gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 607         //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 608     }\r
 609     if (camera_power != INVALID_GPIO)  {\r
 610         if (on) {\r
 611                 gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 612                         //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 613                 } else {\r
 614                         gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 615                         //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));\r
 616                 }\r
 617         }\r
 618 \r
 619     if (camera_reset != INVALID_GPIO)  {\r
 620                 if (on) {\r
 621                 msleep(3);          /* delay 3 ms */\r
 622                 gpio_set_value(camera_reset,(((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 623                 //printk("\n%s..%s..ResetPin= %d..PinLevel = %x   \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));\r
 624                 }\r
 625     }\r
 626     return 0;\r
 627 }\r
 628 \r
 629 static struct i2c_board_info rk29_i2c_cam_info_0[] = {\r
 630         {\r
 631                 I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1)\r
 632         },\r
 633 };\r
 634 \r
 635 struct soc_camera_link rk29_iclink_0 = {\r
 636         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
 637         .power          = rk29_sensor_power,\r
 638         .board_info     = &rk29_i2c_cam_info_0[0],\r
 639         .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0,\r
 640         .module_name    = SENSOR_NAME_0,\r
 641 };\r
 642 \r
 643 /*platform_device : soc-camera need  */\r
 644 struct platform_device rk29_soc_camera_pdrv_0 = {\r
 645         .name   = "soc-camera-pdrv",\r
 646         .id     = 0,\r
 647         .dev    = {\r
 648                 .init_name = SENSOR_NAME_0,\r
 649                 .platform_data = &rk29_iclink_0,\r
 650         },\r
 651 };\r
 652 \r
 653 static struct i2c_board_info rk29_i2c_cam_info_1[] = {\r
 654         {\r
 655                 I2C_BOARD_INFO(SENSOR_NAME_1, SENSOR_IIC_ADDR_1>>1)\r
 656         },\r
 657 };\r
 658 \r
 659 struct soc_camera_link rk29_iclink_1 = {\r
 660         .bus_id         = RK29_CAM_PLATFORM_DEV_ID,\r
 661         .power          = rk29_sensor_power,\r
 662         .board_info     = &rk29_i2c_cam_info_1[0],\r
 663         .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_1,\r
 664         .module_name    = SENSOR_NAME_1,\r
 665 };\r
 666 \r
 667 /*platform_device : soc-camera need  */\r
 668 struct platform_device rk29_soc_camera_pdrv_1 = {\r
 669         .name   = "soc-camera-pdrv",\r
 670         .id     = 1,\r
 671         .dev    = {\r
 672                 .init_name = SENSOR_NAME_1,\r
 673                 .platform_data = &rk29_iclink_1,\r
 674         },\r
 675 };\r
 676 \r
 677 \r
 678 extern struct platform_device rk29_device_camera;\r
 679 #endif\r
 680 /*****************************************************************************************\r
 681  * backlight  devices\r
 682  * author: nzy@rock-chips.com\r
 683  *****************************************************************************************/\r
 684 #ifdef CONFIG_BACKLIGHT_RK29_BL\r
 685  /*\r
 686  GPIO1B5_PWM0_NAME,       GPIO1L_PWM0\r
 687  GPIO5D2_PWM1_UART1SIRIN_NAME,  GPIO5H_PWM1\r
 688  GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME,   GPIO2L_PWM2\r
 689  GPIO1A5_EMMCPWREN_PWM3_NAME,     GPIO1L_PWM3\r
 690  */\r
 691 \r
 692 #define PWM_ID            0\r
 693 #define PWM_MUX_NAME      GPIO1B5_PWM0_NAME\r
 694 #define PWM_MUX_MODE      GPIO1L_PWM0\r
 695 #define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5\r
 696 #define PWM_EFFECT_VALUE  0\r
 697 \r
 698 //#define LCD_DISP_ON_PIN\r
 699 \r
 700 #ifdef  LCD_DISP_ON_PIN\r
 701 #define BL_EN_MUX_NAME    GPIOF34_UART3_SEL_NAME\r
 702 #define BL_EN_MUX_MODE    IOMUXB_GPIO1_B34\r
 703 \r
 704 #define BL_EN_PIN         GPIO0L_GPIO0A5\r
 705 #define BL_EN_VALUE       GPIO_HIGH\r
 706 #endif\r
 707 static int rk29_backlight_io_init(void)\r
 708 {\r
 709     int ret = 0;\r
 710 \r
 711     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);\r
 712         #ifdef  LCD_DISP_ON_PIN\r
 713     rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);\r
 714 \r
 715     ret = gpio_request(BL_EN_PIN, NULL);\r
 716     if(ret != 0)\r
 717     {\r
 718         gpio_free(BL_EN_PIN);\r
 719     }\r
 720 \r
 721     gpio_direction_output(BL_EN_PIN, 0);\r
 722     gpio_set_value(BL_EN_PIN, BL_EN_VALUE);\r
 723         #endif\r
 724     return ret;\r
 725 }\r
 726 \r
 727 static int rk29_backlight_io_deinit(void)\r
 728 {\r
 729     int ret = 0;\r
 730     #ifdef  LCD_DISP_ON_PIN\r
 731     gpio_free(BL_EN_PIN);\r
 732     #endif\r
 733     rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);\r
 734     return ret;\r
 735 }\r
 736 struct rk29_bl_info rk29_bl_info = {\r
 737     .pwm_id   = PWM_ID,\r
 738     .bl_ref   = PWM_EFFECT_VALUE,\r
 739     .io_init   = rk29_backlight_io_init,\r
 740     .io_deinit = rk29_backlight_io_deinit,\r
 741 };\r
 742 #endif\r
 743 /*****************************************************************************************\r
 744  * SDMMC devices\r
 745 *****************************************************************************************/\r
 746 #ifdef CONFIG_SDMMC0_RK29\r
 747 static int rk29_sdmmc0_cfg_gpio(void)\r
 748 {\r
 749         rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);\r
 750         rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);\r
 751         rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);\r
 752         rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);\r
 753         rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);\r
 754         rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);\r
 755         rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);\r
 756         return 0;\r
 757 }\r
 758 \r
 759 #define CONFIG_SDMMC0_USE_DMA\r
 760 struct rk29_sdmmc_platform_data default_sdmmc0_data = {\r
 761         .host_ocr_avail = (MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|\r
 762                                            MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|\r
 763                                            MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),\r
 764         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),\r
 765         .io_init = rk29_sdmmc0_cfg_gpio,\r
 766         .dma_name = "sd_mmc",\r
 767 #ifdef CONFIG_SDMMC0_USE_DMA\r
 768         .use_dma  = 1,\r
 769 #else\r
 770         .use_dma = 0,\r
 771 #endif\r
 772 };\r
 773 #endif\r
 774 #ifdef CONFIG_SDMMC1_RK29\r
 775 //#define CONFIG_SDMMC1_USE_DMA\r
 776 static int rk29_sdmmc1_cfg_gpio(void)\r
 777 {\r
 778         rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);\r
 779         rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);\r
 780         rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);\r
 781         rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);\r
 782         rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);\r
 783         rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);\r
 784         rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);\r
 785         return 0;\r
 786 }\r
 787 \r
 788 struct rk29_sdmmc_platform_data default_sdmmc1_data = {\r
 789         .host_ocr_avail = (MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|\r
 790                                            MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|\r
 791                                            MMC_VDD_32_33|MMC_VDD_33_34),\r
 792         .host_caps      = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|\r
 793                                    MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),\r
 794         .io_init = rk29_sdmmc1_cfg_gpio,\r
 795         .dma_name = "sdio",\r
 796 #ifdef CONFIG_SDMMC1_USE_DMA\r
 797         .use_dma  = 1,\r
 798 #else\r
 799         .use_dma = 0,\r
 800 #endif\r
 801 };\r
 802 #endif\r
 803 \r
 804 #ifdef CONFIG_VIVANTE\r
 805 static struct resource resources_gpu[] = {\r
 806     [0] = {\r
 807                 .name   = "gpu_irq",\r
 808         .start  = IRQ_GPU,\r
 809         .end    = IRQ_GPU,\r
 810         .flags  = IORESOURCE_IRQ,\r
 811     },\r
 812     [1] = {\r
 813                 .name = "gpu_base",\r
 814         .start  = RK29_GPU_PHYS,\r
 815         .end    = RK29_GPU_PHYS + (256 << 10),\r
 816         .flags  = IORESOURCE_MEM,\r
 817     },\r
 818     [2] = {\r
 819                 .name = "gpu_mem",\r
 820         .start  = PMEM_GPU_BASE,\r
 821         .end    = PMEM_GPU_BASE + PMEM_GPU_SIZE,\r
 822         .flags  = IORESOURCE_MEM,\r
 823     },\r
 824 };\r
 825 struct platform_device rk29_device_gpu = {\r
 826     .name             = "galcore",\r
 827     .id               = 0,\r
 828     .num_resources    = ARRAY_SIZE(resources_gpu),\r
 829     .resource         = resources_gpu,\r
 830 };\r
 831 #endif\r
 832 #ifdef CONFIG_KEYS_RK29\r
 833 extern struct rk29_keys_platform_data rk29_keys_pdata;\r
 834 static struct platform_device rk29_device_keys = {\r
 835         .name           = "rk29-keys",\r
 836         .id             = -1,\r
 837         .dev            = {\r
 838                 .platform_data  = &rk29_keys_pdata,\r
 839         },\r
 840 };\r
 841 #endif\r
 842 \r
 843 static void __init rk29_board_iomux_init(void)\r
 844 {\r
 845         #ifdef CONFIG_UART0_RK29\r
 846         rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);\r
 847         rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);\r
 848         #ifdef CONFIG_UART0_CTS_RTS_RK29\r
 849         rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);\r
 850         rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);\r
 851         #endif\r
 852         #endif\r
 853         #ifdef CONFIG_UART1_RK29\r
 854         rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);\r
 855         rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN);\r
 856         #endif\r
 857         #ifdef CONFIG_UART2_RK29\r
 858         rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME, GPIO2L_UART2_SOUT);\r
 859         rk29_mux_api_set(GPIO2B0_UART2SIN_NAME, GPIO2L_UART2_SIN);\r
 860         #ifdef CONFIG_UART2_CTS_RTS_RK29\r
 861         rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);\r
 862         rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME, GPIO2L_UART2_CTS_N);\r
 863         #endif\r
 864         #endif\r
 865         #ifdef CONFIG_UART3_RK29\r
 866         rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME, GPIO2L_UART3_SOUT);\r
 867         rk29_mux_api_set(GPIO2B2_UART3SIN_NAME, GPIO2L_UART3_SIN);\r
 868         #ifdef CONFIG_UART3_CTS_RTS_RK29\r
 869         rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_UART3_RTS_N);\r
 870         rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_UART3_CTS_N);\r
 871         #endif\r
 872         #endif\r
 873 }\r
 874 \r
 875 static struct platform_device *devices[] __initdata = {\r
 876 #ifdef CONFIG_UART1_RK29\r
 877         &rk29_device_uart1,\r
 878 #endif\r
 879 #ifdef CONFIG_SPIM0_RK29\r
 880     &rk29xx_device_spi0m,\r
 881 #endif\r
 882 #ifdef CONFIG_SPIM1_RK29\r
 883     &rk29xx_device_spi1m,\r
 884 #endif\r
 885 #ifdef CONFIG_ADC_RK29\r
 886         &rk29_device_adc,\r
 887 #endif\r
 888 #ifdef CONFIG_I2C0_RK29\r
 889         &rk29_device_i2c0,\r
 890 #endif\r
 891 #ifdef CONFIG_I2C1_RK29\r
 892         &rk29_device_i2c1,\r
 893 #endif\r
 894 #ifdef CONFIG_I2C2_RK29\r
 895         &rk29_device_i2c2,\r
 896 #endif\r
 897 #ifdef CONFIG_I2C3_RK29\r
 898         &rk29_device_i2c3,\r
 899 #endif\r
 900 \r
 901 #ifdef CONFIG_SND_RK29_SOC_I2S_2CH\r
 902         &rk29_device_iis_2ch,\r
 903 #endif\r
 904 #ifdef CONFIG_SND_RK29_SOC_I2S_8CH\r
 905         &rk29_device_iis_8ch,\r
 906 #endif\r
 907 \r
 908 #ifdef CONFIG_KEYS_RK29\r
 909         &rk29_device_keys,\r
 910 #endif\r
 911 #ifdef CONFIG_SDMMC0_RK29\r
 912         &rk29_device_sdmmc0,\r
 913 #endif\r
 914 #ifdef CONFIG_SDMMC1_RK29\r
 915         &rk29_device_sdmmc1,\r
 916 #endif\r
 917 #ifdef CONFIG_MTD_NAND_RK29\r
 918         &rk29_device_nand,\r
 919 #endif\r
 920 \r
 921 #ifdef CONFIG_FB_RK29\r
 922         &rk29_device_fb,\r
 923 #endif\r
 924 #ifdef CONFIG_BACKLIGHT_RK29_BL\r
 925         &rk29_device_backlight,\r
 926 #endif\r
 927 #ifdef CONFIG_VIVANTE\r
 928         &rk29_device_gpu,\r
 929 #endif\r
 930 #ifdef CONFIG_VIDEO_RK29\r
 931         &rk29_device_camera,      /* ddl@rock-chips.com : camera support  */\r
 932         &rk29_soc_camera_pdrv_0,\r
 933         &rk29_soc_camera_pdrv_1,\r
 934 #endif\r
 935         &android_pmem_device,\r
 936         &rk29_vpu_mem_device,\r
 937 };\r
 938 \r
 939 /*****************************************************************************************\r
 940  * spi devices\r
 941  * author: cmc@rock-chips.com\r
 942  *****************************************************************************************/\r
 943 #define SPI_CHIPSELECT_NUM 2\r
 944 struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
 945     {\r
 946                 .name = "spi0 cs0",\r
 947                 .cs_gpio = RK29_PIN2_PC1,\r
 948                 .cs_iomux_name = NULL,\r
 949         },\r
 950         {\r
 951                 .name = "spi0 cs1",\r
 952                 .cs_gpio = RK29_PIN1_PA4,\r
 953                 .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL\r
 954                 .cs_iomux_mode = GPIO1L_SPI0_CSN1,\r
 955         }\r
 956 };\r
 957 \r
 958 struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {\r
 959     {\r
 960                 .name = "spi1 cs0",\r
 961                 .cs_gpio = RK29_PIN2_PC5,\r
 962                 .cs_iomux_name = NULL,\r
 963         },\r
 964         {\r
 965                 .name = "spi1 cs1",\r
 966                 .cs_gpio = RK29_PIN1_PA3,\r
 967                 .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL\r
 968                 .cs_iomux_mode = GPIO1L_SPI0_CSN1,\r
 969         }\r
 970 };\r
 971 \r
 972 static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)\r
 973 {\r
 974 #if 0\r
 975         int i,j,ret;\r
 976 \r
 977         //cs\r
 978         if (cs_gpios) {\r
 979                 for (i=0; i<cs_num; i++) {\r
 980                         rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);\r
 981                         ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);\r
 982                         if (ret) {\r
 983                                 for (j=0;j<i;j++) {\r
 984                                         gpio_free(cs_gpios[j].cs_gpio);\r
 985                                         //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);\r
 986                                 }\r
 987                                 printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);\r
 988                                 return -1;\r
 989                         }\r
 990                         gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);\r
 991                 }\r
 992         }\r
 993 #endif\r
 994         return 0;\r
 995 }\r
 996 \r
 997 static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)\r
 998 {\r
 999 #if 0\r
1000         int i;\r
1001 \r
1002         if (cs_gpios) {\r
1003                 for (i=0; i<cs_num; i++) {\r
1004                         gpio_free(cs_gpios[i].cs_gpio);\r
1005                         //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);\r
1006                 }\r
1007         }\r
1008 #endif\r
1009         return 0;\r
1010 }\r
1011 \r
1012 static int spi_io_fix_leakage_bug(void)\r
1013 {\r
1014 #if 0\r
1015         gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);\r
1016 #endif\r
1017         return 0;\r
1018 }\r
1019 \r
1020 static int spi_io_resume_leakage_bug(void)\r
1021 {\r
1022 #if 0\r
1023         gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);\r
1024 #endif\r
1025         return 0;\r
1026 }\r
1027 \r
1028 struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {\r
1029         .num_chipselect = SPI_CHIPSELECT_NUM,\r
1030         .chipselect_gpios = rk29xx_spi0_cs_gpios,\r
1031         .io_init = spi_io_init,\r
1032         .io_deinit = spi_io_deinit,\r
1033         .io_fix_leakage_bug = spi_io_fix_leakage_bug,\r
1034         .io_resume_leakage_bug = spi_io_resume_leakage_bug,\r
1035 };\r
1036 \r
1037 struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {\r
1038         .num_chipselect = SPI_CHIPSELECT_NUM,\r
1039         .chipselect_gpios = rk29xx_spi1_cs_gpios,\r
1040         .io_init = spi_io_init,\r
1041         .io_deinit = spi_io_deinit,\r
1042         .io_fix_leakage_bug = spi_io_fix_leakage_bug,\r
1043         .io_resume_leakage_bug = spi_io_resume_leakage_bug,\r
1044 };\r
1045 \r
1046 /*****************************************************************************************\r
1047  * xpt2046 touch panel\r
1048  * author: cmc@rock-chips.com\r
1049  *****************************************************************************************/\r
1050 #define XPT2046_GPIO_INT           RK29_PIN0_PA3\r
1051 #define DEBOUNCE_REPTIME  3\r
1052 \r
1053 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)\r
1054 static struct xpt2046_platform_data xpt2046_info = {\r
1055         .model                  = 2046,\r
1056         .keep_vref_on   = 1,\r
1057         .swap_xy                = 0,\r
1058         .x_min                  = 0,\r
1059         .x_max                  = 320,\r
1060         .y_min                  = 0,\r
1061         .y_max                  = 480,\r
1062         .debounce_max           = 7,\r
1063         .debounce_rep           = DEBOUNCE_REPTIME,\r
1064         .debounce_tol           = 20,\r
1065         .gpio_pendown           = XPT2046_GPIO_INT,\r
1066         .penirq_recheck_delay_usecs = 1,\r
1067 };\r
1068 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\r
1069 static struct xpt2046_platform_data xpt2046_info = {\r
1070         .model                  = 2046,\r
1071         .keep_vref_on   = 1,\r
1072         .swap_xy                = 0,\r
1073         .x_min                  = 0,\r
1074         .x_max                  = 320,\r
1075         .y_min                  = 0,\r
1076         .y_max                  = 480,\r
1077         .debounce_max           = 7,\r
1078         .debounce_rep           = DEBOUNCE_REPTIME,\r
1079         .debounce_tol           = 20,\r
1080         .gpio_pendown           = XPT2046_GPIO_INT,\r
1081         .penirq_recheck_delay_usecs = 1,\r
1082 };\r
1083 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)\r
1084 static struct xpt2046_platform_data xpt2046_info = {\r
1085         .model                  = 2046,\r
1086         .keep_vref_on   = 1,\r
1087         .swap_xy                = 1,\r
1088         .x_min                  = 0,\r
1089         .x_max                  = 800,\r
1090         .y_min                  = 0,\r
1091         .y_max                  = 480,\r
1092         .debounce_max           = 7,\r
1093         .debounce_rep           = DEBOUNCE_REPTIME,\r
1094         .debounce_tol           = 20,\r
1095         .gpio_pendown           = XPT2046_GPIO_INT,\r
1096 \r
1097         .penirq_recheck_delay_usecs = 1,\r
1098 };\r
1099 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)\r
1100 static struct xpt2046_platform_data xpt2046_info = {\r
1101         .model                  = 2046,\r
1102         .keep_vref_on   = 1,\r
1103         .swap_xy                = 1,\r
1104         .x_min                  = 0,\r
1105         .x_max                  = 800,\r
1106         .y_min                  = 0,\r
1107         .y_max                  = 480,\r
1108         .debounce_max           = 7,\r
1109         .debounce_rep           = DEBOUNCE_REPTIME,\r
1110         .debounce_tol           = 20,\r
1111         .gpio_pendown           = XPT2046_GPIO_INT,\r
1112 \r
1113         .penirq_recheck_delay_usecs = 1,\r
1114 };\r
1115 #endif\r
1116 \r
1117 static struct spi_board_info board_spi_devices[] = {\r
1118 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\\r
1119     ||defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)\r
1120         {\r
1121                 .modalias       = "xpt2046_ts",\r
1122                 .chip_select    = 0,\r
1123                 .max_speed_hz   = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */\r
1124                 .bus_num        = 0,\r
1125                 .irq = XPT2046_GPIO_INT,\r
1126                 .platform_data = &xpt2046_info,\r
1127         },\r
1128 #endif\r
1129 };\r
1130 \r
1131 \r
1132 static void __init rk29_gic_init_irq(void)\r
1133 {\r
1134         gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);\r
1135         gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);\r
1136 }\r
1137 \r
1138 static void __init machine_rk29_init_irq(void)\r
1139 {\r
1140         rk29_gic_init_irq();\r
1141         rk29_gpio_init(rk29_gpiobankinit, MAX_BANK);\r
1142         rk29_gpio_irq_setup();\r
1143 }\r
1144 \r
1145 static void __init machine_rk29_board_init(void)\r
1146 {\r
1147         rk29_board_iomux_init();\r
1148                 platform_add_devices(devices, ARRAY_SIZE(devices));\r
1149 #ifdef CONFIG_I2C0_RK29\r
1150         i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,\r
1151                         ARRAY_SIZE(board_i2c0_devices));\r
1152 #endif\r
1153 #ifdef CONFIG_I2C1_RK29\r
1154         i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,\r
1155                         ARRAY_SIZE(board_i2c1_devices));\r
1156 #endif\r
1157 #ifdef CONFIG_I2C2_RK29\r
1158         i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,\r
1159                         ARRAY_SIZE(board_i2c2_devices));\r
1160 #endif\r
1161 #ifdef CONFIG_I2C3_RK29\r
1162         i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,\r
1163                         ARRAY_SIZE(board_i2c3_devices));\r
1164 #endif\r
1165 \r
1166         spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));\r
1167 }\r
1168 \r
1169 static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,\r
1170                                         char **cmdline, struct meminfo *mi)\r
1171 {\r
1172         mi->nr_banks = 1;\r
1173         mi->bank[0].start = RK29_SDRAM_PHYS;\r
1174         mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);\r
1175         mi->bank[0].size = LINUX_SIZE;\r
1176 }\r
1177 \r
1178 static void __init machine_rk29_mapio(void)\r
1179 {\r
1180         rk29_map_common_io();\r
1181         rk29_clock_init();\r
1182         rk29_iomux_init();\r
1183 }\r
1184 \r
1185 MACHINE_START(RK29, "RK29board")\r
1186         /* UART for LL DEBUG */\r
1187         .phys_io        = RK29_UART1_PHYS,\r
1188         .io_pg_offst    = ((RK29_UART1_BASE) >> 18) & 0xfffc,\r
1189         .boot_params    = RK29_SDRAM_PHYS + 0x88000,\r
1190         .fixup          = machine_rk29_fixup,\r
1191         .map_io         = machine_rk29_mapio,\r
1192         .init_irq       = machine_rk29_init_irq,\r
1193         .init_machine   = machine_rk29_board_init,\r
1194         .timer          = &rk29_timer,\r
1195 MACHINE_END\r