1 /* arch/arm/mach-rk29/board-rk29.c
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3 * Copyright (C) 2010 ROCKCHIP, Inc.
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5 * This software is licensed under the terms of the GNU General Public
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6 * License version 2, as published by the Free Software Foundation, and
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7 * may be copied, distributed, and modified under those terms.
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9 * This program is distributed in the hope that it will be useful,
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10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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12 * GNU General Public License for more details.
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16 #include <linux/kernel.h>
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17 #include <linux/init.h>
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18 #include <linux/platform_device.h>
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19 #include <linux/input.h>
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20 #include <linux/io.h>
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21 #include <linux/delay.h>
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22 #include <linux/i2c.h>
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23 #include <linux/spi/spi.h>
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24 #include <linux/mmc/host.h>
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25 #include <linux/android_pmem.h>
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27 #include <mach/hardware.h>
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28 #include <asm/setup.h>
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29 #include <asm/mach-types.h>
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30 #include <asm/mach/arch.h>
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31 #include <asm/mach/map.h>
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32 #include <asm/mach/flash.h>
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33 #include <asm/hardware/gic.h>
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35 #include <mach/iomux.h>
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36 #include <mach/gpio.h>
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37 #include <mach/irqs.h>
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38 #include <mach/rk29_iomap.h>
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39 #include <mach/board.h>
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40 #include <mach/rk29_nand.h>
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41 #include <mach/rk29_camera.h> /* ddl@rock-chips.com : camera support */
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42 #include <media/soc_camera.h> /* ddl@rock-chips.com : camera support */
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43 #include <mach/vpu_mem.h>
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46 #include <linux/mtd/nand.h>
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47 #include <linux/mtd/partitions.h>
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49 #include "devices.h"
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50 #include "../../../drivers/input/touchscreen/xpt2046_cbn_ts.h"
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53 /* Set memory size of pmem */
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54 #define SDRAM_SIZE SZ_128M
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55 #define PMEM_GPU_SIZE (12 * SZ_1M)
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56 #define PMEM_UI_SIZE SZ_16M
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57 #define PMEM_VPU_SIZE SZ_32M
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59 #define PMEM_GPU_BASE (RK29_SDRAM_PHYS + SDRAM_SIZE - PMEM_GPU_SIZE)
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60 #define PMEM_UI_BASE (PMEM_GPU_BASE - PMEM_UI_SIZE)
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61 #define PMEM_VPU_BASE (PMEM_UI_BASE - PMEM_VPU_SIZE)
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62 #define LINUX_SIZE (PMEM_VPU_BASE - RK29_SDRAM_PHYS)
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64 extern struct sys_timer rk29_timer;
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66 int rk29_nand_io_init(void)
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71 struct rk29_nand_platform_data rk29_nand_data = {
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72 .width = 1, /* data bus width in bytes */
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73 .hw_ecc = 1, /* hw ecc 0: soft ecc */
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75 .io_init = rk29_nand_io_init,
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78 static struct rk29_gpio_bank rk29_gpiobankinit[] = {
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80 .id = RK29_ID_GPIO0,
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81 .offset = RK29_GPIO0_BASE,
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84 .id = RK29_ID_GPIO1,
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85 .offset = RK29_GPIO1_BASE,
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88 .id = RK29_ID_GPIO2,
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89 .offset = RK29_GPIO2_BASE,
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92 .id = RK29_ID_GPIO3,
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93 .offset = RK29_GPIO3_BASE,
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96 .id = RK29_ID_GPIO4,
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97 .offset = RK29_GPIO4_BASE,
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100 .id = RK29_ID_GPIO5,
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101 .offset = RK29_GPIO5_BASE,
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104 .id = RK29_ID_GPIO6,
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105 .offset = RK29_GPIO6_BASE,
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109 /*****************************************************************************************
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111 * author: zyw@rock-chips.com
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112 *****************************************************************************************/
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113 //#ifdef CONFIG_LCD_TD043MGEA1
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114 #define LCD_TXD_PIN RK29_PIN0_PA6 // ÂÒÌî,µÃÐÞ¸Ä
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115 #define LCD_CLK_PIN RK29_PIN0_PA7 // ÂÒÌî,µÃÐÞ¸Ä
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116 #define LCD_CS_PIN RK29_PIN0_PB6 // ÂÒÌî,µÃÐÞ¸Ä
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117 #define LCD_TXD_MUX_NAME GPIOE_U1IR_I2C1_NAME
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118 #define LCD_CLK_MUX_NAME NULL
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119 #define LCD_CS_MUX_NAME GPIOH6_IQ_SEL_NAME
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120 #define LCD_TXD_MUX_MODE 0
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121 #define LCD_CLK_MUX_MODE 0
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122 #define LCD_CS_MUX_MODE 0
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124 static int rk29_lcd_io_init(void)
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129 rk29_mux_api_set(LCD_CS_MUX_NAME, LCD_CS_MUX_MODE);
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130 if (LCD_CS_PIN != INVALID_GPIO) {
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131 ret = gpio_request(LCD_CS_PIN, NULL);
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135 printk(">>>>>> lcd cs gpio_request err \n ");
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139 rk29_mux_api_set(LCD_CLK_MUX_NAME, LCD_CLK_MUX_MODE);
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140 if (LCD_CLK_PIN != INVALID_GPIO) {
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141 ret = gpio_request(LCD_CLK_PIN, NULL);
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145 printk(">>>>>> lcd clk gpio_request err \n ");
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149 rk29_mux_api_set(LCD_TXD_MUX_NAME, LCD_TXD_MUX_MODE);
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150 if (LCD_TXD_PIN != INVALID_GPIO) {
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151 ret = gpio_request(LCD_TXD_PIN, NULL);
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155 printk(">>>>>> lcd txd gpio_request err \n ");
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162 if (LCD_CLK_PIN != INVALID_GPIO) {
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163 gpio_free(LCD_CLK_PIN);
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166 if (LCD_CS_PIN != INVALID_GPIO) {
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167 gpio_free(LCD_CS_PIN);
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174 static int rk29_lcd_io_deinit(void)
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178 gpio_direction_output(LCD_CLK_PIN, 0);
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179 gpio_set_value(LCD_CLK_PIN, GPIO_HIGH);
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180 gpio_direction_output(LCD_TXD_PIN, 0);
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181 gpio_set_value(LCD_TXD_PIN, GPIO_HIGH);
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183 gpio_free(LCD_CS_PIN);
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184 rk29_mux_api_mode_resume(LCD_CS_MUX_NAME);
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185 gpio_free(LCD_CLK_PIN);
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186 gpio_free(LCD_TXD_PIN);
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187 rk29_mux_api_mode_resume(LCD_TXD_MUX_NAME);
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188 rk29_mux_api_mode_resume(LCD_CLK_MUX_NAME);
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193 struct rk29lcd_info rk29_lcd_info = {
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194 //.txd_pin = LCD_TXD_PIN,
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195 //.clk_pin = LCD_CLK_PIN,
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196 //.cs_pin = LCD_CS_PIN,
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197 .io_init = rk29_lcd_io_init,
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198 .io_deinit = rk29_lcd_io_deinit,
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202 /*****************************************************************************************
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203 * frame buffe devices
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204 * author: zyw@rock-chips.com
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205 *****************************************************************************************/
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208 #define FB_DISPLAY_ON_PIN RK29_PIN0_PB1 // ÂÒÌî,µÃÐÞ¸Ä
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209 #define FB_LCD_STANDBY_PIN INVALID_GPIO
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210 #define FB_MCU_FMK_PIN INVALID_GPIO
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213 #define FB_DISPLAY_ON_VALUE GPIO_LOW
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214 #define FB_LCD_STANDBY_VALUE 0
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216 #define FB_DISPLAY_ON_MUX_NAME GPIOB1_SMCS1_MMC0PCA_NAME
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217 #define FB_DISPLAY_ON_MUX_MODE IOMUXA_GPIO0_B1
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219 #define FB_LCD_STANDBY_MUX_NAME NULL
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220 #define FB_LCD_STANDBY_MUX_MODE 1
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222 #define FB_MCU_FMK_PIN_MUX_NAME NULL
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223 #define FB_MCU_FMK_MUX_MODE 0
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225 #define FB_DATA0_16_MUX_NAME GPIOC_LCDC16BIT_SEL_NAME
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226 #define FB_DATA0_16_MUX_MODE 1
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228 #define FB_DATA17_18_MUX_NAME GPIOC_LCDC18BIT_SEL_NAME
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229 #define FB_DATA17_18_MUX_MODE 1
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231 #define FB_DATA19_24_MUX_NAME GPIOC_LCDC24BIT_SEL_NAME
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232 #define FB_DATA19_24_MUX_MODE 1
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234 #define FB_DEN_MUX_NAME CXGPIO_LCDDEN_SEL_NAME
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235 #define FB_DEN_MUX_MODE 1
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237 #define FB_VSYNC_MUX_NAME CXGPIO_LCDVSYNC_SEL_NAME
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238 #define FB_VSYNC_MUX_MODE 1
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240 #define FB_MCU_FMK_MUX_NAME NULL
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241 #define FB_MCU_FMK_MUX_MODE 0
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243 static int rk29_fb_io_init(struct rk29_fb_setting_info *fb_setting)
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247 if(fb_setting->data_num <=16)
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248 rk29_mux_api_set(FB_DATA0_16_MUX_NAME, FB_DATA0_16_MUX_MODE);
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249 if(fb_setting->data_num >16 && fb_setting->data_num<=18)
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250 rk29_mux_api_set(FB_DATA17_18_MUX_NAME, FB_DATA17_18_MUX_MODE);
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251 if(fb_setting->data_num >18)
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252 rk29_mux_api_set(FB_DATA19_24_MUX_NAME, FB_DATA19_24_MUX_MODE);
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254 if(fb_setting->vsync_en)
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255 rk29_mux_api_set(FB_VSYNC_MUX_NAME, FB_VSYNC_MUX_MODE);
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257 if(fb_setting->den_en)
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258 rk29_mux_api_set(FB_DEN_MUX_NAME, FB_DEN_MUX_MODE);
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260 if(fb_setting->mcu_fmk_en && FB_MCU_FMK_MUX_NAME && (FB_MCU_FMK_PIN != INVALID_GPIO))
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262 rk29_mux_api_set(FB_MCU_FMK_MUX_NAME, FB_MCU_FMK_MUX_MODE);
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263 ret = gpio_request(FB_MCU_FMK_PIN, NULL);
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266 gpio_free(FB_MCU_FMK_PIN);
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267 printk(">>>>>> FB_MCU_FMK_PIN gpio_request err \n ");
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269 gpio_direction_input(FB_MCU_FMK_PIN);
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272 if(fb_setting->disp_on_en && FB_DISPLAY_ON_MUX_NAME && (FB_DISPLAY_ON_PIN != INVALID_GPIO))
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274 rk29_mux_api_set(FB_DISPLAY_ON_MUX_NAME, FB_DISPLAY_ON_MUX_MODE);
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275 ret = gpio_request(FB_DISPLAY_ON_PIN, NULL);
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278 gpio_free(FB_DISPLAY_ON_PIN);
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279 printk(">>>>>> FB_DISPLAY_ON_PIN gpio_request err \n ");
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283 if(fb_setting->disp_on_en && FB_LCD_STANDBY_MUX_NAME && (FB_LCD_STANDBY_PIN != INVALID_GPIO))
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285 rk29_mux_api_set(FB_LCD_STANDBY_MUX_NAME, FB_LCD_STANDBY_MUX_MODE);
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286 ret = gpio_request(FB_LCD_STANDBY_PIN, NULL);
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289 gpio_free(FB_LCD_STANDBY_PIN);
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290 printk(">>>>>> FB_LCD_STANDBY_PIN gpio_request err \n ");
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297 struct rk29fb_info rk29_fb_info = {
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299 //.disp_on_pin = FB_DISPLAY_ON_PIN,
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300 //.disp_on_value = FB_DISPLAY_ON_VALUE,
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301 //.standby_pin = FB_LCD_STANDBY_PIN,
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302 //.standby_value = FB_LCD_STANDBY_VALUE,
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303 //.mcu_fmk_pin = FB_MCU_FMK_PIN,
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304 .lcd_info = &rk29_lcd_info,
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305 .io_init = rk29_fb_io_init,
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308 static struct android_pmem_platform_data android_pmem_pdata = {
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310 .start = PMEM_UI_BASE,
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311 .size = PMEM_UI_SIZE,
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316 static struct platform_device android_pmem_device = {
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317 .name = "android_pmem",
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320 .platform_data = &android_pmem_pdata,
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325 static struct vpu_mem_platform_data vpu_mem_pdata = {
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327 .start = PMEM_VPU_BASE,
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328 .size = PMEM_VPU_SIZE,
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332 static struct platform_device rk29_vpu_mem_device = {
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336 .platform_data = &vpu_mem_pdata,
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340 /*****************************************************************************************
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342 * author: kfx@rock-chips.com
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343 *****************************************************************************************/
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344 static int rk29_i2c0_io_init(void)
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346 rk29_mux_api_set(GPIO2B7_I2C0SCL_NAME, GPIO2L_I2C0_SCL);
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347 rk29_mux_api_set(GPIO2B6_I2C0SDA_NAME, GPIO2L_I2C0_SDA);
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351 static int rk29_i2c1_io_init(void)
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353 rk29_mux_api_set(GPIO1A7_I2C1SCL_NAME, GPIO1L_I2C1_SCL);
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354 rk29_mux_api_set(GPIO1A6_I2C1SDA_NAME, GPIO1L_I2C1_SDA);
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357 static int rk29_i2c2_io_init(void)
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359 rk29_mux_api_set(GPIO5D4_I2C2SCL_NAME, GPIO5H_I2C2_SCL);
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360 rk29_mux_api_set(GPIO5D3_I2C2SDA_NAME, GPIO5H_I2C2_SDA);
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364 static int rk29_i2c3_io_init(void)
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366 rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_I2C3_SCL);
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367 rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_I2C3_SDA);
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371 struct rk29_i2c_platform_data default_i2c0_data = {
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374 .slave_addr = 0xff,
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375 .scl_rate = 400*1000,
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376 .mode = I2C_MODE_IRQ,
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377 .io_init = rk29_i2c0_io_init,
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380 struct rk29_i2c_platform_data default_i2c1_data = {
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383 .slave_addr = 0xff,
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384 .scl_rate = 400*1000,
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385 .mode = I2C_MODE_POLL,
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386 .io_init = rk29_i2c1_io_init,
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389 struct rk29_i2c_platform_data default_i2c2_data = {
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392 .slave_addr = 0xff,
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393 .scl_rate = 400*1000,
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394 .mode = I2C_MODE_IRQ,
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395 .io_init = rk29_i2c2_io_init,
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398 struct rk29_i2c_platform_data default_i2c3_data = {
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401 .slave_addr = 0xff,
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402 .scl_rate = 400*1000,
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403 .mode = I2C_MODE_POLL,
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404 .io_init = rk29_i2c3_io_init,
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407 #ifdef CONFIG_I2C0_RK29
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408 static struct i2c_board_info __initdata board_i2c0_devices[] = {
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409 #if defined (CONFIG_RK1000_CONTROL)
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411 .type = "rk1000_control",
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416 #if defined (CONFIG_SND_SOC_RK1000)
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418 .type = "rk1000_i2c_codec",
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423 #if defined (CONFIG_BATTERY_STC3100)
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425 .type = "stc3100-battery",
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430 #if defined (CONFIG_BATTERY_BQ27510)
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432 .type = "bq27510-battery",
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440 #ifdef CONFIG_I2C1_RK29
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441 static struct i2c_board_info __initdata board_i2c1_devices[] = {
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442 #if defined (CONFIG_RK1000_CONTROL1)
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444 .type = "rk1000_control",
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449 #if defined (CONFIG_SENSORS_AK8973)
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454 .irq = RK29_PIN4_PA1,
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457 #if defined (CONFIG_SENSORS_AK8975)
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462 .irq = RK29_PIN4_PA1,
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468 #ifdef CONFIG_I2C2_RK29
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469 static struct i2c_board_info __initdata board_i2c2_devices[] = {
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473 #ifdef CONFIG_I2C3_RK29
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474 static struct i2c_board_info __initdata board_i2c3_devices[] = {
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478 /*****************************************************************************************
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480 * author: ddl@rock-chips.com
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481 *****************************************************************************************/
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482 #ifdef CONFIG_VIDEO_RK29
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483 #define SENSOR_NAME_0 RK29_CAM_SENSOR_NAME_OV2655 /* back camera sensor */
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484 #define SENSOR_IIC_ADDR_0 0x60
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485 #define SENSOR_IIC_ADAPTER_ID_0 1
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486 #define SENSOR_POWER_PIN_0 INVALID_GPIO
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487 #define SENSOR_RESET_PIN_0 RK29_PIN0_PA2
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488 #define SENSOR_POWERACTIVE_LEVEL_0 RK29_CAM_POWERACTIVE_L
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489 #define SENSOR_RESETACTIVE_LEVEL_0 RK29_CAM_RESETACTIVE_L
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492 #define SENSOR_NAME_1 RK29_CAM_SENSOR_NAME_OV2659 /* front camera sensor */
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493 #define SENSOR_IIC_ADDR_1 0x60
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494 #define SENSOR_IIC_ADAPTER_ID_1 1
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495 #define SENSOR_POWER_PIN_1 INVALID_GPIO
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496 #define SENSOR_RESET_PIN_1 INVALID_GPIO
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497 #define SENSOR_POWERACTIVE_LEVEL_1 RK29_CAM_POWERACTIVE_L
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498 #define SENSOR_RESETACTIVE_LEVEL_1 RK29_CAM_RESETACTIVE_L
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500 static int rk29_sensor_io_init(void);
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501 static int rk29_sensor_io_deinit(void);
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503 struct rk29camera_platform_data rk29_camera_platform_data = {
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504 .io_init = rk29_sensor_io_init,
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505 .io_deinit = rk29_sensor_io_deinit,
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508 .gpio_reset = SENSOR_RESET_PIN_0,
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509 .gpio_power = SENSOR_POWER_PIN_0,
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510 .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_0|SENSOR_RESETACTIVE_LEVEL_0),
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511 .dev_name = SENSOR_NAME_0,
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513 .gpio_reset = SENSOR_RESET_PIN_1,
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514 .gpio_power = SENSOR_POWER_PIN_1,
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515 .gpio_flag = (SENSOR_POWERACTIVE_LEVEL_1|SENSOR_RESETACTIVE_LEVEL_1),
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516 .dev_name = SENSOR_NAME_1,
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521 static int rk29_sensor_io_init(void)
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524 unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
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525 unsigned int camera_ioflag;
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527 for (i=0; i<2; i++) {
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528 camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;
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529 camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;
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530 camera_ioflag = rk29_camera_platform_data.gpio_res[i].gpio_flag;
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532 if (camera_power != INVALID_GPIO) {
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533 ret = gpio_request(camera_power, "camera power");
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537 gpio_set_value(camera_reset, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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538 gpio_direction_output(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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540 //printk("\n%s....%d %x \n",__FUNCTION__,__LINE__,(((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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544 if (camera_reset != INVALID_GPIO) {
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545 ret = gpio_request(camera_reset, "camera reset");
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547 if (camera_power != INVALID_GPIO)
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548 gpio_free(camera_power);
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553 gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
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554 gpio_direction_output(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
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556 //printk("\n%s....%d %x \n",__FUNCTION__,__LINE__,((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
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564 static int rk29_sensor_io_deinit(void)
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567 unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
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569 //printk("\n%s....%d ******** ddl *********\n",__FUNCTION__,__LINE__);
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571 for (i=0; i<2; i++) {
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572 camera_reset = rk29_camera_platform_data.gpio_res[i].gpio_reset;
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573 camera_power = rk29_camera_platform_data.gpio_res[i].gpio_power;
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575 if (camera_power != INVALID_GPIO){
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576 gpio_direction_input(camera_power);
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577 gpio_free(camera_power);
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580 if (camera_reset != INVALID_GPIO) {
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581 gpio_direction_input(camera_reset);
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582 gpio_free(camera_reset);
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590 static int rk29_sensor_power(struct device *dev, int on)
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592 unsigned int camera_reset = INVALID_GPIO, camera_power = INVALID_GPIO;
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593 unsigned int camera_ioflag;
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595 if(rk29_camera_platform_data.gpio_res[0].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[0].dev_name, dev_name(dev)) == 0)) {
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596 camera_reset = rk29_camera_platform_data.gpio_res[0].gpio_reset;
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597 camera_power = rk29_camera_platform_data.gpio_res[0].gpio_power;
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598 camera_ioflag = rk29_camera_platform_data.gpio_res[0].gpio_flag;
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599 } else if (rk29_camera_platform_data.gpio_res[1].dev_name && (strcmp(rk29_camera_platform_data.gpio_res[1].dev_name, dev_name(dev)) == 0)) {
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600 camera_reset = rk29_camera_platform_data.gpio_res[1].gpio_reset;
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601 camera_power = rk29_camera_platform_data.gpio_res[1].gpio_power;
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602 camera_ioflag = rk29_camera_platform_data.gpio_res[1].gpio_flag;
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605 if (camera_reset != INVALID_GPIO) {
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606 gpio_set_value(camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
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607 //printk("\n%s..%s..ResetPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev),camera_reset, ((camera_ioflag&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
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609 if (camera_power != INVALID_GPIO) {
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611 gpio_set_value(camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
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612 //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, ((camera_ioflag&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
\r
614 gpio_set_value(camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
\r
615 //printk("\n%s..%s..PowerPin=%d ..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_power, (((~camera_ioflag)&RK29_CAM_POWERACTIVE_MASK)>>RK29_CAM_POWERACTIVE_BITPOS));
\r
619 if (camera_reset != INVALID_GPIO) {
\r
621 msleep(3); /* delay 3 ms */
\r
622 gpio_set_value(camera_reset,(((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
\r
623 //printk("\n%s..%s..ResetPin= %d..PinLevel = %x \n",__FUNCTION__,dev_name(dev), camera_reset, (((~camera_ioflag)&RK29_CAM_RESETACTIVE_MASK)>>RK29_CAM_RESETACTIVE_BITPOS));
\r
629 static struct i2c_board_info rk29_i2c_cam_info_0[] = {
\r
631 I2C_BOARD_INFO(SENSOR_NAME_0, SENSOR_IIC_ADDR_0>>1)
\r
635 struct soc_camera_link rk29_iclink_0 = {
\r
636 .bus_id = RK29_CAM_PLATFORM_DEV_ID,
\r
637 .power = rk29_sensor_power,
\r
638 .board_info = &rk29_i2c_cam_info_0[0],
\r
639 .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_0,
\r
640 .module_name = SENSOR_NAME_0,
\r
643 /*platform_device : soc-camera need */
\r
644 struct platform_device rk29_soc_camera_pdrv_0 = {
\r
645 .name = "soc-camera-pdrv",
\r
648 .init_name = SENSOR_NAME_0,
\r
649 .platform_data = &rk29_iclink_0,
\r
653 static struct i2c_board_info rk29_i2c_cam_info_1[] = {
\r
655 I2C_BOARD_INFO(SENSOR_NAME_1, SENSOR_IIC_ADDR_1>>1)
\r
659 struct soc_camera_link rk29_iclink_1 = {
\r
660 .bus_id = RK29_CAM_PLATFORM_DEV_ID,
\r
661 .power = rk29_sensor_power,
\r
662 .board_info = &rk29_i2c_cam_info_1[0],
\r
663 .i2c_adapter_id = SENSOR_IIC_ADAPTER_ID_1,
\r
664 .module_name = SENSOR_NAME_1,
\r
667 /*platform_device : soc-camera need */
\r
668 struct platform_device rk29_soc_camera_pdrv_1 = {
\r
669 .name = "soc-camera-pdrv",
\r
672 .init_name = SENSOR_NAME_1,
\r
673 .platform_data = &rk29_iclink_1,
\r
678 extern struct platform_device rk29_device_camera;
\r
680 /*****************************************************************************************
\r
681 * backlight devices
\r
682 * author: nzy@rock-chips.com
\r
683 *****************************************************************************************/
\r
684 #ifdef CONFIG_BACKLIGHT_RK29_BL
\r
686 GPIO1B5_PWM0_NAME, GPIO1L_PWM0
\r
687 GPIO5D2_PWM1_UART1SIRIN_NAME, GPIO5H_PWM1
\r
688 GPIO2A3_SDMMC0WRITEPRT_PWM2_NAME, GPIO2L_PWM2
\r
689 GPIO1A5_EMMCPWREN_PWM3_NAME, GPIO1L_PWM3
\r
693 #define PWM_MUX_NAME GPIO1B5_PWM0_NAME
\r
694 #define PWM_MUX_MODE GPIO1L_PWM0
\r
695 #define PWM_MUX_MODE_GPIO GPIO1L_GPIO1B5
\r
696 #define PWM_EFFECT_VALUE 0
\r
698 //#define LCD_DISP_ON_PIN
\r
700 #ifdef LCD_DISP_ON_PIN
\r
701 #define BL_EN_MUX_NAME GPIOF34_UART3_SEL_NAME
\r
702 #define BL_EN_MUX_MODE IOMUXB_GPIO1_B34
\r
704 #define BL_EN_PIN GPIO0L_GPIO0A5
\r
705 #define BL_EN_VALUE GPIO_HIGH
\r
707 static int rk29_backlight_io_init(void)
\r
711 rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE);
\r
712 #ifdef LCD_DISP_ON_PIN
\r
713 rk29_mux_api_set(BL_EN_MUX_NAME, BL_EN_MUX_MODE);
\r
715 ret = gpio_request(BL_EN_PIN, NULL);
\r
718 gpio_free(BL_EN_PIN);
\r
721 gpio_direction_output(BL_EN_PIN, 0);
\r
722 gpio_set_value(BL_EN_PIN, BL_EN_VALUE);
\r
727 static int rk29_backlight_io_deinit(void)
\r
730 #ifdef LCD_DISP_ON_PIN
\r
731 gpio_free(BL_EN_PIN);
\r
733 rk29_mux_api_set(PWM_MUX_NAME, PWM_MUX_MODE_GPIO);
\r
736 struct rk29_bl_info rk29_bl_info = {
\r
738 .bl_ref = PWM_EFFECT_VALUE,
\r
739 .io_init = rk29_backlight_io_init,
\r
740 .io_deinit = rk29_backlight_io_deinit,
\r
743 /*****************************************************************************************
\r
745 *****************************************************************************************/
\r
746 #ifdef CONFIG_SDMMC0_RK29
\r
747 static int rk29_sdmmc0_cfg_gpio(void)
\r
749 rk29_mux_api_set(GPIO1D1_SDMMC0CMD_NAME, GPIO1H_SDMMC0_CMD);
\r
750 rk29_mux_api_set(GPIO1D0_SDMMC0CLKOUT_NAME, GPIO1H_SDMMC0_CLKOUT);
\r
751 rk29_mux_api_set(GPIO1D2_SDMMC0DATA0_NAME, GPIO1H_SDMMC0_DATA0);
\r
752 rk29_mux_api_set(GPIO1D3_SDMMC0DATA1_NAME, GPIO1H_SDMMC0_DATA1);
\r
753 rk29_mux_api_set(GPIO1D4_SDMMC0DATA2_NAME, GPIO1H_SDMMC0_DATA2);
\r
754 rk29_mux_api_set(GPIO1D5_SDMMC0DATA3_NAME, GPIO1H_SDMMC0_DATA3);
\r
755 rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
\r
759 #define CONFIG_SDMMC0_USE_DMA
\r
760 struct rk29_sdmmc_platform_data default_sdmmc0_data = {
\r
761 .host_ocr_avail = (MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
\r
762 MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
\r
763 MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
\r
764 .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
\r
765 .io_init = rk29_sdmmc0_cfg_gpio,
\r
766 .dma_name = "sd_mmc",
\r
767 #ifdef CONFIG_SDMMC0_USE_DMA
\r
774 #ifdef CONFIG_SDMMC1_RK29
\r
775 //#define CONFIG_SDMMC1_USE_DMA
\r
776 static int rk29_sdmmc1_cfg_gpio(void)
\r
778 rk29_mux_api_set(GPIO1C2_SDMMC1CMD_NAME, GPIO1H_SDMMC1_CMD);
\r
779 rk29_mux_api_set(GPIO1C7_SDMMC1CLKOUT_NAME, GPIO1H_SDMMC1_CLKOUT);
\r
780 rk29_mux_api_set(GPIO1C3_SDMMC1DATA0_NAME, GPIO1H_SDMMC1_DATA0);
\r
781 rk29_mux_api_set(GPIO1C4_SDMMC1DATA1_NAME, GPIO1H_SDMMC1_DATA1);
\r
782 rk29_mux_api_set(GPIO1C5_SDMMC1DATA2_NAME, GPIO1H_SDMMC1_DATA2);
\r
783 rk29_mux_api_set(GPIO1C6_SDMMC1DATA3_NAME, GPIO1H_SDMMC1_DATA3);
\r
784 rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_SDMMC1_DETECT_N);
\r
788 struct rk29_sdmmc_platform_data default_sdmmc1_data = {
\r
789 .host_ocr_avail = (MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
\r
790 MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
\r
791 MMC_VDD_32_33|MMC_VDD_33_34),
\r
792 .host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
\r
793 MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
\r
794 .io_init = rk29_sdmmc1_cfg_gpio,
\r
795 .dma_name = "sdio",
\r
796 #ifdef CONFIG_SDMMC1_USE_DMA
\r
804 #ifdef CONFIG_VIVANTE
\r
805 static struct resource resources_gpu[] = {
\r
810 .flags = IORESOURCE_IRQ,
\r
813 .name = "gpu_base",
\r
814 .start = RK29_GPU_PHYS,
\r
815 .end = RK29_GPU_PHYS + (256 << 10),
\r
816 .flags = IORESOURCE_MEM,
\r
820 .start = PMEM_GPU_BASE,
\r
821 .end = PMEM_GPU_BASE + PMEM_GPU_SIZE,
\r
822 .flags = IORESOURCE_MEM,
\r
825 struct platform_device rk29_device_gpu = {
\r
828 .num_resources = ARRAY_SIZE(resources_gpu),
\r
829 .resource = resources_gpu,
\r
832 #ifdef CONFIG_KEYS_RK29
\r
833 extern struct rk29_keys_platform_data rk29_keys_pdata;
\r
834 static struct platform_device rk29_device_keys = {
\r
835 .name = "rk29-keys",
\r
838 .platform_data = &rk29_keys_pdata,
\r
843 static void __init rk29_board_iomux_init(void)
\r
845 #ifdef CONFIG_UART0_RK29
\r
846 rk29_mux_api_set(GPIO1B7_UART0SOUT_NAME, GPIO1L_UART0_SOUT);
\r
847 rk29_mux_api_set(GPIO1B6_UART0SIN_NAME, GPIO1L_UART0_SIN);
\r
848 #ifdef CONFIG_UART0_CTS_RTS_RK29
\r
849 rk29_mux_api_set(GPIO1C1_UART0RTSN_SDMMC1WRITEPRT_NAME, GPIO1H_UART0_RTS_N);
\r
850 rk29_mux_api_set(GPIO1C0_UART0CTSN_SDMMC1DETECTN_NAME, GPIO1H_UART0_CTS_N);
\r
853 #ifdef CONFIG_UART1_RK29
\r
854 rk29_mux_api_set(GPIO2A5_UART1SOUT_NAME, GPIO2L_UART1_SOUT);
\r
855 rk29_mux_api_set(GPIO2A4_UART1SIN_NAME, GPIO2L_UART1_SIN);
\r
857 #ifdef CONFIG_UART2_RK29
\r
858 rk29_mux_api_set(GPIO2B1_UART2SOUT_NAME, GPIO2L_UART2_SOUT);
\r
859 rk29_mux_api_set(GPIO2B0_UART2SIN_NAME, GPIO2L_UART2_SIN);
\r
860 #ifdef CONFIG_UART2_CTS_RTS_RK29
\r
861 rk29_mux_api_set(GPIO2A7_UART2RTSN_NAME, GPIO2L_UART2_RTS_N);
\r
862 rk29_mux_api_set(GPIO2A6_UART2CTSN_NAME, GPIO2L_UART2_CTS_N);
\r
865 #ifdef CONFIG_UART3_RK29
\r
866 rk29_mux_api_set(GPIO2B3_UART3SOUT_NAME, GPIO2L_UART3_SOUT);
\r
867 rk29_mux_api_set(GPIO2B2_UART3SIN_NAME, GPIO2L_UART3_SIN);
\r
868 #ifdef CONFIG_UART3_CTS_RTS_RK29
\r
869 rk29_mux_api_set(GPIO2B5_UART3RTSN_I2C3SCL_NAME, GPIO2L_UART3_RTS_N);
\r
870 rk29_mux_api_set(GPIO2B4_UART3CTSN_I2C3SDA_NAME, GPIO2L_UART3_CTS_N);
\r
875 static struct platform_device *devices[] __initdata = {
\r
876 #ifdef CONFIG_UART1_RK29
\r
877 &rk29_device_uart1,
\r
879 #ifdef CONFIG_SPIM0_RK29
\r
880 &rk29xx_device_spi0m,
\r
882 #ifdef CONFIG_SPIM1_RK29
\r
883 &rk29xx_device_spi1m,
\r
885 #ifdef CONFIG_ADC_RK29
\r
888 #ifdef CONFIG_I2C0_RK29
\r
891 #ifdef CONFIG_I2C1_RK29
\r
894 #ifdef CONFIG_I2C2_RK29
\r
897 #ifdef CONFIG_I2C3_RK29
\r
901 #ifdef CONFIG_SND_RK29_SOC_I2S_2CH
\r
902 &rk29_device_iis_2ch,
\r
904 #ifdef CONFIG_SND_RK29_SOC_I2S_8CH
\r
905 &rk29_device_iis_8ch,
\r
908 #ifdef CONFIG_KEYS_RK29
\r
911 #ifdef CONFIG_SDMMC0_RK29
\r
912 &rk29_device_sdmmc0,
\r
914 #ifdef CONFIG_SDMMC1_RK29
\r
915 &rk29_device_sdmmc1,
\r
917 #ifdef CONFIG_MTD_NAND_RK29
\r
921 #ifdef CONFIG_FB_RK29
\r
924 #ifdef CONFIG_BACKLIGHT_RK29_BL
\r
925 &rk29_device_backlight,
\r
927 #ifdef CONFIG_VIVANTE
\r
930 #ifdef CONFIG_VIDEO_RK29
\r
931 &rk29_device_camera, /* ddl@rock-chips.com : camera support */
\r
932 &rk29_soc_camera_pdrv_0,
\r
933 &rk29_soc_camera_pdrv_1,
\r
935 &android_pmem_device,
\r
936 &rk29_vpu_mem_device,
\r
939 /*****************************************************************************************
\r
941 * author: cmc@rock-chips.com
\r
942 *****************************************************************************************/
\r
943 #define SPI_CHIPSELECT_NUM 2
\r
944 struct spi_cs_gpio rk29xx_spi0_cs_gpios[SPI_CHIPSELECT_NUM] = {
\r
946 .name = "spi0 cs0",
\r
947 .cs_gpio = RK29_PIN2_PC1,
\r
948 .cs_iomux_name = NULL,
\r
951 .name = "spi0 cs1",
\r
952 .cs_gpio = RK29_PIN1_PA4,
\r
953 .cs_iomux_name = GPIO1A4_EMMCWRITEPRT_SPI0CS1_NAME,//if no iomux,set it NULL
\r
954 .cs_iomux_mode = GPIO1L_SPI0_CSN1,
\r
958 struct spi_cs_gpio rk29xx_spi1_cs_gpios[SPI_CHIPSELECT_NUM] = {
\r
960 .name = "spi1 cs0",
\r
961 .cs_gpio = RK29_PIN2_PC5,
\r
962 .cs_iomux_name = NULL,
\r
965 .name = "spi1 cs1",
\r
966 .cs_gpio = RK29_PIN1_PA3,
\r
967 .cs_iomux_name = GPIO1A3_EMMCDETECTN_SPI1CS1_NAME,//if no iomux,set it NULL
\r
968 .cs_iomux_mode = GPIO1L_SPI0_CSN1,
\r
972 static int spi_io_init(struct spi_cs_gpio *cs_gpios, int cs_num)
\r
979 for (i=0; i<cs_num; i++) {
\r
980 rk29_mux_api_set(cs_gpios[i].cs_iomux_name, cs_gpios[i].cs_iomux_mode);
\r
981 ret = gpio_request(cs_gpios[i].cs_gpio, cs_gpios[i].name);
\r
983 for (j=0;j<i;j++) {
\r
984 gpio_free(cs_gpios[j].cs_gpio);
\r
985 //rk29_mux_api_mode_resume(cs_gpios[j].cs_iomux_name);
\r
987 printk("[fun:%s, line:%d], gpio request err\n", __func__, __LINE__);
\r
990 gpio_direction_output(cs_gpios[i].cs_gpio, GPIO_HIGH);
\r
997 static int spi_io_deinit(struct spi_cs_gpio *cs_gpios, int cs_num)
\r
1003 for (i=0; i<cs_num; i++) {
\r
1004 gpio_free(cs_gpios[i].cs_gpio);
\r
1005 //rk29_mux_api_mode_resume(cs_gpios[i].cs_iomux_name);
\r
1012 static int spi_io_fix_leakage_bug(void)
\r
1015 gpio_direction_output(RK29_PIN2_PC1, GPIO_LOW);
\r
1020 static int spi_io_resume_leakage_bug(void)
\r
1023 gpio_direction_output(RK29_PIN2_PC1, GPIO_HIGH);
\r
1028 struct rk29xx_spi_platform_data rk29xx_spi0_platdata = {
\r
1029 .num_chipselect = SPI_CHIPSELECT_NUM,
\r
1030 .chipselect_gpios = rk29xx_spi0_cs_gpios,
\r
1031 .io_init = spi_io_init,
\r
1032 .io_deinit = spi_io_deinit,
\r
1033 .io_fix_leakage_bug = spi_io_fix_leakage_bug,
\r
1034 .io_resume_leakage_bug = spi_io_resume_leakage_bug,
\r
1037 struct rk29xx_spi_platform_data rk29xx_spi1_platdata = {
\r
1038 .num_chipselect = SPI_CHIPSELECT_NUM,
\r
1039 .chipselect_gpios = rk29xx_spi1_cs_gpios,
\r
1040 .io_init = spi_io_init,
\r
1041 .io_deinit = spi_io_deinit,
\r
1042 .io_fix_leakage_bug = spi_io_fix_leakage_bug,
\r
1043 .io_resume_leakage_bug = spi_io_resume_leakage_bug,
\r
1046 /*****************************************************************************************
\r
1047 * xpt2046 touch panel
\r
1048 * author: cmc@rock-chips.com
\r
1049 *****************************************************************************************/
\r
1050 #define XPT2046_GPIO_INT RK29_PIN0_PA3
\r
1051 #define DEBOUNCE_REPTIME 3
\r
1053 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI)
\r
1054 static struct xpt2046_platform_data xpt2046_info = {
\r
1056 .keep_vref_on = 1,
\r
1062 .debounce_max = 7,
\r
1063 .debounce_rep = DEBOUNCE_REPTIME,
\r
1064 .debounce_tol = 20,
\r
1065 .gpio_pendown = XPT2046_GPIO_INT,
\r
1066 .penirq_recheck_delay_usecs = 1,
\r
1068 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)
\r
1069 static struct xpt2046_platform_data xpt2046_info = {
\r
1071 .keep_vref_on = 1,
\r
1077 .debounce_max = 7,
\r
1078 .debounce_rep = DEBOUNCE_REPTIME,
\r
1079 .debounce_tol = 20,
\r
1080 .gpio_pendown = XPT2046_GPIO_INT,
\r
1081 .penirq_recheck_delay_usecs = 1,
\r
1083 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_SPI)
\r
1084 static struct xpt2046_platform_data xpt2046_info = {
\r
1086 .keep_vref_on = 1,
\r
1092 .debounce_max = 7,
\r
1093 .debounce_rep = DEBOUNCE_REPTIME,
\r
1094 .debounce_tol = 20,
\r
1095 .gpio_pendown = XPT2046_GPIO_INT,
\r
1097 .penirq_recheck_delay_usecs = 1,
\r
1099 #elif defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
\r
1100 static struct xpt2046_platform_data xpt2046_info = {
\r
1102 .keep_vref_on = 1,
\r
1108 .debounce_max = 7,
\r
1109 .debounce_rep = DEBOUNCE_REPTIME,
\r
1110 .debounce_tol = 20,
\r
1111 .gpio_pendown = XPT2046_GPIO_INT,
\r
1113 .penirq_recheck_delay_usecs = 1,
\r
1117 static struct spi_board_info board_spi_devices[] = {
\r
1118 #if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)\
\r
1119 ||defined(CONFIG_TOUCHSCREEN_XPT2046_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)
\r
1121 .modalias = "xpt2046_ts",
\r
1123 .max_speed_hz = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */
\r
1125 .irq = XPT2046_GPIO_INT,
\r
1126 .platform_data = &xpt2046_info,
\r
1132 static void __init rk29_gic_init_irq(void)
\r
1134 gic_dist_init(0, (void __iomem *)RK29_GICPERI_BASE, 32);
\r
1135 gic_cpu_init(0, (void __iomem *)RK29_GICCPU_BASE);
\r
1138 static void __init machine_rk29_init_irq(void)
\r
1140 rk29_gic_init_irq();
\r
1141 rk29_gpio_init(rk29_gpiobankinit, MAX_BANK);
\r
1142 rk29_gpio_irq_setup();
\r
1145 static void __init machine_rk29_board_init(void)
\r
1147 rk29_board_iomux_init();
\r
1148 platform_add_devices(devices, ARRAY_SIZE(devices));
\r
1149 #ifdef CONFIG_I2C0_RK29
\r
1150 i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
\r
1151 ARRAY_SIZE(board_i2c0_devices));
\r
1153 #ifdef CONFIG_I2C1_RK29
\r
1154 i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
\r
1155 ARRAY_SIZE(board_i2c1_devices));
\r
1157 #ifdef CONFIG_I2C2_RK29
\r
1158 i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
\r
1159 ARRAY_SIZE(board_i2c2_devices));
\r
1161 #ifdef CONFIG_I2C3_RK29
\r
1162 i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
\r
1163 ARRAY_SIZE(board_i2c3_devices));
\r
1166 spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
\r
1169 static void __init machine_rk29_fixup(struct machine_desc *desc, struct tag *tags,
\r
1170 char **cmdline, struct meminfo *mi)
\r
1173 mi->bank[0].start = RK29_SDRAM_PHYS;
\r
1174 mi->bank[0].node = PHYS_TO_NID(RK29_SDRAM_PHYS);
\r
1175 mi->bank[0].size = LINUX_SIZE;
\r
1178 static void __init machine_rk29_mapio(void)
\r
1180 rk29_map_common_io();
\r
1181 rk29_clock_init();
\r
1182 rk29_iomux_init();
\r
1185 MACHINE_START(RK29, "RK29board")
\r
1186 /* UART for LL DEBUG */
\r
1187 .phys_io = RK29_UART1_PHYS,
\r
1188 .io_pg_offst = ((RK29_UART1_BASE) >> 18) & 0xfffc,
\r
1189 .boot_params = RK29_SDRAM_PHYS + 0x88000,
\r
1190 .fixup = machine_rk29_fixup,
\r
1191 .map_io = machine_rk29_mapio,
\r
1192 .init_irq = machine_rk29_init_irq,
\r
1193 .init_machine = machine_rk29_board_init,
\r
1194 .timer = &rk29_timer,
\r