arch/arm/mach-rk29/include/mach/rk29_iomap.h

   1 /* arch/arm/mach-rk29/include/mach/rk29_iomap.h
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #ifndef __ASM_ARCH_RK29_IOMAP_H
  17 #define __ASM_ARCH_RK29_IOMAP_H
  18
  19 #include <asm/sizes.h>
  20
  21 /* defines */
  22 #define         SZ_22K                          0x5800
  23 /*IOÓ³Éä·½Ê½¶¨Òå£¬ÒÔÎïÀíµØÖ·0x20000000Îª»ùµØÖ·
  24  *ºÍÒÔ0x10000000Îª»ùµØÖ··ÖÁíÓ³ÉäÎª£º0xf5000000,
  25  *0xf4000000
  26  */
  27
  28
  29 #define RK29_ADDR_BASE1                         0xF5000000
  30 #define RK29_ADDR_BASE0                         0xF4000000
  31
  32 #define RK29_SDRAM_PHYS                         0x60000000
  33 #define RK29_AXI1_PHYS                          0x10000000
  34 #define RK29_AXI0_PHYS                          0x1012C000
  35 #define RK29_PERI_PHYS                          0x10140000
  36
  37 //CPU system AXI 1
  38 #define RK29_BOOTROM_PHYS               0x10100000
  39 #define RK29_BOOTROM_SIZE               SZ_16K
  40 #define RK29_VCODEC_PHYS                        0x10104000
  41 #define RK29_VCODEC_SIZE                        SZ_16K
  42 #define RK29_VIP_PHYS                           0x10108000
  43 #define RK29_VIP_SIZE                           SZ_16K
  44 #define RK29_LCDC_PHYS                          0x1010C000
  45 #define RK29_LCDC_SIZE                          SZ_16K
  46 #define RK29_IPP_PHYS                           0x10110000
  47 #define RK29_IPP_SIZE                           SZ_16K
  48 #define RK29_EBC_PHYS                           0x10114000
  49 #define RK29_EBC_SIZE                           SZ_16K
  50 #define RK29_I2S_8CH_PHYS                       0x10118000
  51 #define RK29_I2S_8CH_SIZE                       SZ_16K
  52 #define RK29_I2S_2CH_PHYS                       0x1011C000
  53 #define RK29_I2S_2CH_SIZE                       SZ_8K
  54 #define RK29_SPDIF_PHYS                         0x1011E000
  55 #define RK29_SPDIF_SIZE                         SZ_8K
  56 #define RK29_GPU_PHYS                           0x10120000
  57 #define RK29_GPU_SIZE                           SZ_16K
  58 #define RK29_DDRC_PHYS                  0x10124000
  59 #define RK29_DDRC_BASE                  (RK29_ADDR_BASE0+0x124000)
  60 #define RK29_DDRC_SIZE                  SZ_16K
  61
  62 //CPU system AXI 0
  63 #define RK29_GICCPU_PHYS                        0x1012C000
  64 #define RK29_GICCPU_BASE                        (RK29_ADDR_BASE0+0x12C000)
  65 #define RK29_GICCPU_SIZE                        SZ_8K
  66 #define RK29_GICPERI_PHYS                       0x1012E000
  67 #define RK29_GICPERI_BASE                       (RK29_ADDR_BASE0+0x12E000)
  68 #define RK29_GICPERI_SIZE                       SZ_8K
  69 #define RK29_CPU_AXI_BUS0_PHYS          0x15000000
  70
  71 //peri system
  72 #define RK29_USBHOST_PHYS           0x10140000
  73 #define RK29_USBHOST_SIZE           SZ_256K
  74 #define RK29_USBOTG0_PHYS           0x10180000
  75 #define RK29_USBOTG0_SIZE           SZ_256K
  76 #define RK29_USBOTG1_PHYS           0x101c0000
  77 #define RK29_USBOTG1_SIZE           SZ_256K
  78 #define RK29_MAC_PHYS                           0x10204000
  79 #define RK29_MAC_SIZE                   SZ_16K
  80 #define RK29_HOSTIF_PHYS                        0x1020C000
  81 #define RK29_HOSTIF_SIZE                SZ_16K
  82 #define RK29_HSADC_PHYS                         0x10210000
  83 #define RK29_HSADC_SIZE                 SZ_16K
  84 #define RK29_SDMMC0_PHYS                        0x10214000
  85 #define RK29_SDMMC0_SIZE                SZ_16K
  86 #define RK29_SDMMC1_PHYS                        0x10218000
  87 #define RK29_SDMMC1_SIZE                SZ_16K
  88 #define RK29_EMMC_PHYS                          0x1021C000
  89 #define RK29_EMMC_SIZE                  SZ_16K
  90 #define RK29_PIDF_PHYS                          0x10220000
  91 #define RK29_EMMC_SIZE                  SZ_16K
  92 #define RK29_ARBITER0_PHYS                      0x10224000
  93 #define RK29_ARBITER0_SIZE          SZ_16K
  94 #define RK29_ARBITER1_PHYS                      0x10228000
  95 #define RK29_ARBITER1_SIZE          SZ_16K
  96 #define RK29_PERI_AXI_BUS0_PHYS         0x10300000
  97 #define RK29_NANDC_PHYS                         0x10500000
  98 #define RK29_NANDC_BASE                         (RK29_ADDR_BASE0+0x500000)
  99 #define RK29_NANDC_SIZE                         SZ_16K
 100
 101 //CPU AXI 1 APB
 102 #define RK29_CRU_PHYS                   0x20000000
 103 #define RK29_CRU_BASE                   RK29_ADDR_BASE1
 104 #define RK29_CRU_SIZE                           SZ_4K
 105 #define RK29_PMU_PHYS                   0x20004000
 106 #define RK29_PMU_BASE                   (RK29_ADDR_BASE1 + 0x4000)
 107 #define RK29_PMU_SIZE                   SZ_4K
 108 #define RK29_GRF_BASE                           (RK29_ADDR_BASE1+0x8000)
 109 #define RK29_GRF_PHYS                   0x20008000
 110 #define RK29_GRF_SIZE                           SZ_16K
 111 #define RK29_RTC_PHYS                   0x2000C000
 112 #define RK29_RTC_SIZE                           SZ_16K
 113 #define RK29_EFUSE_PHYS                 0x20010000
 114 #define RK29_EFUSE_SIZE                         SZ_16K
 115 #define RK29_TZPC_PHYS                  0x20014000
 116 #define RK29_TZPC_SIZE                          SZ_16K
 117 #define RK29_SDMAC0_PHYS                0x20018000
 118 #define RK29_SDMAC0_SIZE                        SZ_16K
 119 #define RK29_DMAC0_PHYS                 0x2001C000
 120 #define RK29_DMAC0_SIZE                         SZ_16K
 121 #define RK29_DEBUG_PHYS                 0x20024000
 122 #define RK29_DEBUG_SIZE                         SZ_16K
 123 #define RK29_I2C0_PHYS                  0x2002C000
 124 #define RK29_I2C0_SIZE                          SZ_16K
 125 #define RK29_UART0_PHYS                 0x20030000
 126 #define RK29_UART0_SIZE                         SZ_16K
 127 #define RK29_GPIO0_BASE                         (RK29_ADDR_BASE1+0x34000)
 128 #define RK29_GPIO0_PHYS                 0x20034000
 129 #define RK29_GPIO0_SIZE                         SZ_16K
 130 #define RK29_TIMER0_BASE                        (RK29_ADDR_BASE1+0x38000)
 131 #define RK29_TIMER0_PHYS                        0x20038000
 132 #define RK29_TIMER0_SIZE                        SZ_8K
 133 #define RK29_TIMER1_BASE                        (RK29_ADDR_BASE1+0x3A000)
 134 #define RK29_TIMER1_PHYS                        0x2003A000
 135 #define RK29_TIMER1_SIZE                        SZ_8K
 136 #define RK29_GPIO4_BASE                         (RK29_ADDR_BASE1+0x3C000)
 137 #define RK29_GPIO4_PHYS                 0x2003C000
 138 #define RK29_GPIO4_SIZE                         SZ_8K
 139 #define RK29_GPIO6_BASE                         (RK29_ADDR_BASE1+0x3E000)
 140 #define RK29_GPIO6_PHYS                 0x2003E000
 141 #define RK29_GPIO6_SIZE                         SZ_8K
 142
 143 //peri system APB
 144 #define RK29_TIMER2_BASE                        (RK29_ADDR_BASE1+0x44000)
 145 #define RK29_TIMER2_PHYS                        0x20044000
 146 #define RK29_TIMER2_SIZE                        SZ_16K
 147 #define RK29_TIMER3_BASE                        (RK29_ADDR_BASE1+0x48000)
 148 #define RK29_TIMER3_PHYS                        0x20048000
 149 #define RK29_TIMER3_SIZE                        SZ_16K
 150 #define RK29_WDT_PHYS                           0x2004C000
 151 #define RK29_WDT_SIZE                           SZ_16K
 152 #define RK29_PWM_BASE                           (RK29_ADDR_BASE1+0x50000)
 153 #define RK29_PWM_PHYS                           0x20050000
 154 #define RK29_PWM_SIZE                           SZ_16K
 155 #define RK29_I2C1_PHYS                          0x20054000
 156 #define RK29_I2C1_SIZE                          SZ_16K
 157 #define RK29_I2C2_PHYS                          0x20058000
 158 #define RK29_I2C2_SIZE                          SZ_16K
 159 #define RK29_I2C3_PHYS                          0x2005C000
 160 #define RK29_I2C3_SIZE                          SZ_16K
 161 #define RK29_UART1_PHYS                 0x20060000
 162 #define RK29_UART1_BASE                 (RK29_ADDR_BASE1+0x60000)
 163 #define RK29_UART1_SIZE                 SZ_16K
 164 #define RK29_UART2_PHYS                         0x20064000
 165 #define RK29_UART2_SIZE                         SZ_16K
 166 #define RK29_UART3_PHYS                         0x20068000
 167 #define RK29_TIMER2_SIZE                        SZ_16K
 168 #define RK29_ADC_PHYS                           0x2006C000
 169 #define RK29_ADC_SIZE                           SZ_16K
 170 #define RK29_SPI0_PHYS                          0x20070000
 171 #define RK29_SPI0_SIZE                          SZ_16K
 172 #define RK29_SPI1_PHYS                          0x20074000
 173 #define RK29_SPI1_SIZE                          SZ_16K
 174 #define RK29_DMA2_PHYS                          0x20078000
 175 #define RK29_DMA2_SIZE                          SZ_16K
 176 #define RK29_SMC_PHYS                           0x2007C000
 177 #define RK29_SMC_SIZE                           SZ_16K
 178 #define RK29_GPIO1_BASE                         (RK29_ADDR_BASE1+0x80000)
 179 #define RK29_GPIO1_PHYS                         0x20080000
 180 #define RK29_GPIO1_SIZE                         SZ_16K
 181 #define RK29_GPIO2_BASE                         (RK29_ADDR_BASE1+0x84000)
 182 #define RK29_GPIO2_PHYS                         0x20084000
 183 #define RK29_GPIO2_SIZE                         SZ_16K
 184 #define RK29_GPIO3_BASE                         (RK29_ADDR_BASE1+0x88000)
 185 #define RK29_GPIO3_PHYS                         0x20088000
 186 #define RK29_GPIO3_SIZE                         SZ_16K
 187 #define RK29_GPIO5_BASE                         (RK29_ADDR_BASE1+0x8C000)
 188 #define RK29_GPIO5_PHYS                         0x2008C000
 189 #define RK29_GPIO5_SIZE                         SZ_16K
 190 #endif