arch/arm/mach-rk29/include/mach/rk29_iomap.h

   1 /* arch/arm/mach-rk29/include/mach/rk29_iomap.h
   2  *
   3  * Copyright (C) 2010 ROCKCHIP, Inc.
   4  *
   5  * This software is licensed under the terms of the GNU General Public
   6  * License version 2, as published by the Free Software Foundation, and
   7  * may be copied, distributed, and modified under those terms.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  */
  15
  16 #ifndef __ASM_ARCH_RK29_IOMAP_H
  17 #define __ASM_ARCH_RK29_IOMAP_H
  18
  19 #include <asm/sizes.h>
  20
  21 /* defines */
  22 #define         SZ_22K                          0x5800
  23 /*IOÓ³Éä·½Ê½¶¨Òå£¬ÒÔÎïÀíµØÖ·0x20000000Îª»ùµØÖ·
  24  *ºÍÒÔ0x10000000Îª»ùµØÖ··ÖÁíÓ³ÉäÎª£º0xf5000000,
  25  *0xf4000000
  26  */
  27 #define RK29_ADDR_BASE1                         0xF5000000
  28 #define RK29_ADDR_BASE0                         0xF4000000
  29
  30 #define RK29_SDRAM_PHYS                         0x60000000
  31 #define RK29_AXI0_PHYS                          0x1012C000
  32 #define RK29_AXI1_PHYS                          0x10000000
  33 #define RK29_PERI_PHYS                          0x10140000
  34
  35 #define RK29_BOOTROM_PHYS               0x10100000
  36 #define RK29_BOOTROM_SIZE               SZ_16K
  37
  38 #define RK29_DDRC_PHYS                  0x10124000
  39 #define RK29_DDRC_BASE                  (RK29_ADDR_BASE0+0x124000)
  40 #define RK29_DDRC_SIZE                  SZ_16K
  41
  42 #define RK29_GICCPU_PHYS                        0x1012C000
  43 #define RK29_GICCPU_BASE                        (RK29_ADDR_BASE0+0x12C000)
  44 #define RK29_GICCPU_SIZE                        SZ_8K
  45
  46 #define RK29_GICPERI_PHYS                       0x1012E000
  47 #define RK29_GICPERI_BASE                       (RK29_ADDR_BASE0+0x12E000)
  48 #define RK29_GICPERI_SIZE                       SZ_8K
  49
  50 #define RK29_USBHOST_PHYS           0x10140000
  51 #define RK29_USBHOST_SIZE           SZ_256K
  52
  53 #define RK29_USBOTG0_PHYS           0x10180000
  54 #define RK29_USBOTG0_SIZE           SZ_256K
  55
  56 #define RK29_USBOTG1_PHYS           0x101c0000
  57 #define RK29_USBOTG1_SIZE           SZ_256K
  58
  59 #define RK29_NANDC_PHYS                         0x1012E000
  60 #define RK29_NANDC_BASE                         (RK29_ADDR_BASE0+0x500000)
  61 #define RK29_NANDC_SIZE                         SZ_16K
  62
  63 #define RK29_TIMER0_BASE                        (RK29_ADDR_BASE1+0x38000)
  64 #define RK29_TIMER0_PHYS                        0x20038000
  65 #define RK29_TIMER0_SIZE                        SZ_8K
  66
  67 #define RK29_UART1_PHYS                 0x20060000
  68 #define RK29_UART1_BASE                 (RK29_ADDR_BASE1+0x60000)
  69 #define RK29_UART1_SIZE                 SZ_16K
  70
  71 #endif