arch/arm/mach-rk2928/board-rk2928-sdk-tps65910.c

   1 #include <linux/regulator/machine.h>
   2 #include <linux/i2c/twl.h>
   3 #include <linux/mfd/tps65910.h>
   4 #include <mach/sram.h>
   5 #include <linux/platform_device.h>
   6
   7 #include <mach/gpio.h>
   8 #include <mach/iomux.h>
   9
  10 #ifdef CONFIG_MFD_TPS65910
  11
  12 extern int platform_device_register(struct platform_device *pdev);
  13
  14 int tps65910_pre_init(struct tps65910 *tps65910){
  15
  16         int val = 0;
  17         int i   = 0;
  18         int err = -1;
  19
  20         printk("%s,line=%d\n", __func__,__LINE__);
  21 #ifdef CONFIG_RK_CONFIG
  22         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
  23                 printk(KERN_ERR "sram_gpio_init failed\n");
  24                 return -EINVAL;
  25         }
  26         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
  27                 printk(KERN_ERR "port_output_init failed\n");
  28                 return -EINVAL;
  29         }
  30 #else
  31         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
  32                 printk(KERN_ERR "sram_gpio_init failed\n");
  33                 return -EINVAL;
  34         }
  35
  36         gpio_request(PMU_POWER_SLEEP, "NULL");
  37         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
  38 #endif
  39
  40         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
  41         if (val<0) {
  42                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
  43                 return val;
  44         }
  45         /* Set sleep state active high and allow device turn-off after PWRON long press */
  46         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
  47
  48         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
  49         if (err) {
  50                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
  51                 return err;
  52         }
  53          #if 1
  54         /* set PSKIP=0 */
  55         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
  56         if (val<0) {
  57                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
  58                 return val;
  59         }
  60
  61         val &= ~DEVCTRL_DEV_OFF_MASK;
  62         val &= ~DEVCTRL_DEV_SLP_MASK;
  63         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
  64         if (err) {
  65                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
  66                 return err;
  67         }
  68         #endif
  69         /* Set the maxinum load current */
  70         /* VDD1 */
  71         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
  72         if (val<0) {
  73                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
  74                 return val;
  75         }
  76
  77         val |= (1<<5);          //when 1: 1.5 A
  78         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/|¨¬s(sampling 3 Mhz/5)
  79         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
  80         if (err) {
  81                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
  82                 return err;
  83         }
  84
  85         /* VDD2 */
  86         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
  87         if (val<0) {
  88                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
  89                 return val;
  90         }
  91
  92         val |= (1<<5);          //when 1: 1.5 A
  93         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
  94         if (err) {
  95                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
  96                 return err;
  97         }
  98
  99         /* VIO */
 100         val = tps65910_reg_read(tps65910, TPS65910_VIO);
 101         if (val<0) {
 102                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
 103                 return -EIO;
 104         }
 105
 106         val |= (1<<6);  //when 01: 1.0 A
 107         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
 108         if (err) {
 109                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
 110                 return err;
 111         }
 112         #if 1
 113         /* Mask ALL interrupts */
 114         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
 115         if (err) {
 116                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
 117                 return err;
 118         }
 119
 120         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
 121         if (err) {
 122                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
 123                 return err;
 124         }
 125
 126         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
 127         #if 1
 128         val = 0;
 129         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
 130         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 131         if (err) {
 132                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
 133                 return err;
 134         }
 135         printk(KERN_INFO "TPS65910 Set default voltage.\n");
 136         #endif
 137         #if 0
 138         //read sleep control register  for debug
 139         for(i=0; i<6; i++)
 140         {
 141         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 142         if (err) {
 143                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 144                 return -EIO;
 145         }
 146                 else
 147                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
 148         }
 149         #endif
 150
 151         #if 1
 152         //sleep control register
 153         /*set func when in sleep mode */
 154         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
 155         if (val<0) {
 156                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 157                 return val;
 158         }
 159
 160         val |= (1 << 1);
 161         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 162         if (err) {
 163                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 164                                 \n", TPS65910_VDIG1);
 165                 return err;
 166         }
 167
 168         /* open ldo when in sleep mode */
 169         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
 170         if (val<0) {
 171                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 172                 return val;
 173         }
 174
 175         val &= 0;
 176         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
 177         if (err) {
 178                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 179                                 \n", TPS65910_VDIG1);
 180                 return err;
 181         }
 182
 183         /*set dc mode when in sleep mode */
 184         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
 185         if (val<0) {
 186                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 187                 return val;
 188         }
 189
 190         val  |= 0xff;
 191         val  &= ~(0x07);   //set vdd1 vdd2 vio in pfm mode when in sleep
 192         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
 193         if (err) {
 194                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 195                                 \n", TPS65910_VDIG1);
 196                 return err;
 197         }
 198
 199         /*close ldo when in sleep mode */
 200         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
 201         if (val<0) {
 202                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 203                 return val;
 204         }
 205
 206         val |= 0x9B;
 207         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
 208         if (err) {
 209                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 210                                 \n", TPS65910_VDIG1);
 211                 return err;
 212         }
 213
 214         #endif
 215         #if 0
 216         //read sleep control register  for debug
 217         for(i=0; i<6; i++)
 218         {
 219         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 220         if (err) {
 221                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 222                 return -EIO;
 223         }
 224                 else
 225                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
 226         }
 227         #endif
 228         #endif
 229
 230         /**********************set arm in pwm ****************/
 231           val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
 232         if (val<0) {
 233                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 234                 return val;
 235         }
 236
 237         val &= ~(1<<4);
 238         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
 239         if (err) {
 240                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 241                                 \n", TPS65910_VDIG1);
 242                 return err;
 243         }
 244         /************************************************/
 245
 246         printk("%s,line=%d\n", __func__,__LINE__);
 247         return 0;
 248
 249 }
 250
 251 int tps65910_post_init(struct tps65910 *tps65910)
 252 {
 253         struct regulator *dcdc;
 254         struct regulator *ldo;
 255         int i = 0;
 256         printk("%s,line=%d\n", __func__,__LINE__);
 257
 258 #ifndef CONFIG_RK_CONFIG
 259         g_pmic_type = PMIC_TYPE_TPS65910;
 260 #endif
 261         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
 262
 263         #ifdef CONFIG_RK30_PWM_REGULATOR
 264         platform_device_register(&pwm_regulator_device[0]);
 265         #endif
 266
 267         for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
 268         {
 269                 if(tps65910_dcdc_info[i].min_uv == 0 && tps65910_dcdc_info[i].max_uv == 0)
 270                         continue;
 271                 dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
 272                 regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
 273                 regulator_enable(dcdc);
 274                 printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
 275                 regulator_put(dcdc);
 276                 udelay(100);
 277         }
 278
 279         for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
 280         {
 281                 if(tps65910_ldo_info[i].min_uv == 0 && tps65910_ldo_info[i].max_uv == 0)
 282                         continue;
 283                 ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
 284                 regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
 285                 regulator_enable(ldo);
 286                 printk("%s  %s =%dmV end\n", __func__,tps65910_ldo_info[i].name, regulator_get_voltage(ldo));
 287                 regulator_put(ldo);
 288         }
 289
 290         printk("%s,line=%d END\n", __func__,__LINE__);
 291
 292         return 0;
 293 }
 294 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
 295         {
 296                 .supply = "vdd1",
 297         },
 298         {
 299                 .supply = "vdd_cpu",
 300         },
 301 };
 302 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
 303         {
 304                 .supply = "vdd2",
 305         },
 306         #if defined(CONFIG_MACH_RK2926_V86)
 307         {
 308                 .supply = "vdd_core",
 309         },
 310       #endif
 311
 312 };
 313 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
 314         {
 315                 .supply = "vdd3",
 316         },
 317 };
 318 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
 319         {
 320                 .supply = "vio",
 321         },
 322 };
 323 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
 324         {
 325                 .supply = "vdig1",
 326         },
 327 };
 328 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
 329         {
 330                 .supply = "vdig2",
 331         },
 332 };
 333
 334 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
 335         {
 336                 .supply = "vaux1",
 337         },
 338 };
 339 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
 340         {
 341                 .supply = "vaux2",
 342         },
 343 };
 344 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
 345         {
 346                 .supply = "vaux33",
 347         },
 348 };
 349 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
 350         {
 351                 .supply = "vmmc",
 352         },
 353 };
 354 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
 355         {
 356                 .supply = "vdac",
 357         },
 358 };
 359
 360 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
 361         {
 362                 .supply = "vpll",
 363         },
 364 };
 365
 366 static struct regulator_init_data tps65910_smps1 = {
 367         .constraints = {
 368                 .name           = "VDD1",
 369                 .min_uV                 = 600000,
 370                 .max_uV                 = 1500000,
 371                 .apply_uV               = 1,
 372                 .always_on = 1,
 373                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 374                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 375
 376         },
 377         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
 378         .consumer_supplies =  tps65910_smps1_supply,
 379 };
 380
 381 /* */
 382 static struct regulator_init_data tps65910_smps2 = {
 383         .constraints = {
 384                 .name           = "VDD2",
 385                 .min_uV                 = 600000,
 386                 .max_uV                 = 1500000,
 387                 .apply_uV               = 1,
 388                 .always_on = 1,
 389                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 390                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 391
 392         },
 393         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
 394         .consumer_supplies =  tps65910_smps2_supply,
 395 };
 396
 397 /* */
 398 static struct regulator_init_data tps65910_smps3 = {
 399         .constraints = {
 400                 .name           = "VDD3",
 401                 .min_uV                 = 1000000,
 402                 .max_uV                 = 1400000,
 403                 .apply_uV               = 1,
 404                 .always_on = 1,
 405                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 406                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 407
 408         },
 409         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
 410         .consumer_supplies =  tps65910_smps3_supply,
 411 };
 412
 413 static struct regulator_init_data tps65910_smps4 = {
 414         .constraints = {
 415                 .name           = "VIO",
 416                 .min_uV                 = 1800000,
 417                 .max_uV                 = 3300000,
 418                 .apply_uV               = 1,
 419                 .always_on = 1,
 420                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 421                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 422
 423         },
 424         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
 425         .consumer_supplies =  tps65910_smps4_supply,
 426 };
 427 static struct regulator_init_data tps65910_ldo1 = {
 428         .constraints = {
 429                 .name           = "VDIG1",
 430                 .min_uV                 = 1200000,
 431                 .max_uV                 = 2700000,
 432                 .apply_uV               = 1,
 433
 434                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 435                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 436
 437         },
 438         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
 439         .consumer_supplies =  tps65910_ldo1_supply,
 440 };
 441
 442 /* */
 443 static struct regulator_init_data tps65910_ldo2 = {
 444         .constraints = {
 445                 .name           = "VDIG2",
 446                 .min_uV                 = 1000000,
 447                 .max_uV                 = 1800000,
 448                 .apply_uV               = 1,
 449
 450                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 451                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 452
 453         },
 454         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
 455         .consumer_supplies =  tps65910_ldo2_supply,
 456 };
 457
 458 /* */
 459 static struct regulator_init_data tps65910_ldo3 = {
 460         .constraints = {
 461                 .name           = "VAUX1",
 462                 .min_uV                 = 1800000,
 463                 .max_uV                 = 3300000,
 464                 .apply_uV               = 1,
 465
 466                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 467                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 468
 469         },
 470         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
 471         .consumer_supplies =  tps65910_ldo3_supply,
 472 };
 473
 474 /* */
 475 static struct regulator_init_data tps65910_ldo4 = {
 476         .constraints = {
 477                 .name           = "VAUX2",
 478                 .min_uV                 = 1800000,
 479                 .max_uV                 = 3300000,
 480                 .apply_uV               = 1,
 481
 482                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 483                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 484
 485         },
 486         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
 487         .consumer_supplies =  tps65910_ldo4_supply,
 488 };
 489
 490 /* */
 491 static struct regulator_init_data tps65910_ldo5 = {
 492         .constraints = {
 493                 .name           = "VAUX33",
 494                 .min_uV                 = 1800000,
 495                 .max_uV                 = 3300000,
 496                 .apply_uV               = 1,
 497
 498                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 499                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 500
 501         },
 502         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
 503         .consumer_supplies =  tps65910_ldo5_supply,
 504 };
 505
 506 /* */
 507 static struct regulator_init_data tps65910_ldo6 = {
 508         .constraints = {
 509                 .name           = "VMMC",
 510                 .min_uV                 = 1800000,
 511                 .max_uV                 = 3300000,
 512                 .apply_uV               = 1,
 513
 514                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 515                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 516
 517         },
 518         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
 519         .consumer_supplies =  tps65910_ldo6_supply,
 520 };
 521
 522 /* */
 523 static struct regulator_init_data tps65910_ldo7 = {
 524         .constraints = {
 525                 .name           = "VDAC",
 526                 .min_uV                 = 1800000,
 527                 .max_uV                 = 2850000,
 528                 .apply_uV               = 1,
 529
 530                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 531                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 532
 533         },
 534         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
 535         .consumer_supplies =  tps65910_ldo7_supply,
 536 };
 537
 538 /* */
 539 static struct regulator_init_data tps65910_ldo8 = {
 540         .constraints = {
 541                 .name           = "VPLL",
 542                 .min_uV                 = 1000000,
 543                 .max_uV                 = 2500000,
 544                 .apply_uV               = 1,
 545                 .always_on = 1,
 546                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 547                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 548
 549         },
 550         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
 551         .consumer_supplies =  tps65910_ldo8_supply,
 552 };
 553 void __sramfunc board_pmu_tps65910_suspend(void)
 554 {
 555         sram_gpio_set_value(pmic_sleep, GPIO_HIGH);
 556 }
 557 void __sramfunc board_pmu_tps65910_resume(void)
 558 {
 559        sram_gpio_set_value(pmic_sleep, GPIO_LOW);
 560         sram_udelay(2000);
 561 }
 562 static struct tps65910_board tps65910_data = {
 563         .irq    = (unsigned)TPS65910_HOST_IRQ,
 564         .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
 565         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
 566
 567         .pre_init = tps65910_pre_init,
 568         .post_init = tps65910_post_init,
 569
 570         //TPS65910_NUM_REGS = 13
 571         // Regulators
 572         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
 573         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
 574         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
 575         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
 576         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
 577         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
 578         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
 579         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
 580         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
 581         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
 582         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
 583         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
 584         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
 585
 586
 587 };
 588
 589 #endif
 590