arch/arm/mach-rk2928/board-rk2928-sdk-tps65910.c

   1 #include <linux/regulator/machine.h>
   2 #include <linux/i2c/twl.h>
   3 #include <linux/mfd/tps65910.h>
   4 #include <mach/sram.h>
   5 #include <linux/platform_device.h>
   6
   7 #include <mach/gpio.h>
   8 #include <mach/iomux.h>
   9
  10 #define grf_readl(offset)       readl_relaxed(RK30_GRF_BASE + offset)
  11 #define grf_writel(v, offset)   do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
  12
  13 #define CRU_CLKGATE5_CON_ADDR 0x00e4
  14 #define GRF_GPIO6L_DIR_ADDR 0x0030
  15 #define GRF_GPIO6L_DO_ADDR 0x0068
  16 #define GRF_GPIO6L_EN_ADDR 0x00a0
  17 #define GPIO6_PB3_DIR_OUT  0x08000800
  18 #define GPIO6_PB3_DO_LOW  0x08000000
  19 #define GPIO6_PB3_DO_HIGH  0x08000800
  20 #define GPIO6_PB3_EN_MASK  0x08000800
  21 #define GPIO6_PB3_UNEN_MASK  0x08000000
  22 #define GPIO6_PB1_DIR_OUT  0x02000200
  23 #define GPIO6_PB1_DO_LOW  0x02000000
  24 #define GPIO6_PB1_DO_HIGH  0x02000200
  25 #define GPIO6_PB1_EN_MASK  0x02000200
  26 #define GPIO6_PB1_UNEN_MASK  0x02000000
  27
  28 #ifdef CONFIG_MFD_TPS65910
  29 #define PMU_POWER_SLEEP RK2928_PIN3_PD2
  30 extern int platform_device_register(struct platform_device *pdev);
  31
  32 int tps65910_pre_init(struct tps65910 *tps65910){
  33
  34         int val = 0;
  35         int i   = 0;
  36         int err = -1;
  37
  38         printk("%s,line=%d\n", __func__,__LINE__);
  39         gpio_request(PMU_POWER_SLEEP, "NULL");
  40         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
  41
  42         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
  43         if (val<0) {
  44                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
  45                 return val;
  46         }
  47         /* Set sleep state active high and allow device turn-off after PWRON long press */
  48         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
  49
  50         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
  51         if (err) {
  52                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
  53                 return err;
  54         }
  55          #if 1
  56         /* set PSKIP=0 */
  57         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
  58         if (val<0) {
  59                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
  60                 return val;
  61         }
  62
  63         val &= ~DEVCTRL_DEV_OFF_MASK;
  64         val &= ~DEVCTRL_DEV_SLP_MASK;
  65         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
  66         if (err) {
  67                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
  68                 return err;
  69         }
  70         #endif
  71         /* Set the maxinum load current */
  72         /* VDD1 */
  73         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
  74         if (val<0) {
  75                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
  76                 return val;
  77         }
  78
  79         val |= (1<<5);          //when 1: 1.5 A
  80         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/|¨¬s(sampling 3 Mhz/5)
  81         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
  82         if (err) {
  83                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
  84                 return err;
  85         }
  86
  87         /* VDD2 */
  88         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
  89         if (val<0) {
  90                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
  91                 return val;
  92         }
  93
  94         val |= (1<<5);          //when 1: 1.5 A
  95         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
  96         if (err) {
  97                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
  98                 return err;
  99         }
 100
 101         /* VIO */
 102         val = tps65910_reg_read(tps65910, TPS65910_VIO);
 103         if (val<0) {
 104                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
 105                 return -EIO;
 106         }
 107
 108         val |= (1<<6);  //when 01: 1.0 A
 109         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
 110         if (err) {
 111                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
 112                 return err;
 113         }
 114         #if 1
 115         /* Mask ALL interrupts */
 116         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
 117         if (err) {
 118                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
 119                 return err;
 120         }
 121
 122         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
 123         if (err) {
 124                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
 125                 return err;
 126         }
 127
 128         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
 129         #if 1
 130         val = 0;
 131         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
 132         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 133         if (err) {
 134                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
 135                 return err;
 136         }
 137         printk(KERN_INFO "TPS65910 Set default voltage.\n");
 138         #endif
 139         #if 0
 140         //read sleep control register  for debug
 141         for(i=0; i<6; i++)
 142         {
 143         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 144         if (err) {
 145                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 146                 return -EIO;
 147         }
 148                 else
 149                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
 150         }
 151         #endif
 152
 153         #if 1
 154         //sleep control register
 155         /*set func when in sleep mode */
 156         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
 157         if (val<0) {
 158                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 159                 return val;
 160         }
 161
 162         val |= (1 << 1);
 163         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 164         if (err) {
 165                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 166                                 \n", TPS65910_VDIG1);
 167                 return err;
 168         }
 169
 170         /* open ldo when in sleep mode */
 171         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
 172         if (val<0) {
 173                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 174                 return val;
 175         }
 176
 177         val &= 0;
 178         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
 179         if (err) {
 180                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 181                                 \n", TPS65910_VDIG1);
 182                 return err;
 183         }
 184
 185         /*set dc mode when in sleep mode */
 186         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
 187         if (val<0) {
 188                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 189                 return val;
 190         }
 191
 192         val  |= 0xff;
 193         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
 194         if (err) {
 195                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 196                                 \n", TPS65910_VDIG1);
 197                 return err;
 198         }
 199
 200         /*close ldo when in sleep mode */
 201         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
 202         if (val<0) {
 203                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 204                 return val;
 205         }
 206
 207         val |= 0x9B;
 208         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
 209         if (err) {
 210                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 211                                 \n", TPS65910_VDIG1);
 212                 return err;
 213         }
 214
 215         #endif
 216         #if 0
 217         //read sleep control register  for debug
 218         for(i=0; i<6; i++)
 219         {
 220         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 221         if (err) {
 222                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 223                 return -EIO;
 224         }
 225                 else
 226                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
 227         }
 228         #endif
 229         #endif
 230
 231         printk("%s,line=%d\n", __func__,__LINE__);
 232         return 0;
 233
 234 }
 235 int tps65910_post_init(struct tps65910 *tps65910)
 236 {
 237         struct regulator *dcdc;
 238         struct regulator *ldo;
 239         printk("%s,line=%d\n", __func__,__LINE__);
 240
 241         #ifdef CONFIG_RK30_PWM_REGULATOR
 242         platform_device_register(&pwm_regulator_device[0]);
 243         #endif
 244
 245         dcdc = regulator_get(NULL, "vio");      //vcc_io
 246         regulator_set_voltage(dcdc, 3300000, 3300000);
 247         regulator_enable(dcdc);
 248         printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 249         regulator_put(dcdc);
 250         udelay(100);
 251
 252         ldo = regulator_get(NULL, "vpll");      // vcc25
 253         regulator_set_voltage(ldo, 2500000, 2500000);
 254         regulator_enable(ldo);
 255         printk("%s set vpll vcc25=%dmV end\n", __func__, regulator_get_voltage(ldo));
 256         regulator_put(ldo);
 257         udelay(100);
 258
 259         ldo = regulator_get(NULL, "vdig2");     // vdd11
 260         regulator_set_voltage(ldo, 1200000, 1200000);
 261         regulator_enable(ldo);
 262         printk("%s set vdig2 vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
 263         regulator_put(ldo);
 264         udelay(100);
 265
 266         ldo = regulator_get(NULL, "vaux33");     //vcc_tp
 267         regulator_set_voltage(ldo, 3300000, 3300000);
 268         regulator_enable(ldo);
 269         printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
 270         regulator_put(ldo);
 271         udelay(100);
 272
 273         dcdc = regulator_get(NULL, "vdd_cpu");  //vdd_cpu
 274         regulator_set_voltage(dcdc, 1200000, 1200000);
 275         regulator_enable(dcdc);
 276         printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 277         regulator_put(dcdc);
 278         udelay(100);
 279
 280         dcdc = regulator_get(NULL, "vdd2");     //vcc_ddr
 281         regulator_set_voltage(dcdc, 1200000, 1200000);  // 1.5*4/5 = 1.2 and Vout=1.5v
 282         regulator_enable(dcdc);
 283         printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 284         regulator_put(dcdc);
 285         udelay(100);
 286
 287         ldo = regulator_get(NULL, "vdig1");     //vcc18_cif
 288         regulator_set_voltage(ldo, 1800000, 1800000);
 289         regulator_enable(ldo);
 290         printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
 291         regulator_put(ldo);
 292         udelay(100);
 293
 294         dcdc = regulator_get(NULL, "vaux1"); //vcc25_hdmi
 295         regulator_set_voltage(dcdc,2500000,2500000);
 296         regulator_enable(dcdc);
 297         printk("%s set vaux1 vcc25_hdmi=%dmV end\n", __func__, regulator_get_voltage(dcdc));
 298         regulator_put(dcdc);
 299         udelay(100);
 300
 301         ldo = regulator_get(NULL, "vaux2");     //vcca33
 302         regulator_set_voltage(ldo, 3300000, 3300000);
 303         regulator_enable(ldo);
 304         printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
 305         regulator_put(ldo);
 306         udelay(100);
 307
 308         ldo = regulator_get(NULL, "vdac"); // vccio_wl
 309         regulator_set_voltage(ldo,1800000,1800000);
 310         regulator_enable(ldo);
 311         printk("%s set vdac vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
 312         regulator_put(ldo);
 313         udelay(100);
 314
 315         ldo = regulator_get(NULL, "vmmc");  //vcc28_cif
 316         regulator_set_voltage(ldo,2800000,2800000);
 317         regulator_enable(ldo);
 318         printk("%s set vmmc vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
 319         regulator_put(ldo);
 320         udelay(100);
 321
 322         printk("%s,line=%d END\n", __func__,__LINE__);
 323
 324         return 0;
 325 }
 326
 327 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
 328         {
 329                 .supply = "vdd1",
 330         },
 331         {
 332                 .supply = "vdd_cpu",
 333         },
 334 };
 335 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
 336         {
 337                 .supply = "vdd2",
 338         },
 339
 340 };
 341 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
 342         {
 343                 .supply = "vdd3",
 344         },
 345 };
 346 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
 347         {
 348                 .supply = "vio",
 349         },
 350 };
 351 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
 352         {
 353                 .supply = "vdig1",
 354         },
 355 };
 356 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
 357         {
 358                 .supply = "vdig2",
 359         },
 360 };
 361
 362 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
 363         {
 364                 .supply = "vaux1",
 365         },
 366 };
 367 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
 368         {
 369                 .supply = "vaux2",
 370         },
 371 };
 372 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
 373         {
 374                 .supply = "vaux33",
 375         },
 376 };
 377 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
 378         {
 379                 .supply = "vmmc",
 380         },
 381 };
 382 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
 383         {
 384                 .supply = "vdac",
 385         },
 386 };
 387
 388 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
 389         {
 390                 .supply = "vpll",
 391         },
 392 };
 393
 394 static struct regulator_init_data tps65910_smps1 = {
 395         .constraints = {
 396                 .name           = "VDD1",
 397                 .min_uV                 = 600000,
 398                 .max_uV                 = 1500000,
 399                 .apply_uV               = 1,
 400                 .always_on = 1,
 401                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 402                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 403
 404         },
 405         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
 406         .consumer_supplies =  tps65910_smps1_supply,
 407 };
 408
 409 /* */
 410 static struct regulator_init_data tps65910_smps2 = {
 411         .constraints = {
 412                 .name           = "VDD2",
 413                 .min_uV                 = 600000,
 414                 .max_uV                 = 1500000,
 415                 .apply_uV               = 1,
 416                 .always_on = 1,
 417                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 418                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 419
 420         },
 421         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
 422         .consumer_supplies =  tps65910_smps2_supply,
 423 };
 424
 425 /* */
 426 static struct regulator_init_data tps65910_smps3 = {
 427         .constraints = {
 428                 .name           = "VDD3",
 429                 .min_uV                 = 1000000,
 430                 .max_uV                 = 1400000,
 431                 .apply_uV               = 1,
 432                 .always_on = 1,
 433                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 434                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 435
 436         },
 437         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
 438         .consumer_supplies =  tps65910_smps3_supply,
 439 };
 440
 441 static struct regulator_init_data tps65910_smps4 = {
 442         .constraints = {
 443                 .name           = "VIO",
 444                 .min_uV                 = 1800000,
 445                 .max_uV                 = 3300000,
 446                 .apply_uV               = 1,
 447                 .always_on = 1,
 448                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 449                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 450
 451         },
 452         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
 453         .consumer_supplies =  tps65910_smps4_supply,
 454 };
 455 static struct regulator_init_data tps65910_ldo1 = {
 456         .constraints = {
 457                 .name           = "VDIG1",
 458                 .min_uV                 = 1200000,
 459                 .max_uV                 = 2700000,
 460                 .apply_uV               = 1,
 461
 462                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 463                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 464
 465         },
 466         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
 467         .consumer_supplies =  tps65910_ldo1_supply,
 468 };
 469
 470 /* */
 471 static struct regulator_init_data tps65910_ldo2 = {
 472         .constraints = {
 473                 .name           = "VDIG2",
 474                 .min_uV                 = 1000000,
 475                 .max_uV                 = 1800000,
 476                 .apply_uV               = 1,
 477
 478                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 479                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 480
 481         },
 482         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
 483         .consumer_supplies =  tps65910_ldo2_supply,
 484 };
 485
 486 /* */
 487 static struct regulator_init_data tps65910_ldo3 = {
 488         .constraints = {
 489                 .name           = "VAUX1",
 490                 .min_uV                 = 1800000,
 491                 .max_uV                 = 3300000,
 492                 .apply_uV               = 1,
 493
 494                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 495                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 496
 497         },
 498         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
 499         .consumer_supplies =  tps65910_ldo3_supply,
 500 };
 501
 502 /* */
 503 static struct regulator_init_data tps65910_ldo4 = {
 504         .constraints = {
 505                 .name           = "VAUX2",
 506                 .min_uV                 = 1800000,
 507                 .max_uV                 = 3300000,
 508                 .apply_uV               = 1,
 509
 510                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 511                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 512
 513         },
 514         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
 515         .consumer_supplies =  tps65910_ldo4_supply,
 516 };
 517
 518 /* */
 519 static struct regulator_init_data tps65910_ldo5 = {
 520         .constraints = {
 521                 .name           = "VAUX33",
 522                 .min_uV                 = 1800000,
 523                 .max_uV                 = 3300000,
 524                 .apply_uV               = 1,
 525
 526                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 527                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 528
 529         },
 530         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
 531         .consumer_supplies =  tps65910_ldo5_supply,
 532 };
 533
 534 /* */
 535 static struct regulator_init_data tps65910_ldo6 = {
 536         .constraints = {
 537                 .name           = "VMMC",
 538                 .min_uV                 = 1800000,
 539                 .max_uV                 = 3300000,
 540                 .apply_uV               = 1,
 541
 542                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 543                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 544
 545         },
 546         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
 547         .consumer_supplies =  tps65910_ldo6_supply,
 548 };
 549
 550 /* */
 551 static struct regulator_init_data tps65910_ldo7 = {
 552         .constraints = {
 553                 .name           = "VDAC",
 554                 .min_uV                 = 1800000,
 555                 .max_uV                 = 2850000,
 556                 .apply_uV               = 1,
 557
 558                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 559                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 560
 561         },
 562         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
 563         .consumer_supplies =  tps65910_ldo7_supply,
 564 };
 565
 566 /* */
 567 static struct regulator_init_data tps65910_ldo8 = {
 568         .constraints = {
 569                 .name           = "VPLL",
 570                 .min_uV                 = 1000000,
 571                 .max_uV                 = 2500000,
 572                 .apply_uV               = 1,
 573                 .always_on = 1,
 574                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 575                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 576
 577         },
 578         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
 579         .consumer_supplies =  tps65910_ldo8_supply,
 580 };
 581 /*
 582 void __sramfunc board_pmu_tps65910_suspend(void)
 583 {
 584         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
 585         grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
 586         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
 587 }
 588 void __sramfunc board_pmu_tps65910_resume(void)
 589 {
 590         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
 591         grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
 592         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
 593         #ifdef CONFIG_CLK_SWITCH_TO_32K                 //switch clk to 24M
 594         sram_32k_udelay(10000);
 595         #else
 596         sram_udelay(2000);
 597         #endif
 598 }
 599 */
 600 static struct tps65910_board tps65910_data = {
 601         .irq    = (unsigned)TPS65910_HOST_IRQ,
 602         .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
 603         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
 604
 605         .pre_init = tps65910_pre_init,
 606         .post_init = tps65910_post_init,
 607
 608         //TPS65910_NUM_REGS = 13
 609         // Regulators
 610         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
 611         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
 612         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
 613         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
 614         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
 615         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
 616         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
 617         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
 618         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
 619         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
 620         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
 621         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
 622         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
 623
 624
 625 };
 626
 627 #endif
 628