rk31xx:modify udelay time when resume
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk30 / board-pmu-tps65910.c
1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
4 #include <mach/sram.h>
5 #include <linux/platform_device.h>
6
7 #include <mach/gpio.h>
8 #include <mach/iomux.h>
9
10 #ifdef CONFIG_MFD_TPS65910
11
12 extern int platform_device_register(struct platform_device *pdev);
13
14 int tps65910_pre_init(struct tps65910 *tps65910){
15
16         int val = 0;
17         int i   = 0;
18         int err = -1;
19                 
20         printk("%s,line=%d\n", __func__,__LINE__);      
21         
22         #ifdef CONFIG_RK_CONFIG
23         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
24                 printk(KERN_ERR "sram_gpio_init failed\n");
25                 return -EINVAL;
26         }
27         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
28                 printk(KERN_ERR "port_output_init failed\n");
29                 return -EINVAL;
30         }
31         #else
32         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
33                 printk(KERN_ERR "sram_gpio_init failed\n");
34                 return -EINVAL;
35         }
36
37         gpio_request(PMU_POWER_SLEEP, "NULL");
38         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
39         #endif
40
41
42         /*************set vdd11 (pll) voltage 1.0v********************/
43         val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
44         if (val<0) {
45                 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
46                 return val;
47         }
48         val &= (~(0x3<<2));
49         err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
50         if (err) {
51                 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
52                 return err;
53         }
54         /****************************************/
55         
56         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
57         if (val<0) {
58                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
59                 return val;
60         }
61         /* Set sleep state active high and allow device turn-off after PWRON long press */
62         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
63
64         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
65         if (err) {
66                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
67                 return err;
68         }
69         
70          #if 1
71         /* set PSKIP=0 */
72         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
73         if (val<0) {
74                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
75                 return val;
76         }
77
78         val &= ~DEVCTRL_DEV_OFF_MASK;
79         val &= ~DEVCTRL_DEV_SLP_MASK;
80         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
81         if (err) {
82                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
83                 return err;
84         }
85         #endif
86         /* Set the maxinum load current */
87         /* VDD1 */
88         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
89         if (val<0) {
90                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
91                 return val;
92         }
93
94         val |= (1<<5);          //when 1: 1.5 A
95         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
96         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
97         if (err) {
98                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
99                 return err;
100         }
101
102         /* VDD2 */
103         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
104         if (val<0) {
105                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
106                 return val;
107         }
108
109         val |= (1<<5);          //when 1: 1.5 A
110         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
111         if (err) {
112                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
113                 return err;
114         }
115
116         /* VIO */
117         val = tps65910_reg_read(tps65910, TPS65910_VIO);
118         if (val<0) {
119                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
120                 return -EIO;
121         }
122
123         val |= (1<<6);  //when 01: 1.0 A
124         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
125         if (err) {
126                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
127                 return err;
128         }
129         #if 1
130         /* Mask ALL interrupts */
131         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
132         if (err) {
133                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
134                 return err;
135         }
136         
137         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
138         if (err) {
139                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
140                 return err;
141         }
142
143         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
144         #if 1
145         val = 0;
146         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
147         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
148         if (err) {
149                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
150                 return err;
151         }
152         printk(KERN_INFO "TPS65910 Set default voltage.\n");
153         #endif
154         #if 0
155         //read sleep control register  for debug
156         for(i=0; i<6; i++)
157         {
158         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
159         if (err) {
160                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
161                 return -EIO;
162         }
163                 else
164                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
165         }
166         #endif
167
168         #if 1
169         //sleep control register
170         /*set func when in sleep mode */
171         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
172         if (val<0) {
173                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
174                 return val;
175         }
176         
177         val |= (1 << 1);
178         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
179         if (err) {
180                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181                                 \n", TPS65910_VDIG1);
182                 return err;
183         }
184         
185         /* open ldo when in sleep mode */
186         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
187         if (val<0) {
188                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
189                 return val;
190         }
191         
192         val &= 0;
193         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
194         if (err) {
195                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196                                 \n", TPS65910_VDIG1);
197                 return err;
198         }
199                 
200         /*set dc mode when in sleep mode */
201         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
202         if (val<0) {
203                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
204                 return val;
205         }
206         
207         val  |= 0xff;
208         val  &= ~(0x07);   //set vdd1 vdd2 vio in pfm mode when in sleep
209         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
210         if (err) {
211                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
212                                 \n", TPS65910_VDIG1);
213                 return err;
214         }
215         
216         /*close ldo when in sleep mode */
217         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
218         if (val<0) {
219                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
220                 return val;
221         }
222         
223         val |= 0x0b;
224         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
225         if (err) {
226                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
227                                 \n", TPS65910_VDIG1);
228                 return err;
229         }
230         #endif
231         #if 0
232         //read sleep control register  for debug
233         for(i=0; i<6; i++)
234         {
235         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
236         if (err) {
237                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
238                 return -EIO;
239         }
240                 else
241                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
242         }
243         #endif
244         #endif
245         
246         /**********************set arm in pwm ****************/
247           val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
248         if (val<0) {
249                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
250                 return val;
251         }
252         
253         val &= ~(1<<4);
254         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
255         if (err) {
256                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
257                                 \n", TPS65910_VDIG1);
258                 return err;
259         }       
260         /************************************************/
261         
262         printk("%s,line=%d\n", __func__,__LINE__);
263         return 0;
264
265 }
266 int tps65910_post_init(struct tps65910 *tps65910)
267 {
268         struct regulator *dcdc;
269         struct regulator *ldo;
270         int i=0;
271         printk("%s,line=%d\n", __func__,__LINE__);
272
273         g_pmic_type = PMIC_TYPE_TPS65910;
274         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
275
276         #ifdef CONFIG_RK30_PWM_REGULATOR
277         platform_device_register(&pwm_regulator_device[0]);
278         #endif
279
280         for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
281         {
282         dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
283         regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
284         regulator_enable(dcdc);
285         printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
286         regulator_put(dcdc);
287         udelay(100);
288         }
289         
290         for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
291         {
292         ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
293         regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
294         regulator_enable(ldo);
295         //printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
296         regulator_put(ldo);
297         }
298
299         printk("%s,line=%d END\n", __func__,__LINE__);
300         
301         return 0;
302 }
303
304 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
305         {
306                 .supply = "vdd1",
307         },
308         #if defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188)
309         {
310                 .supply = "vdd_core",
311         },
312         #else
313         {
314                 .supply = "vdd_cpu",
315         },
316         #endif
317 };
318 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
319         {
320                 .supply = "vdd2",
321         },
322         
323 };
324 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
325         {
326                 .supply = "vdd3",
327         },
328 };
329 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
330         {
331                 .supply = "vio",
332         },
333 };
334 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
335         {
336                 .supply = "vdig1",
337         },
338 };
339 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
340         {
341                 .supply = "vdig2",
342         },
343 };
344
345 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
346         {
347                 .supply = "vaux1",
348         },
349 };
350 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
351         {
352                 .supply = "vaux2",
353         },
354 };
355 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
356         {
357                 .supply = "vaux33",
358         },
359 };
360 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
361         {
362                 .supply = "vmmc",
363         },
364 };
365 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
366         {
367                 .supply = "vdac",
368         },
369 };
370
371 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
372         {
373                 .supply = "vpll",
374         },
375 };
376
377 static struct regulator_init_data tps65910_smps1 = {
378         .constraints = {
379                 .name           = "VDD1",
380                 .min_uV                 = 600000,
381                 .max_uV                 = 1500000,
382                 .apply_uV               = 1,
383                 .always_on = 1,
384                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
385                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
386
387         },
388         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
389         .consumer_supplies =  tps65910_smps1_supply,
390 };
391
392 /* */
393 static struct regulator_init_data tps65910_smps2 = {
394         .constraints = {
395                 .name           = "VDD2",
396                 .min_uV                 = 600000,
397                 .max_uV                 = 1500000,
398                 .apply_uV               = 1,
399                 .always_on = 1,
400                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
401                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
402
403         },
404         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
405         .consumer_supplies =  tps65910_smps2_supply,
406 };
407
408 /* */
409 static struct regulator_init_data tps65910_smps3 = {
410         .constraints = {
411                 .name           = "VDD3",
412                 .min_uV                 = 1000000,
413                 .max_uV                 = 1400000,
414                 .apply_uV               = 1,
415                 .always_on = 1,
416                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
417                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
418
419         },
420         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
421         .consumer_supplies =  tps65910_smps3_supply,
422 };
423
424 static struct regulator_init_data tps65910_smps4 = {
425         .constraints = {
426                 .name           = "VIO",
427                 .min_uV                 = 1800000,
428                 .max_uV                 = 3300000,
429                 .apply_uV               = 1,
430                 .always_on = 1,
431                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
432                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
433
434         },
435         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
436         .consumer_supplies =  tps65910_smps4_supply,
437 };
438 static struct regulator_init_data tps65910_ldo1 = {
439         .constraints = {
440                 .name           = "VDIG1",
441                 .min_uV                 = 1200000,
442                 .max_uV                 = 2700000,
443                 .apply_uV               = 1,
444                 
445                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
446                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
447
448         },
449         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
450         .consumer_supplies =  tps65910_ldo1_supply,
451 };
452
453 /* */
454 static struct regulator_init_data tps65910_ldo2 = {
455         .constraints = {
456                 .name           = "VDIG2",
457                 .min_uV                 = 1000000,
458                 .max_uV                 = 1800000,
459                 .apply_uV               = 1,
460                 
461                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
462                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
463
464         },
465         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
466         .consumer_supplies =  tps65910_ldo2_supply,
467 };
468
469 /* */
470 static struct regulator_init_data tps65910_ldo3 = {
471         .constraints = {
472                 .name           = "VAUX1",
473                 .min_uV                 = 1800000,
474                 .max_uV                 = 3300000,
475                 .apply_uV               = 1,
476                 
477                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
478                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
479
480         },
481         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
482         .consumer_supplies =  tps65910_ldo3_supply,
483 };
484
485 /* */
486 static struct regulator_init_data tps65910_ldo4 = {
487         .constraints = {
488                 .name           = "VAUX2",
489                 .min_uV                 = 1800000,
490                 .max_uV                 = 3300000,
491                 .apply_uV               = 1,
492                 
493                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
494                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
495
496         },
497         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
498         .consumer_supplies =  tps65910_ldo4_supply,
499 };
500
501 /* */
502 static struct regulator_init_data tps65910_ldo5 = {
503         .constraints = {
504                 .name           = "VAUX33",
505                 .min_uV                 = 1800000,
506                 .max_uV                 = 3300000,
507                 .apply_uV               = 1,
508                 
509                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
510                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
511
512         },
513         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
514         .consumer_supplies =  tps65910_ldo5_supply,
515 };
516
517 /* */
518 static struct regulator_init_data tps65910_ldo6 = {
519         .constraints = {
520                 .name           = "VMMC",
521                 .min_uV                 = 1800000,
522                 .max_uV                 = 3300000,
523                 .apply_uV               = 1,
524                 
525                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
526                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
527
528         },
529         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
530         .consumer_supplies =  tps65910_ldo6_supply,
531 };
532
533 /* */
534 static struct regulator_init_data tps65910_ldo7 = {
535         .constraints = {
536                 .name           = "VDAC",
537                 .min_uV                 = 1800000,
538                 .max_uV                 = 2850000,
539                 .apply_uV               = 1,
540                 
541                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
542                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
543
544         },
545         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
546         .consumer_supplies =  tps65910_ldo7_supply,
547 };
548
549 /* */
550 static struct regulator_init_data tps65910_ldo8 = {
551         .constraints = {
552                 .name           = "VPLL",
553                 .min_uV                 = 1000000,
554                 .max_uV                 = 2500000,
555                 .apply_uV               = 1,
556                 .always_on = 1,
557                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
558                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
559
560         },
561         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
562         .consumer_supplies =  tps65910_ldo8_supply,
563 };
564
565 void __sramfunc board_pmu_tps65910_suspend(void)
566 {       
567         #ifdef CONFIG_CLK_SWITCH_TO_32K
568          sram_gpio_set_value(pmic_sleep, GPIO_HIGH);  
569         #endif
570 }
571 void __sramfunc board_pmu_tps65910_resume(void)
572 {
573         #ifdef CONFIG_CLK_SWITCH_TO_32K
574         sram_gpio_set_value(pmic_sleep, GPIO_LOW);  
575         sram_32k_udelay(2000);
576         #endif
577 }
578 static struct tps65910_board tps65910_data = {
579         .irq    = (unsigned)TPS65910_HOST_IRQ,          
580         .irq_base = IRQ_BOARD_BASE,
581         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
582         
583         .pre_init = tps65910_pre_init,
584         .post_init = tps65910_post_init,
585
586         //TPS65910_NUM_REGS = 13
587         // Regulators
588         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,             
589         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
590         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
591         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
592         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
593         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
594         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
595         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
596         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
597         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
598         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
599         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
600         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
601
602  
603 };
604
605 #endif
606