1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
5 #include <linux/platform_device.h>
8 #include <mach/iomux.h>
10 #ifdef CONFIG_MFD_TPS65910
12 extern int platform_device_register(struct platform_device *pdev);
14 int tps65910_pre_init(struct tps65910 *tps65910){
20 printk("%s,line=%d\n", __func__,__LINE__);
22 #ifdef CONFIG_RK_CONFIG
23 if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
24 printk(KERN_ERR "sram_gpio_init failed\n");
27 if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
28 printk(KERN_ERR "port_output_init failed\n");
32 if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
33 printk(KERN_ERR "sram_gpio_init failed\n");
37 gpio_request(PMU_POWER_SLEEP, "NULL");
38 gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
42 /*************set vdd11 (pll) voltage 1.0v********************/
43 val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
45 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
49 err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
51 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
54 /****************************************/
56 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
58 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
61 /* Set sleep state active high and allow device turn-off after PWRON long press */
62 val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
64 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
66 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
72 val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
74 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
78 val &= ~DEVCTRL_DEV_OFF_MASK;
79 val &= ~DEVCTRL_DEV_SLP_MASK;
80 err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
82 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
86 /* Set the maxinum load current */
88 val = tps65910_reg_read(tps65910, TPS65910_VDD1);
90 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
94 val |= (1<<5); //when 1: 1.5 A
95 val |= (0x07<<2); //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
96 err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
98 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
103 val = tps65910_reg_read(tps65910, TPS65910_VDD2);
105 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
109 val |= (1<<5); //when 1: 1.5 A
110 err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
112 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
117 val = tps65910_reg_read(tps65910, TPS65910_VIO);
119 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
123 val |= (1<<6); //when 01: 1.0 A
124 err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
126 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
130 /* Mask ALL interrupts */
131 err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
133 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
137 err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
139 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
143 /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
146 val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
147 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
149 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
152 printk(KERN_INFO "TPS65910 Set default voltage.\n");
155 //read sleep control register for debug
158 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
160 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
164 printk("%s.......is 0x%04x\n",__FUNCTION__,val);
169 //sleep control register
170 /*set func when in sleep mode */
171 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
173 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
178 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
180 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181 \n", TPS65910_VDIG1);
185 /* open ldo when in sleep mode */
186 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
188 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
193 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
195 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196 \n", TPS65910_VDIG1);
200 /*set dc mode when in sleep mode */
201 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
203 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
208 val &= ~(0x07); //set vdd1 vdd2 vio in pfm mode when in sleep
209 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
211 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
212 \n", TPS65910_VDIG1);
216 /*close ldo when in sleep mode */
217 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
219 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
224 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
226 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
227 \n", TPS65910_VDIG1);
232 //read sleep control register for debug
235 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
237 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
241 printk("%s.......is 0x%4x\n",__FUNCTION__,val);
246 /**********************set arm in pwm ****************/
247 val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
249 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
254 err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
256 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
257 \n", TPS65910_VDIG1);
260 /************************************************/
262 printk("%s,line=%d\n", __func__,__LINE__);
266 int tps65910_post_init(struct tps65910 *tps65910)
268 struct regulator *dcdc;
269 struct regulator *ldo;
271 printk("%s,line=%d\n", __func__,__LINE__);
273 g_pmic_type = PMIC_TYPE_TPS65910;
274 printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
276 #ifdef CONFIG_RK30_PWM_REGULATOR
277 platform_device_register(&pwm_regulator_device[0]);
280 for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
282 dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
283 regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
284 regulator_enable(dcdc);
285 printk("%s %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
290 for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
292 ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
293 regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
294 regulator_enable(ldo);
295 //printk("%s %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
299 printk("%s,line=%d END\n", __func__,__LINE__);
304 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
308 #if defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188)
310 .supply = "vdd_core",
318 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
324 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
329 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
334 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
339 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
345 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
350 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
355 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
360 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
365 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
371 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
377 static struct regulator_init_data tps65910_smps1 = {
384 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
385 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
388 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
389 .consumer_supplies = tps65910_smps1_supply,
393 static struct regulator_init_data tps65910_smps2 = {
400 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
401 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
404 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
405 .consumer_supplies = tps65910_smps2_supply,
409 static struct regulator_init_data tps65910_smps3 = {
416 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
417 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
420 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
421 .consumer_supplies = tps65910_smps3_supply,
424 static struct regulator_init_data tps65910_smps4 = {
431 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
432 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
435 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
436 .consumer_supplies = tps65910_smps4_supply,
438 static struct regulator_init_data tps65910_ldo1 = {
445 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
446 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
449 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
450 .consumer_supplies = tps65910_ldo1_supply,
454 static struct regulator_init_data tps65910_ldo2 = {
461 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
462 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
465 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
466 .consumer_supplies = tps65910_ldo2_supply,
470 static struct regulator_init_data tps65910_ldo3 = {
477 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
478 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
481 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
482 .consumer_supplies = tps65910_ldo3_supply,
486 static struct regulator_init_data tps65910_ldo4 = {
493 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
494 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
497 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
498 .consumer_supplies = tps65910_ldo4_supply,
502 static struct regulator_init_data tps65910_ldo5 = {
509 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
510 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
513 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
514 .consumer_supplies = tps65910_ldo5_supply,
518 static struct regulator_init_data tps65910_ldo6 = {
525 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
526 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
529 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
530 .consumer_supplies = tps65910_ldo6_supply,
534 static struct regulator_init_data tps65910_ldo7 = {
541 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
542 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
545 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
546 .consumer_supplies = tps65910_ldo7_supply,
550 static struct regulator_init_data tps65910_ldo8 = {
557 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
558 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
561 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
562 .consumer_supplies = tps65910_ldo8_supply,
565 void __sramfunc board_pmu_tps65910_suspend(void)
567 #ifdef CONFIG_CLK_SWITCH_TO_32K
568 sram_gpio_set_value(pmic_sleep, GPIO_HIGH);
571 void __sramfunc board_pmu_tps65910_resume(void)
573 #ifdef CONFIG_CLK_SWITCH_TO_32K
574 sram_gpio_set_value(pmic_sleep, GPIO_LOW);
575 sram_32k_udelay(2000);
578 static struct tps65910_board tps65910_data = {
579 .irq = (unsigned)TPS65910_HOST_IRQ,
580 .irq_base = IRQ_BOARD_BASE,
581 .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
583 .pre_init = tps65910_pre_init,
584 .post_init = tps65910_post_init,
586 //TPS65910_NUM_REGS = 13
588 .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
589 .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
590 .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
591 .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
592 .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
593 .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
594 .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
595 .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
596 .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
597 .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
598 .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
599 .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
600 .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,