rk3066b:rk2928:pmu voltage initial and pmu_sleep io initial
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk30 / board-pmu-tps65910.c
1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
4 #include <mach/sram.h>
5 #include <linux/platform_device.h>
6
7 #include <mach/gpio.h>
8 #include <mach/iomux.h>
9
10 #ifdef CONFIG_MFD_TPS65910
11
12 extern int platform_device_register(struct platform_device *pdev);
13
14 int tps65910_pre_init(struct tps65910 *tps65910){
15
16         int val = 0;
17         int i   = 0;
18         int err = -1;
19                 
20         printk("%s,line=%d\n", __func__,__LINE__);      
21         
22         #ifdef CONFIG_RK_CONFIG
23         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
24                 printk(KERN_ERR "sram_gpio_init failed\n");
25                 return -EINVAL;
26         }
27         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
28                 printk(KERN_ERR "port_output_init failed\n");
29                 return -EINVAL;
30         }
31         #else
32         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
33                 printk(KERN_ERR "sram_gpio_init failed\n");
34                 return -EINVAL;
35         }
36
37         gpio_request(PMU_POWER_SLEEP, "NULL");
38         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
39         #endif
40
41
42         /*************set vdd11 (pll) voltage 1.0v********************/
43         val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
44         if (val<0) {
45                 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
46                 return val;
47         }
48         val &= (~(0x3<<2));
49         err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
50         if (err) {
51                 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
52                 return err;
53         }
54         /****************************************/
55         
56         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
57         if (val<0) {
58                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
59                 return val;
60         }
61         /* Set sleep state active high and allow device turn-off after PWRON long press */
62         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
63
64         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
65         if (err) {
66                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
67                 return err;
68         }
69         
70          #if 1
71         /* set PSKIP=0 */
72         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
73         if (val<0) {
74                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
75                 return val;
76         }
77
78         val &= ~DEVCTRL_DEV_OFF_MASK;
79         val &= ~DEVCTRL_DEV_SLP_MASK;
80         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
81         if (err) {
82                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
83                 return err;
84         }
85         #endif
86         /* Set the maxinum load current */
87         /* VDD1 */
88         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
89         if (val<0) {
90                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
91                 return val;
92         }
93
94         val |= (1<<5);          //when 1: 1.5 A
95         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
96         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
97         if (err) {
98                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
99                 return err;
100         }
101
102         /* VDD2 */
103         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
104         if (val<0) {
105                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
106                 return val;
107         }
108
109         val |= (1<<5);          //when 1: 1.5 A
110         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
111         if (err) {
112                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
113                 return err;
114         }
115
116         /* VIO */
117         val = tps65910_reg_read(tps65910, TPS65910_VIO);
118         if (val<0) {
119                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
120                 return -EIO;
121         }
122
123         val |= (1<<6);  //when 01: 1.0 A
124         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
125         if (err) {
126                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
127                 return err;
128         }
129         #if 1
130         /* Mask ALL interrupts */
131         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
132         if (err) {
133                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
134                 return err;
135         }
136         
137         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
138         if (err) {
139                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
140                 return err;
141         }
142
143         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
144         #if 1
145         val = 0;
146         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
147         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
148         if (err) {
149                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
150                 return err;
151         }
152         printk(KERN_INFO "TPS65910 Set default voltage.\n");
153         #endif
154         #if 0
155         //read sleep control register  for debug
156         for(i=0; i<6; i++)
157         {
158         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
159         if (err) {
160                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
161                 return -EIO;
162         }
163                 else
164                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
165         }
166         #endif
167
168         #if 1
169         //sleep control register
170         /*set func when in sleep mode */
171         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
172         if (val<0) {
173                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
174                 return val;
175         }
176         
177         val |= (1 << 1);
178         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
179         if (err) {
180                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181                                 \n", TPS65910_VDIG1);
182                 return err;
183         }
184         
185         /* open ldo when in sleep mode */
186         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
187         if (val<0) {
188                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
189                 return val;
190         }
191         
192         val &= 0;
193         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
194         if (err) {
195                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196                                 \n", TPS65910_VDIG1);
197                 return err;
198         }
199                 
200         /*set dc mode when in sleep mode */
201         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
202         if (val<0) {
203                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
204                 return val;
205         }
206         
207         val  |= 0xff;
208         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
209         if (err) {
210                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
211                                 \n", TPS65910_VDIG1);
212                 return err;
213         }
214         
215         /*close ldo when in sleep mode */
216         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
217         if (val<0) {
218                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
219                 return val;
220         }
221         
222         val |= 0x0b;
223         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
224         if (err) {
225                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
226                                 \n", TPS65910_VDIG1);
227                 return err;
228         }
229         #endif
230         #if 0
231         //read sleep control register  for debug
232         for(i=0; i<6; i++)
233         {
234         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
235         if (err) {
236                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
237                 return -EIO;
238         }
239                 else
240                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
241         }
242         #endif
243         #endif
244         printk("%s,line=%d\n", __func__,__LINE__);
245         return 0;
246
247 }
248 int tps65910_post_init(struct tps65910 *tps65910)
249 {
250         struct regulator *dcdc;
251         struct regulator *ldo;
252         int i=0;
253         printk("%s,line=%d\n", __func__,__LINE__);
254
255         g_pmic_type = PMIC_TYPE_TPS65910;
256         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
257
258         #ifdef CONFIG_RK30_PWM_REGULATOR
259         platform_device_register(&pwm_regulator_device[0]);
260         #endif
261
262         for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
263         {
264         dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
265         regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
266         regulator_enable(dcdc);
267         printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
268         regulator_put(dcdc);
269         udelay(100);
270         }
271         
272         for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
273         {
274         ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
275         regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
276         regulator_enable(ldo);
277         //printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
278         regulator_put(ldo);
279         }
280
281         printk("%s,line=%d END\n", __func__,__LINE__);
282         
283         return 0;
284 }
285
286 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
287         {
288                 .supply = "vdd1",
289         },
290         {
291                 .supply = "vdd_cpu",
292         },
293 };
294 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
295         {
296                 .supply = "vdd2",
297         },
298         
299 };
300 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
301         {
302                 .supply = "vdd3",
303         },
304 };
305 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
306         {
307                 .supply = "vio",
308         },
309 };
310 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
311         {
312                 .supply = "vdig1",
313         },
314 };
315 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
316         {
317                 .supply = "vdig2",
318         },
319 };
320
321 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
322         {
323                 .supply = "vaux1",
324         },
325 };
326 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
327         {
328                 .supply = "vaux2",
329         },
330 };
331 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
332         {
333                 .supply = "vaux33",
334         },
335 };
336 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
337         {
338                 .supply = "vmmc",
339         },
340 };
341 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
342         {
343                 .supply = "vdac",
344         },
345 };
346
347 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
348         {
349                 .supply = "vpll",
350         },
351 };
352
353 static struct regulator_init_data tps65910_smps1 = {
354         .constraints = {
355                 .name           = "VDD1",
356                 .min_uV                 = 600000,
357                 .max_uV                 = 1500000,
358                 .apply_uV               = 1,
359                 .always_on = 1,
360                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
361                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
362
363         },
364         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
365         .consumer_supplies =  tps65910_smps1_supply,
366 };
367
368 /* */
369 static struct regulator_init_data tps65910_smps2 = {
370         .constraints = {
371                 .name           = "VDD2",
372                 .min_uV                 = 600000,
373                 .max_uV                 = 1500000,
374                 .apply_uV               = 1,
375                 .always_on = 1,
376                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
377                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
378
379         },
380         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
381         .consumer_supplies =  tps65910_smps2_supply,
382 };
383
384 /* */
385 static struct regulator_init_data tps65910_smps3 = {
386         .constraints = {
387                 .name           = "VDD3",
388                 .min_uV                 = 1000000,
389                 .max_uV                 = 1400000,
390                 .apply_uV               = 1,
391                 .always_on = 1,
392                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
393                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
394
395         },
396         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
397         .consumer_supplies =  tps65910_smps3_supply,
398 };
399
400 static struct regulator_init_data tps65910_smps4 = {
401         .constraints = {
402                 .name           = "VIO",
403                 .min_uV                 = 1800000,
404                 .max_uV                 = 3300000,
405                 .apply_uV               = 1,
406                 .always_on = 1,
407                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
408                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
409
410         },
411         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
412         .consumer_supplies =  tps65910_smps4_supply,
413 };
414 static struct regulator_init_data tps65910_ldo1 = {
415         .constraints = {
416                 .name           = "VDIG1",
417                 .min_uV                 = 1200000,
418                 .max_uV                 = 2700000,
419                 .apply_uV               = 1,
420                 
421                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
422                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
423
424         },
425         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
426         .consumer_supplies =  tps65910_ldo1_supply,
427 };
428
429 /* */
430 static struct regulator_init_data tps65910_ldo2 = {
431         .constraints = {
432                 .name           = "VDIG2",
433                 .min_uV                 = 1000000,
434                 .max_uV                 = 1800000,
435                 .apply_uV               = 1,
436                 
437                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
438                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
439
440         },
441         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
442         .consumer_supplies =  tps65910_ldo2_supply,
443 };
444
445 /* */
446 static struct regulator_init_data tps65910_ldo3 = {
447         .constraints = {
448                 .name           = "VAUX1",
449                 .min_uV                 = 1800000,
450                 .max_uV                 = 3300000,
451                 .apply_uV               = 1,
452                 
453                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
454                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
455
456         },
457         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
458         .consumer_supplies =  tps65910_ldo3_supply,
459 };
460
461 /* */
462 static struct regulator_init_data tps65910_ldo4 = {
463         .constraints = {
464                 .name           = "VAUX2",
465                 .min_uV                 = 1800000,
466                 .max_uV                 = 3300000,
467                 .apply_uV               = 1,
468                 
469                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
470                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
471
472         },
473         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
474         .consumer_supplies =  tps65910_ldo4_supply,
475 };
476
477 /* */
478 static struct regulator_init_data tps65910_ldo5 = {
479         .constraints = {
480                 .name           = "VAUX33",
481                 .min_uV                 = 1800000,
482                 .max_uV                 = 3300000,
483                 .apply_uV               = 1,
484                 
485                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
486                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
487
488         },
489         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
490         .consumer_supplies =  tps65910_ldo5_supply,
491 };
492
493 /* */
494 static struct regulator_init_data tps65910_ldo6 = {
495         .constraints = {
496                 .name           = "VMMC",
497                 .min_uV                 = 1800000,
498                 .max_uV                 = 3300000,
499                 .apply_uV               = 1,
500                 
501                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
502                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
503
504         },
505         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
506         .consumer_supplies =  tps65910_ldo6_supply,
507 };
508
509 /* */
510 static struct regulator_init_data tps65910_ldo7 = {
511         .constraints = {
512                 .name           = "VDAC",
513                 .min_uV                 = 1800000,
514                 .max_uV                 = 2850000,
515                 .apply_uV               = 1,
516                 
517                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
518                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
519
520         },
521         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
522         .consumer_supplies =  tps65910_ldo7_supply,
523 };
524
525 /* */
526 static struct regulator_init_data tps65910_ldo8 = {
527         .constraints = {
528                 .name           = "VPLL",
529                 .min_uV                 = 1000000,
530                 .max_uV                 = 2500000,
531                 .apply_uV               = 1,
532                 .always_on = 1,
533                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
534                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
535
536         },
537         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
538         .consumer_supplies =  tps65910_ldo8_supply,
539 };
540
541 void __sramfunc board_pmu_tps65910_suspend(void)
542 {       
543          sram_gpio_set_value(pmic_sleep, GPIO_HIGH);  
544 }
545 void __sramfunc board_pmu_tps65910_resume(void)
546 {
547         sram_gpio_set_value(pmic_sleep, GPIO_LOW);  
548         sram_udelay(2000);
549 }
550 static struct tps65910_board tps65910_data = {
551         .irq    = (unsigned)TPS65910_HOST_IRQ,          
552         .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
553         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
554         
555         .pre_init = tps65910_pre_init,
556         .post_init = tps65910_post_init,
557
558         //TPS65910_NUM_REGS = 13
559         // Regulators
560         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,             
561         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
562         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
563         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
564         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
565         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
566         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
567         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
568         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
569         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
570         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
571         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
572         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
573
574  
575 };
576
577 #endif
578