arch/arm/mach-rk30/board-pmu-tps65910.c

   1 #include <linux/regulator/machine.h>
   2 #include <linux/i2c/twl.h>
   3 #include <linux/mfd/tps65910.h>
   4 #include <mach/sram.h>
   5 #include <linux/platform_device.h>
   6
   7 #include <mach/gpio.h>
   8 #include <mach/iomux.h>
   9
  10 #ifdef CONFIG_MFD_TPS65910
  11
  12 extern int platform_device_register(struct platform_device *pdev);
  13
  14 int tps65910_pre_init(struct tps65910 *tps65910){
  15
  16         int val = 0;
  17         int err = -1;
  18
  19         printk("%s,line=%d\n", __func__,__LINE__);
  20
  21         #ifdef CONFIG_RK_CONFIG
  22         if(sram_gpio_init(get_port_config(pmic_slp).gpio, &pmic_sleep) < 0){
  23                 printk(KERN_ERR "sram_gpio_init failed\n");
  24                 return -EINVAL;
  25         }
  26         if(port_output_init(pmic_slp, 0, "pmic_slp") < 0){
  27                 printk(KERN_ERR "port_output_init failed\n");
  28                 return -EINVAL;
  29         }
  30         #else
  31         if(sram_gpio_init(PMU_POWER_SLEEP, &pmic_sleep) < 0){
  32                 printk(KERN_ERR "sram_gpio_init failed\n");
  33                 return -EINVAL;
  34         }
  35
  36         gpio_request(PMU_POWER_SLEEP, "NULL");
  37         gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
  38         #endif
  39
  40
  41         /*************set vdd11 (pll) voltage 1.0v********************/
  42         val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
  43         if (val<0) {
  44                 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
  45                 return val;
  46         }
  47         val &= (~(0x3<<2));
  48         err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
  49         if (err) {
  50                 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
  51                 return err;
  52         }
  53         /****************************************/
  54
  55         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
  56         if (val<0) {
  57                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
  58                 return val;
  59         }
  60         /* Set sleep state active high and allow device turn-off after PWRON long press */
  61         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
  62
  63         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
  64         if (err) {
  65                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
  66                 return err;
  67         }
  68
  69          #if 1
  70         /* set PSKIP=0 */
  71         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
  72         if (val<0) {
  73                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
  74                 return val;
  75         }
  76
  77         val &= ~DEVCTRL_DEV_OFF_MASK;
  78         val &= ~DEVCTRL_DEV_SLP_MASK;
  79         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
  80         if (err) {
  81                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
  82                 return err;
  83         }
  84         #endif
  85         /* Set the maxinum load current */
  86         /* VDD1 */
  87         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
  88         if (val<0) {
  89                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
  90                 return val;
  91         }
  92
  93         val |= (1<<5);          //when 1: 1.5 A
  94         val &= (~(0x3 <<2));
  95         val |= (0x01<<2);       //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
  96         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
  97         if (err) {
  98                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
  99                 return err;
 100         }
 101
 102         /* VDD2 */
 103         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
 104         if (val<0) {
 105                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
 106                 return val;
 107         }
 108
 109         val |= (1<<5);          //when 1: 1.5 A
 110         val &= (~(0x3 <<2));
 111         val |= (0x01<<2);       //TSTEP[3:2] = 01 : 12.5 mV/us(sampling 3 Mhz)
 112         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
 113         if (err) {
 114                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
 115                 return err;
 116         }
 117
 118         /* VIO */
 119         val = tps65910_reg_read(tps65910, TPS65910_VIO);
 120         if (val<0) {
 121                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
 122                 return -EIO;
 123         }
 124
 125         val |= (1<<6);  //when 01: 1.0 A
 126         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
 127         if (err) {
 128                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
 129                 return err;
 130         }
 131         #if 1
 132         /* Mask ALL interrupts */
 133         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
 134         if (err) {
 135                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
 136                 return err;
 137         }
 138
 139         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
 140         if (err) {
 141                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
 142                 return err;
 143         }
 144
 145         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
 146         #if 1
 147         val = 0;
 148         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
 149         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 150         if (err) {
 151                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
 152                 return err;
 153         }
 154         printk(KERN_INFO "TPS65910 Set default voltage.\n");
 155         #endif
 156         #if 0
 157         //read sleep control register  for debug
 158         for(i=0; i<6; i++)
 159         {
 160         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 161         if (err) {
 162                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 163                 return -EIO;
 164         }
 165                 else
 166                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
 167         }
 168         #endif
 169
 170         #if 1
 171         //sleep control register
 172         /*set func when in sleep mode */
 173         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
 174         if (val<0) {
 175                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 176                 return val;
 177         }
 178
 179         val |= (1 << 1);
 180         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
 181         if (err) {
 182                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 183                                 \n", TPS65910_VDIG1);
 184                 return err;
 185         }
 186
 187         /* open ldo when in sleep mode */
 188         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
 189         if (val<0) {
 190                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 191                 return val;
 192         }
 193
 194         val &= 0;
 195         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
 196         if (err) {
 197                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 198                                 \n", TPS65910_VDIG1);
 199                 return err;
 200         }
 201
 202         /*set dc mode when in sleep mode */
 203         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
 204         if (val<0) {
 205                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 206                 return val;
 207         }
 208
 209         val  |= 0xff;
 210         val  &= ~(0x07);   //set vdd1 vdd2 vio in pfm mode when in sleep
 211         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
 212         if (err) {
 213                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 214                                 \n", TPS65910_VDIG1);
 215                 return err;
 216         }
 217
 218         /*close ldo when in sleep mode */
 219         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
 220         if (val<0) {
 221                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 222                 return val;
 223         }
 224
 225         val |= 0x0b;
 226         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
 227         if (err) {
 228                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 229                                 \n", TPS65910_VDIG1);
 230                 return err;
 231         }
 232         #endif
 233         #if 0
 234         //read sleep control register  for debug
 235         for(i=0; i<6; i++)
 236         {
 237         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
 238         if (err) {
 239                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 240                 return -EIO;
 241         }
 242                 else
 243                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
 244         }
 245         #endif
 246         #endif
 247
 248         /*****************set arm  and logic (dc1&dc2)in pwm ****************/
 249           val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
 250         if (val<0) {
 251                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
 252                 return val;
 253         }
 254
 255         val &= ~(3<<4);
 256         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
 257         if (err) {
 258                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
 259                                 \n", TPS65910_VDIG1);
 260                 return err;
 261         }
 262         /************************************************/
 263
 264         printk("%s,line=%d\n", __func__,__LINE__);
 265         return 0;
 266
 267 }
 268 int tps65910_post_init(struct tps65910 *tps65910)
 269 {
 270         struct regulator *dcdc;
 271         struct regulator *ldo;
 272         int i=0;
 273         printk("%s,line=%d\n", __func__,__LINE__);
 274
 275         g_pmic_type = PMIC_TYPE_TPS65910;
 276         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
 277
 278         #ifdef CONFIG_RK30_PWM_REGULATOR
 279         platform_device_register(&pwm_regulator_device[0]);
 280         #endif
 281
 282         for(i = 0; i < ARRAY_SIZE(tps65910_dcdc_info); i++)
 283         {
 284         dcdc =regulator_get(NULL, tps65910_dcdc_info[i].name);
 285         regulator_set_voltage(dcdc, tps65910_dcdc_info[i].min_uv, tps65910_dcdc_info[i].max_uv);
 286         regulator_enable(dcdc);
 287         printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(dcdc));
 288         regulator_put(dcdc);
 289         udelay(100);
 290         }
 291
 292         for(i = 0; i < ARRAY_SIZE(tps65910_ldo_info); i++)
 293         {
 294         ldo =regulator_get(NULL, tps65910_ldo_info[i].name);
 295         regulator_set_voltage(ldo, tps65910_ldo_info[i].min_uv, tps65910_ldo_info[i].max_uv);
 296         regulator_enable(ldo);
 297         //printk("%s  %s =%dmV end\n", __func__,tps65910_dcdc_info[i].name, regulator_get_voltage(ldo));
 298         regulator_put(ldo);
 299         }
 300
 301         printk("%s,line=%d END\n", __func__,__LINE__);
 302
 303         return 0;
 304 }
 305
 306 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
 307         {
 308                 .supply = "vdd1",
 309         },
 310         #if defined(CONFIG_SOC_RK3168) || defined(CONFIG_ARCH_RK3188) || defined(CONFIG_SOC_RK3028)
 311         {
 312                 .supply = "vdd_core",
 313         },
 314         #else
 315         {
 316                 .supply = "vdd_cpu",
 317         },
 318         #endif
 319 };
 320 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
 321         {
 322                 .supply = "vdd2",
 323         },
 324         #if defined(CONFIG_MACH_RK3168_86V) || defined(CONFIG_SOC_RK3028)
 325         {
 326                 .supply = "vdd_cpu",
 327         },
 328         #endif
 329 };
 330 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
 331         {
 332                 .supply = "vdd3",
 333         },
 334 };
 335 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
 336         {
 337                 .supply = "vio",
 338         },
 339 };
 340 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
 341         {
 342                 .supply = "vdig1",
 343         },
 344 };
 345 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
 346         {
 347                 .supply = "vdig2",
 348         },
 349 };
 350
 351 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
 352         {
 353                 .supply = "vaux1",
 354         },
 355 };
 356 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
 357         {
 358                 .supply = "vaux2",
 359         },
 360 };
 361 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
 362         {
 363                 .supply = "vaux33",
 364         },
 365 };
 366 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
 367         {
 368                 .supply = "vmmc",
 369         },
 370 };
 371 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
 372         {
 373                 .supply = "vdac",
 374         },
 375 };
 376
 377 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
 378         {
 379                 .supply = "vpll",
 380         },
 381 };
 382
 383 static struct regulator_init_data tps65910_smps1 = {
 384         .constraints = {
 385                 .name           = "VDD1",
 386                 .min_uV                 = 600000,
 387                 .max_uV                 = 1500000,
 388                 .apply_uV               = 1,
 389                 .always_on = 1,
 390                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 391                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 392
 393         },
 394         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
 395         .consumer_supplies =  tps65910_smps1_supply,
 396 };
 397
 398 /* */
 399 static struct regulator_init_data tps65910_smps2 = {
 400         .constraints = {
 401                 .name           = "VDD2",
 402                 .min_uV                 = 600000,
 403                 .max_uV                 = 1500000,
 404                 .apply_uV               = 1,
 405                 .always_on = 1,
 406                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 407                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 408
 409         },
 410         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
 411         .consumer_supplies =  tps65910_smps2_supply,
 412 };
 413
 414 /* */
 415 static struct regulator_init_data tps65910_smps3 = {
 416         .constraints = {
 417                 .name           = "VDD3",
 418                 .min_uV                 = 1000000,
 419                 .max_uV                 = 1400000,
 420                 .apply_uV               = 1,
 421                 .always_on = 1,
 422                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 423                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 424
 425         },
 426         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
 427         .consumer_supplies =  tps65910_smps3_supply,
 428 };
 429
 430 static struct regulator_init_data tps65910_smps4 = {
 431         .constraints = {
 432                 .name           = "VIO",
 433                 .min_uV                 = 1800000,
 434                 .max_uV                 = 3300000,
 435                 .apply_uV               = 1,
 436                 .always_on = 1,
 437                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 438                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 439
 440         },
 441         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
 442         .consumer_supplies =  tps65910_smps4_supply,
 443 };
 444 static struct regulator_init_data tps65910_ldo1 = {
 445         .constraints = {
 446                 .name           = "VDIG1",
 447                 .min_uV                 = 1200000,
 448                 .max_uV                 = 2700000,
 449                 .apply_uV               = 1,
 450
 451                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 452                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 453
 454         },
 455         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
 456         .consumer_supplies =  tps65910_ldo1_supply,
 457 };
 458
 459 /* */
 460 static struct regulator_init_data tps65910_ldo2 = {
 461         .constraints = {
 462                 .name           = "VDIG2",
 463                 .min_uV                 = 1000000,
 464                 .max_uV                 = 1800000,
 465                 .apply_uV               = 1,
 466
 467                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 468                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 469
 470         },
 471         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
 472         .consumer_supplies =  tps65910_ldo2_supply,
 473 };
 474
 475 /* */
 476 static struct regulator_init_data tps65910_ldo3 = {
 477         .constraints = {
 478                 .name           = "VAUX1",
 479                 .min_uV                 = 1800000,
 480                 .max_uV                 = 3300000,
 481                 .apply_uV               = 1,
 482
 483                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 484                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 485
 486         },
 487         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
 488         .consumer_supplies =  tps65910_ldo3_supply,
 489 };
 490
 491 /* */
 492 static struct regulator_init_data tps65910_ldo4 = {
 493         .constraints = {
 494                 .name           = "VAUX2",
 495                 .min_uV                 = 1800000,
 496                 .max_uV                 = 3300000,
 497                 .apply_uV               = 1,
 498
 499                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 500                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 501
 502         },
 503         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
 504         .consumer_supplies =  tps65910_ldo4_supply,
 505 };
 506
 507 /* */
 508 static struct regulator_init_data tps65910_ldo5 = {
 509         .constraints = {
 510                 .name           = "VAUX33",
 511                 .min_uV                 = 1800000,
 512                 .max_uV                 = 3300000,
 513                 .apply_uV               = 1,
 514
 515                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 516                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 517
 518         },
 519         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
 520         .consumer_supplies =  tps65910_ldo5_supply,
 521 };
 522
 523 /* */
 524 static struct regulator_init_data tps65910_ldo6 = {
 525         .constraints = {
 526                 .name           = "VMMC",
 527                 .min_uV                 = 1800000,
 528                 .max_uV                 = 3300000,
 529                 .apply_uV               = 1,
 530
 531                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 532                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 533
 534         },
 535         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
 536         .consumer_supplies =  tps65910_ldo6_supply,
 537 };
 538
 539 /* */
 540 static struct regulator_init_data tps65910_ldo7 = {
 541         .constraints = {
 542                 .name           = "VDAC",
 543                 .min_uV                 = 1800000,
 544                 .max_uV                 = 2850000,
 545                 .apply_uV               = 1,
 546
 547                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 548                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 549
 550         },
 551         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
 552         .consumer_supplies =  tps65910_ldo7_supply,
 553 };
 554
 555 /* */
 556 static struct regulator_init_data tps65910_ldo8 = {
 557         .constraints = {
 558                 .name           = "VPLL",
 559                 .min_uV                 = 1000000,
 560                 .max_uV                 = 2500000,
 561                 .apply_uV               = 1,
 562                 .always_on = 1,
 563                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
 564                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
 565
 566         },
 567         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
 568         .consumer_supplies =  tps65910_ldo8_supply,
 569 };
 570
 571 void __sramfunc board_pmu_tps65910_suspend(void)
 572 {
 573         #ifdef CONFIG_CLK_SWITCH_TO_32K
 574          sram_gpio_set_value(pmic_sleep, GPIO_HIGH);
 575         #endif
 576 }
 577 void __sramfunc board_pmu_tps65910_resume(void)
 578 {
 579         #ifdef CONFIG_CLK_SWITCH_TO_32K
 580         sram_gpio_set_value(pmic_sleep, GPIO_LOW);
 581         sram_32k_udelay(10000);
 582         #endif
 583 }
 584 static struct tps65910_board tps65910_data = {
 585         .irq    = (unsigned)TPS65910_HOST_IRQ,
 586         .irq_base = IRQ_BOARD_BASE,
 587         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
 588
 589         .pre_init = tps65910_pre_init,
 590         .post_init = tps65910_post_init,
 591
 592         //TPS65910_NUM_REGS = 13
 593         // Regulators
 594         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
 595         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
 596         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
 597         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
 598         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
 599         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
 600         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
 601         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
 602         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
 603         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
 604         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
 605         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
 606         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
 607
 608
 609 };
 610
 611 #endif
 612