rk3066b:m701:modify pmu sleep and INT pin name ,and modify vdd11 voltage when pmu...
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-rk30 / board-rk3066b-sdk-tps65910.c
1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
4 #include <mach/sram.h>
5 #include <linux/platform_device.h>
6
7 #include <mach/gpio.h>
8 #include <mach/iomux.h>
9
10 #define grf_readl(offset)       readl_relaxed(RK30_GRF_BASE + offset)
11 #define grf_writel(v, offset)   do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
12
13 #define CRU_CLKGATE5_CON_ADDR 0x00e4
14 #define GRF_GPIO6L_DIR_ADDR 0x0030
15 #define GRF_GPIO6L_DO_ADDR 0x0068
16 #define GRF_GPIO6L_EN_ADDR 0x00a0
17 #define GPIO6_PB3_DIR_OUT  0x08000800
18 #define GPIO6_PB3_DO_LOW  0x08000000
19 #define GPIO6_PB3_DO_HIGH  0x08000800
20 #define GPIO6_PB3_EN_MASK  0x08000800
21 #define GPIO6_PB3_UNEN_MASK  0x08000000
22 #define GPIO6_PB1_DIR_OUT  0x02000200
23 #define GPIO6_PB1_DO_LOW  0x02000000
24 #define GPIO6_PB1_DO_HIGH  0x02000200
25 #define GPIO6_PB1_EN_MASK  0x02000200
26 #define GPIO6_PB1_UNEN_MASK  0x02000000
27
28 #ifdef CONFIG_MFD_TPS65910
29 #define PMU_POWER_SLEEP RK30_PIN0_PA1   
30 extern int platform_device_register(struct platform_device *pdev);
31
32 int tps65910_pre_init(struct tps65910 *tps65910){
33
34         int val = 0;
35         int i   = 0;
36         int err = -1;
37                 
38         printk("%s,line=%d\n", __func__,__LINE__);      
39         //gpio_request(PMU_POWER_SLEEP, "NULL");
40         //gpio_direction_output(PMU_POWER_SLEEP, GPIO_HIGH);
41
42         /*************set vdd11 (pll) voltage 1.0v********************/
43         val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
44         if (val<0) {
45                 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
46                 return val;
47         }
48         val &= (~(0x3<<2));
49         err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
50         if (err) {
51                 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
52                 return err;
53         }
54         /****************************************/
55         
56         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
57         if (val<0) {
58                 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
59                 return val;
60         }
61         /* Set sleep state active high and allow device turn-off after PWRON long press */
62         val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
63
64         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
65         if (err) {
66                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
67                 return err;
68         }
69         
70          #if 1
71         /* set PSKIP=0 */
72         val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
73         if (val<0) {
74                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
75                 return val;
76         }
77
78         val &= ~DEVCTRL_DEV_OFF_MASK;
79         val &= ~DEVCTRL_DEV_SLP_MASK;
80         err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
81         if (err) {
82                 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
83                 return err;
84         }
85         #endif
86         /* Set the maxinum load current */
87         /* VDD1 */
88         val = tps65910_reg_read(tps65910, TPS65910_VDD1);
89         if (val<0) {
90                 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
91                 return val;
92         }
93
94         val |= (1<<5);          //when 1: 1.5 A
95         val |= (0x07<<2);       //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
96         err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
97         if (err) {
98                 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
99                 return err;
100         }
101
102         /* VDD2 */
103         val = tps65910_reg_read(tps65910, TPS65910_VDD2);
104         if (val<0) {
105                 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
106                 return val;
107         }
108
109         val |= (1<<5);          //when 1: 1.5 A
110         err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
111         if (err) {
112                 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
113                 return err;
114         }
115
116         /* VIO */
117         val = tps65910_reg_read(tps65910, TPS65910_VIO);
118         if (val<0) {
119                 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
120                 return -EIO;
121         }
122
123         val |= (1<<6);  //when 01: 1.0 A
124         err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
125         if (err) {
126                 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
127                 return err;
128         }
129         #if 1
130         /* Mask ALL interrupts */
131         err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
132         if (err) {
133                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
134                 return err;
135         }
136         
137         err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
138         if (err) {
139                 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
140                 return err;
141         }
142
143         /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
144         #if 1
145         val = 0;
146         val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
147         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
148         if (err) {
149                 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
150                 return err;
151         }
152         printk(KERN_INFO "TPS65910 Set default voltage.\n");
153         #endif
154         #if 0
155         //read sleep control register  for debug
156         for(i=0; i<6; i++)
157         {
158         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
159         if (err) {
160                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
161                 return -EIO;
162         }
163                 else
164                 printk("%s.......is  0x%04x\n",__FUNCTION__,val);
165         }
166         #endif
167
168         #if 1
169         //sleep control register
170         /*set func when in sleep mode */
171         val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
172         if (val<0) {
173                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
174                 return val;
175         }
176         
177         val |= (1 << 1);
178         err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
179         if (err) {
180                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181                                 \n", TPS65910_VDIG1);
182                 return err;
183         }
184         
185         /* open ldo when in sleep mode */
186         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
187         if (val<0) {
188                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
189                 return val;
190         }
191         
192         val &= 0;
193         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
194         if (err) {
195                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196                                 \n", TPS65910_VDIG1);
197                 return err;
198         }
199                 
200         /*set dc mode when in sleep mode */
201         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
202         if (val<0) {
203                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
204                 return val;
205         }
206         
207         val  |= 0xff;
208         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
209         if (err) {
210                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
211                                 \n", TPS65910_VDIG1);
212                 return err;
213         }
214         
215         /*close ldo when in sleep mode */
216         val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
217         if (val<0) {
218                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
219                 return val;
220         }
221         
222         val |= 0x0b;
223         err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
224         if (err) {
225                 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
226                                 \n", TPS65910_VDIG1);
227                 return err;
228         }
229         #endif
230         #if 0
231         //read sleep control register  for debug
232         for(i=0; i<6; i++)
233         {
234         err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
235         if (err) {
236                 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
237                 return -EIO;
238         }
239                 else
240                 printk("%s.......is  0x%4x\n",__FUNCTION__,val);
241         }
242         #endif
243         #endif
244         printk("%s,line=%d\n", __func__,__LINE__);
245         return 0;
246
247 }
248 int tps65910_post_init(struct tps65910 *tps65910)
249 {
250         struct regulator *dcdc;
251         struct regulator *ldo;
252         printk("%s,line=%d\n", __func__,__LINE__);
253
254         g_pmic_type = PMIC_TYPE_TPS65910;
255         printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
256
257         #ifdef CONFIG_RK30_PWM_REGULATOR
258         platform_device_register(&pwm_regulator_device[0]);
259         #endif
260         
261         dcdc = regulator_get(NULL, "vio");      //vcc_io
262         regulator_set_voltage(dcdc, 3000000, 3000000);
263         regulator_enable(dcdc);
264         printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
265         regulator_put(dcdc);
266         udelay(100);
267
268         ldo = regulator_get(NULL, "vpll");      // vcc25
269         regulator_set_voltage(ldo, 2500000, 2500000);
270         regulator_enable(ldo);
271         printk("%s set vpll vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
272         regulator_put(ldo);
273         udelay(100);
274
275         ldo = regulator_get(NULL, "vdig2");     // vdd11
276         regulator_set_voltage(ldo, 1000000, 1000000);
277         regulator_enable(ldo);
278         printk("%s set vdig2 vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
279         regulator_put(ldo);
280         udelay(100);
281
282         ldo = regulator_get(NULL, "vaux33");     //vcc_tp
283         regulator_set_voltage(ldo, 3300000, 3300000);
284         regulator_enable(ldo);
285         printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
286         regulator_put(ldo);
287         udelay(100);
288         
289         dcdc = regulator_get(NULL, "vdd_cpu");  //vdd_cpu
290         regulator_set_voltage(dcdc, 1000000, 1000000);
291         regulator_enable(dcdc);
292         printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
293         regulator_put(dcdc);
294         udelay(100);
295         
296         dcdc = regulator_get(NULL, "vdd2");     //vcc_ddr 
297         regulator_set_voltage(dcdc, 1200000, 1200000);  // 1.5*4/5 = 1.2 and Vout=1.5v
298         regulator_enable(dcdc);
299         printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
300         regulator_put(dcdc);
301         udelay(100);
302         
303         ldo = regulator_get(NULL, "vdig1");     //vcc18_cif
304         regulator_set_voltage(ldo, 1800000, 1800000);
305         regulator_enable(ldo);
306         printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
307         regulator_put(ldo);
308         udelay(100);
309         
310         dcdc = regulator_get(NULL, "vaux1"); //vcc25_hdmi
311         regulator_set_voltage(dcdc,2500000,2500000);
312         regulator_enable(dcdc); 
313         printk("%s set vaux1 vcc25_hdmi=%dmV end\n", __func__, regulator_get_voltage(dcdc));
314         regulator_put(dcdc);
315         udelay(100);
316
317         ldo = regulator_get(NULL, "vaux2");     //vcca33
318         regulator_set_voltage(ldo, 3300000, 3300000);
319         regulator_enable(ldo);
320         printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
321         regulator_put(ldo);
322         udelay(100);
323
324         ldo = regulator_get(NULL, "vdac"); // vccio_wl
325         regulator_set_voltage(ldo,1800000,1800000);
326         regulator_enable(ldo); 
327         printk("%s set vdac vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
328         regulator_put(ldo);
329         udelay(100);
330
331         ldo = regulator_get(NULL, "vmmc");  //vcc28_cif
332         regulator_set_voltage(ldo,2800000,2800000);
333         regulator_enable(ldo); 
334         printk("%s set vmmc vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
335         regulator_put(ldo);
336         udelay(100);
337         
338         printk("%s,line=%d END\n", __func__,__LINE__);
339         
340         return 0;
341 }
342
343 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
344         {
345                 .supply = "vdd1",
346         },
347         {
348                 .supply = "vdd_cpu",
349         },
350 };
351 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
352         {
353                 .supply = "vdd2",
354         },
355         
356 };
357 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
358         {
359                 .supply = "vdd3",
360         },
361 };
362 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
363         {
364                 .supply = "vio",
365         },
366 };
367 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
368         {
369                 .supply = "vdig1",
370         },
371 };
372 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
373         {
374                 .supply = "vdig2",
375         },
376 };
377
378 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
379         {
380                 .supply = "vaux1",
381         },
382 };
383 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
384         {
385                 .supply = "vaux2",
386         },
387 };
388 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
389         {
390                 .supply = "vaux33",
391         },
392 };
393 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
394         {
395                 .supply = "vmmc",
396         },
397 };
398 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
399         {
400                 .supply = "vdac",
401         },
402 };
403
404 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
405         {
406                 .supply = "vpll",
407         },
408 };
409
410 static struct regulator_init_data tps65910_smps1 = {
411         .constraints = {
412                 .name           = "VDD1",
413                 .min_uV                 = 600000,
414                 .max_uV                 = 1500000,
415                 .apply_uV               = 1,
416                 .always_on = 1,
417                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
418                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
419
420         },
421         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
422         .consumer_supplies =  tps65910_smps1_supply,
423 };
424
425 /* */
426 static struct regulator_init_data tps65910_smps2 = {
427         .constraints = {
428                 .name           = "VDD2",
429                 .min_uV                 = 600000,
430                 .max_uV                 = 1500000,
431                 .apply_uV               = 1,
432                 .always_on = 1,
433                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
434                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
435
436         },
437         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
438         .consumer_supplies =  tps65910_smps2_supply,
439 };
440
441 /* */
442 static struct regulator_init_data tps65910_smps3 = {
443         .constraints = {
444                 .name           = "VDD3",
445                 .min_uV                 = 1000000,
446                 .max_uV                 = 1400000,
447                 .apply_uV               = 1,
448                 .always_on = 1,
449                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
450                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
451
452         },
453         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
454         .consumer_supplies =  tps65910_smps3_supply,
455 };
456
457 static struct regulator_init_data tps65910_smps4 = {
458         .constraints = {
459                 .name           = "VIO",
460                 .min_uV                 = 1800000,
461                 .max_uV                 = 3300000,
462                 .apply_uV               = 1,
463                 .always_on = 1,
464                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
465                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
466
467         },
468         .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
469         .consumer_supplies =  tps65910_smps4_supply,
470 };
471 static struct regulator_init_data tps65910_ldo1 = {
472         .constraints = {
473                 .name           = "VDIG1",
474                 .min_uV                 = 1200000,
475                 .max_uV                 = 2700000,
476                 .apply_uV               = 1,
477                 
478                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
479                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
480
481         },
482         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
483         .consumer_supplies =  tps65910_ldo1_supply,
484 };
485
486 /* */
487 static struct regulator_init_data tps65910_ldo2 = {
488         .constraints = {
489                 .name           = "VDIG2",
490                 .min_uV                 = 1000000,
491                 .max_uV                 = 1800000,
492                 .apply_uV               = 1,
493                 
494                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
495                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
496
497         },
498         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
499         .consumer_supplies =  tps65910_ldo2_supply,
500 };
501
502 /* */
503 static struct regulator_init_data tps65910_ldo3 = {
504         .constraints = {
505                 .name           = "VAUX1",
506                 .min_uV                 = 1800000,
507                 .max_uV                 = 3300000,
508                 .apply_uV               = 1,
509                 
510                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
511                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
512
513         },
514         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
515         .consumer_supplies =  tps65910_ldo3_supply,
516 };
517
518 /* */
519 static struct regulator_init_data tps65910_ldo4 = {
520         .constraints = {
521                 .name           = "VAUX2",
522                 .min_uV                 = 1800000,
523                 .max_uV                 = 3300000,
524                 .apply_uV               = 1,
525                 
526                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
527                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
528
529         },
530         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
531         .consumer_supplies =  tps65910_ldo4_supply,
532 };
533
534 /* */
535 static struct regulator_init_data tps65910_ldo5 = {
536         .constraints = {
537                 .name           = "VAUX33",
538                 .min_uV                 = 1800000,
539                 .max_uV                 = 3300000,
540                 .apply_uV               = 1,
541                 
542                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
543                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
544
545         },
546         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
547         .consumer_supplies =  tps65910_ldo5_supply,
548 };
549
550 /* */
551 static struct regulator_init_data tps65910_ldo6 = {
552         .constraints = {
553                 .name           = "VMMC",
554                 .min_uV                 = 1800000,
555                 .max_uV                 = 3300000,
556                 .apply_uV               = 1,
557                 
558                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
559                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
560
561         },
562         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
563         .consumer_supplies =  tps65910_ldo6_supply,
564 };
565
566 /* */
567 static struct regulator_init_data tps65910_ldo7 = {
568         .constraints = {
569                 .name           = "VDAC",
570                 .min_uV                 = 1800000,
571                 .max_uV                 = 2850000,
572                 .apply_uV               = 1,
573                 
574                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
575                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
576
577         },
578         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
579         .consumer_supplies =  tps65910_ldo7_supply,
580 };
581
582 /* */
583 static struct regulator_init_data tps65910_ldo8 = {
584         .constraints = {
585                 .name           = "VPLL",
586                 .min_uV                 = 1000000,
587                 .max_uV                 = 2500000,
588                 .apply_uV               = 1,
589                 .always_on = 1,
590                 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
591                 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
592
593         },
594         .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
595         .consumer_supplies =  tps65910_ldo8_supply,
596 };
597
598 void __sramfunc board_pmu_tps65910_suspend(void)
599 {       
600 #if 0 
601         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
602         grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
603         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
604 #endif
605 }
606 void __sramfunc board_pmu_tps65910_resume(void)
607 {
608 #if 0
609         grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
610         grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR);  //set gpio6_b1 output low
611         grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
612         #ifdef CONFIG_CLK_SWITCH_TO_32K                 //switch clk to 24M
613         sram_32k_udelay(10000);
614         #else
615         sram_udelay(2000);
616         #endif
617 #endif
618 }
619
620 static struct tps65910_board tps65910_data = {
621         .irq    = (unsigned)TPS65910_HOST_IRQ,          
622         .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
623         .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
624         
625         .pre_init = tps65910_pre_init,
626         .post_init = tps65910_post_init,
627
628         //TPS65910_NUM_REGS = 13
629         // Regulators
630         .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,             
631         .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
632         .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
633         .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
634         .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
635         .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
636         .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
637         .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
638         .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
639         .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
640         .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
641         .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
642         .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,
643
644  
645 };
646
647 #endif
648