1 #include <linux/regulator/machine.h>
2 #include <linux/i2c/twl.h>
3 #include <linux/mfd/tps65910.h>
5 #include <linux/platform_device.h>
8 #include <mach/iomux.h>
10 #define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset)
11 #define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
13 #define CRU_CLKGATE5_CON_ADDR 0x00e4
14 #define GRF_GPIO6L_DIR_ADDR 0x0030
15 #define GRF_GPIO6L_DO_ADDR 0x0068
16 #define GRF_GPIO6L_EN_ADDR 0x00a0
17 #define GPIO6_PB3_DIR_OUT 0x08000800
18 #define GPIO6_PB3_DO_LOW 0x08000000
19 #define GPIO6_PB3_DO_HIGH 0x08000800
20 #define GPIO6_PB3_EN_MASK 0x08000800
21 #define GPIO6_PB3_UNEN_MASK 0x08000000
22 #define GPIO6_PB1_DIR_OUT 0x02000200
23 #define GPIO6_PB1_DO_LOW 0x02000000
24 #define GPIO6_PB1_DO_HIGH 0x02000200
25 #define GPIO6_PB1_EN_MASK 0x02000200
26 #define GPIO6_PB1_UNEN_MASK 0x02000000
28 #ifdef CONFIG_MFD_TPS65910
29 #define PMU_POWER_SLEEP RK30_PIN0_PA1
30 extern int platform_device_register(struct platform_device *pdev);
32 int tps65910_pre_init(struct tps65910 *tps65910){
38 printk("%s,line=%d\n", __func__,__LINE__);
39 //gpio_request(PMU_POWER_SLEEP, "NULL");
40 //gpio_direction_output(PMU_POWER_SLEEP, GPIO_HIGH);
42 /*************set vdd11 (pll) voltage 1.0v********************/
43 val = tps65910_reg_read(tps65910, TPS65910_VDIG2);
45 printk(KERN_ERR "Unable to read TPS65910_VDIG2 reg\n");
49 err = tps65910_reg_write(tps65910, TPS65910_VDIG2, val);
51 printk(KERN_ERR "Unable to write TPS65910_VDIG2 reg\n");
54 /****************************************/
56 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL2);
58 printk(KERN_ERR "Unable to read TPS65910_DEVCTRL2 reg\n");
61 /* Set sleep state active high and allow device turn-off after PWRON long press */
62 val |= (DEVCTRL2_SLEEPSIG_POL_MASK | DEVCTRL2_PWON_LP_OFF_MASK);
64 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL2, val);
66 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL2 reg\n");
72 val = tps65910_reg_read(tps65910, TPS65910_DCDCCTRL);
74 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
78 val &= ~DEVCTRL_DEV_OFF_MASK;
79 val &= ~DEVCTRL_DEV_SLP_MASK;
80 err = tps65910_reg_write(tps65910, TPS65910_DCDCCTRL, val);
82 printk(KERN_ERR "Unable to write TPS65910_DCDCCTRL reg\n");
86 /* Set the maxinum load current */
88 val = tps65910_reg_read(tps65910, TPS65910_VDD1);
90 printk(KERN_ERR "Unable to read TPS65910_VDD1 reg\n");
94 val |= (1<<5); //when 1: 1.5 A
95 val |= (0x07<<2); //TSTEP[2:0] = 111 : 2.5 mV/¦Ìs(sampling 3 Mhz/5)
96 err = tps65910_reg_write(tps65910, TPS65910_VDD1, val);
98 printk(KERN_ERR "Unable to write TPS65910_VDD1 reg\n");
103 val = tps65910_reg_read(tps65910, TPS65910_VDD2);
105 printk(KERN_ERR "Unable to read TPS65910_VDD2 reg\n");
109 val |= (1<<5); //when 1: 1.5 A
110 err = tps65910_reg_write(tps65910, TPS65910_VDD2, val);
112 printk(KERN_ERR "Unable to write TPS65910_VDD2 reg\n");
117 val = tps65910_reg_read(tps65910, TPS65910_VIO);
119 printk(KERN_ERR "Unable to read TPS65910_VIO reg\n");
123 val |= (1<<6); //when 01: 1.0 A
124 err = tps65910_reg_write(tps65910, TPS65910_VIO, val);
126 printk(KERN_ERR "Unable to write TPS65910_VIO reg\n");
130 /* Mask ALL interrupts */
131 err = tps65910_reg_write(tps65910,TPS65910_INT_MSK, 0xFF);
133 printk(KERN_ERR "Unable to write TPS65910_INT_MSK reg\n");
137 err = tps65910_reg_write(tps65910, TPS65910_INT_MSK2, 0x03);
139 printk(KERN_ERR "Unable to write TPS65910_INT_MSK2 reg\n");
143 /* Set RTC Power, disable Smart Reflex in DEVCTRL_REG */
146 val |= (DEVCTRL_SR_CTL_I2C_SEL_MASK);
147 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
149 printk(KERN_ERR "Unable to write TPS65910_DEVCTRL reg\n");
152 printk(KERN_INFO "TPS65910 Set default voltage.\n");
155 //read sleep control register for debug
158 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
160 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
164 printk("%s.......is 0x%04x\n",__FUNCTION__,val);
169 //sleep control register
170 /*set func when in sleep mode */
171 val = tps65910_reg_read(tps65910, TPS65910_DEVCTRL);
173 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
178 err = tps65910_reg_write(tps65910, TPS65910_DEVCTRL, val);
180 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
181 \n", TPS65910_VDIG1);
185 /* open ldo when in sleep mode */
186 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_LDO_ON);
188 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
193 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_LDO_ON, val);
195 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
196 \n", TPS65910_VDIG1);
200 /*set dc mode when in sleep mode */
201 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_KEEP_RES_ON);
203 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
208 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_KEEP_RES_ON, val);
210 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
211 \n", TPS65910_VDIG1);
215 /*close ldo when in sleep mode */
216 val = tps65910_reg_read(tps65910, TPS65910_SLEEP_SET_LDO_OFF);
218 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
223 err = tps65910_reg_write(tps65910, TPS65910_SLEEP_SET_LDO_OFF, val);
225 printk(KERN_ERR "Unable to read TPS65910 Reg at offset 0x%x= \
226 \n", TPS65910_VDIG1);
231 //read sleep control register for debug
234 err = tps65910_reg_read(tps65910, &val, TPS65910_DEVCTRL+i);
236 printk(KERN_ERR "Unable to read TPS65910_DCDCCTRL reg\n");
240 printk("%s.......is 0x%4x\n",__FUNCTION__,val);
244 printk("%s,line=%d\n", __func__,__LINE__);
248 int tps65910_post_init(struct tps65910 *tps65910)
250 struct regulator *dcdc;
251 struct regulator *ldo;
252 printk("%s,line=%d\n", __func__,__LINE__);
254 g_pmic_type = PMIC_TYPE_TPS65910;
255 printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
257 #ifdef CONFIG_RK30_PWM_REGULATOR
258 platform_device_register(&pwm_regulator_device[0]);
261 dcdc = regulator_get(NULL, "vio"); //vcc_io
262 regulator_set_voltage(dcdc, 3000000, 3000000);
263 regulator_enable(dcdc);
264 printk("%s set vio vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
268 ldo = regulator_get(NULL, "vpll"); // vcc25
269 regulator_set_voltage(ldo, 2500000, 2500000);
270 regulator_enable(ldo);
271 printk("%s set vpll vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
275 ldo = regulator_get(NULL, "vdig2"); // vdd11
276 regulator_set_voltage(ldo, 1000000, 1000000);
277 regulator_enable(ldo);
278 printk("%s set vdig2 vdd11=%dmV end\n", __func__, regulator_get_voltage(ldo));
282 ldo = regulator_get(NULL, "vaux33"); //vcc_tp
283 regulator_set_voltage(ldo, 3300000, 3300000);
284 regulator_enable(ldo);
285 printk("%s set vaux33 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
289 dcdc = regulator_get(NULL, "vdd_cpu"); //vdd_cpu
290 regulator_set_voltage(dcdc, 1000000, 1000000);
291 regulator_enable(dcdc);
292 printk("%s set vdd1 vdd_cpu=%dmV end\n", __func__, regulator_get_voltage(dcdc));
296 dcdc = regulator_get(NULL, "vdd2"); //vcc_ddr
297 regulator_set_voltage(dcdc, 1200000, 1200000); // 1.5*4/5 = 1.2 and Vout=1.5v
298 regulator_enable(dcdc);
299 printk("%s set vdd2 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
303 ldo = regulator_get(NULL, "vdig1"); //vcc18_cif
304 regulator_set_voltage(ldo, 1800000, 1800000);
305 regulator_enable(ldo);
306 printk("%s set vdig1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
310 dcdc = regulator_get(NULL, "vaux1"); //vcc25_hdmi
311 regulator_set_voltage(dcdc,2500000,2500000);
312 regulator_enable(dcdc);
313 printk("%s set vaux1 vcc25_hdmi=%dmV end\n", __func__, regulator_get_voltage(dcdc));
317 ldo = regulator_get(NULL, "vaux2"); //vcca33
318 regulator_set_voltage(ldo, 3300000, 3300000);
319 regulator_enable(ldo);
320 printk("%s set vaux2 vcca33=%dmV end\n", __func__, regulator_get_voltage(ldo));
324 ldo = regulator_get(NULL, "vdac"); // vccio_wl
325 regulator_set_voltage(ldo,1800000,1800000);
326 regulator_enable(ldo);
327 printk("%s set vdac vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
331 ldo = regulator_get(NULL, "vmmc"); //vcc28_cif
332 regulator_set_voltage(ldo,2800000,2800000);
333 regulator_enable(ldo);
334 printk("%s set vmmc vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
338 printk("%s,line=%d END\n", __func__,__LINE__);
343 static struct regulator_consumer_supply tps65910_smps1_supply[] = {
351 static struct regulator_consumer_supply tps65910_smps2_supply[] = {
357 static struct regulator_consumer_supply tps65910_smps3_supply[] = {
362 static struct regulator_consumer_supply tps65910_smps4_supply[] = {
367 static struct regulator_consumer_supply tps65910_ldo1_supply[] = {
372 static struct regulator_consumer_supply tps65910_ldo2_supply[] = {
378 static struct regulator_consumer_supply tps65910_ldo3_supply[] = {
383 static struct regulator_consumer_supply tps65910_ldo4_supply[] = {
388 static struct regulator_consumer_supply tps65910_ldo5_supply[] = {
393 static struct regulator_consumer_supply tps65910_ldo6_supply[] = {
398 static struct regulator_consumer_supply tps65910_ldo7_supply[] = {
404 static struct regulator_consumer_supply tps65910_ldo8_supply[] = {
410 static struct regulator_init_data tps65910_smps1 = {
417 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
418 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
421 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps1_supply),
422 .consumer_supplies = tps65910_smps1_supply,
426 static struct regulator_init_data tps65910_smps2 = {
433 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
434 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
437 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps2_supply),
438 .consumer_supplies = tps65910_smps2_supply,
442 static struct regulator_init_data tps65910_smps3 = {
449 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
450 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
453 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps3_supply),
454 .consumer_supplies = tps65910_smps3_supply,
457 static struct regulator_init_data tps65910_smps4 = {
464 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
465 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
468 .num_consumer_supplies = ARRAY_SIZE(tps65910_smps4_supply),
469 .consumer_supplies = tps65910_smps4_supply,
471 static struct regulator_init_data tps65910_ldo1 = {
478 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
479 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
482 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo1_supply),
483 .consumer_supplies = tps65910_ldo1_supply,
487 static struct regulator_init_data tps65910_ldo2 = {
494 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
495 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
498 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo2_supply),
499 .consumer_supplies = tps65910_ldo2_supply,
503 static struct regulator_init_data tps65910_ldo3 = {
510 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
511 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
514 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo3_supply),
515 .consumer_supplies = tps65910_ldo3_supply,
519 static struct regulator_init_data tps65910_ldo4 = {
526 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
527 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
530 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo4_supply),
531 .consumer_supplies = tps65910_ldo4_supply,
535 static struct regulator_init_data tps65910_ldo5 = {
542 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
543 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
546 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo5_supply),
547 .consumer_supplies = tps65910_ldo5_supply,
551 static struct regulator_init_data tps65910_ldo6 = {
558 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
559 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
562 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo6_supply),
563 .consumer_supplies = tps65910_ldo6_supply,
567 static struct regulator_init_data tps65910_ldo7 = {
574 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
575 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
578 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo7_supply),
579 .consumer_supplies = tps65910_ldo7_supply,
583 static struct regulator_init_data tps65910_ldo8 = {
590 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
591 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL,
594 .num_consumer_supplies = ARRAY_SIZE(tps65910_ldo8_supply),
595 .consumer_supplies = tps65910_ldo8_supply,
598 void __sramfunc board_pmu_tps65910_suspend(void)
601 grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
602 grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
603 grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
606 void __sramfunc board_pmu_tps65910_resume(void)
609 grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
610 grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
611 grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
612 #ifdef CONFIG_CLK_SWITCH_TO_32K //switch clk to 24M
613 sram_32k_udelay(10000);
620 static struct tps65910_board tps65910_data = {
621 .irq = (unsigned)TPS65910_HOST_IRQ,
622 .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
623 .gpio_base = TPS65910_GPIO_EXPANDER_BASE,
625 .pre_init = tps65910_pre_init,
626 .post_init = tps65910_post_init,
628 //TPS65910_NUM_REGS = 13
630 .tps65910_pmic_init_data[TPS65910_REG_VRTC] = NULL,
631 .tps65910_pmic_init_data[TPS65910_REG_VIO] = &tps65910_smps4,
632 .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &tps65910_smps1,
633 .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &tps65910_smps2,
634 .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &tps65910_smps3,
635 .tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &tps65910_ldo1,
636 .tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &tps65910_ldo2,
637 .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &tps65910_ldo8,
638 .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &tps65910_ldo7,
639 .tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &tps65910_ldo3,
640 .tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &tps65910_ldo4,
641 .tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &tps65910_ldo5,
642 .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &tps65910_ldo6,