1 #include <linux/regulator/machine.h>
2 #include <linux/mfd/wm831x/pdata.h>
3 #include <linux/mfd/wm831x/core.h>
4 #include <linux/mfd/wm831x/gpio.h>
5 #include <linux/mfd/wm831x/pmu.h>
8 #include <linux/earlysuspend.h>
10 #define cru_readl(offset) readl_relaxed(RK30_CRU_BASE + offset)
11 #define cru_writel(v, offset) do { writel_relaxed(v, RK30_CRU_BASE + offset); dsb(); } while (0)
13 #define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset)
14 #define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0)
16 #define CRU_CLKGATE5_CON_ADDR 0x00e4
17 #define GRF_GPIO6L_DIR_ADDR 0x0030
18 #define GRF_GPIO6L_DO_ADDR 0x0068
19 #define GRF_GPIO6L_EN_ADDR 0x00a0
20 #define CRU_CLKGATE5_GRFCLK_ON 0x00100000
21 #define CRU_CLKGATE5_GRFCLK_OFF 0x00100010
22 #define GPIO6_PB1_DIR_OUT 0x02000200
23 #define GPIO6_PB1_DO_LOW 0x02000000
24 #define GPIO6_PB1_DO_HIGH 0x02000200
25 #define GPIO6_PB1_EN_MASK 0x02000200
26 #define GPIO6_PB1_UNEN_MASK 0x02000000
29 #if defined(CONFIG_GPIO_WM831X)
30 static struct rk29_gpio_expander_info wm831x_gpio_settinginfo[] = {
32 .gpio_num = WM831X_P01, // tp3
34 .pin_value = GPIO_LOW,
37 .gpio_num = WM831X_P02, //tp4
41 .gpio_num = WM831X_P03, //tp2
43 .pin_value = GPIO_HIGH,
46 .gpio_num = WM831X_P04, //tp1
50 .gpio_num = WM831X_P05, //tp1
54 .gpio_num = WM831X_P06, //tp1
56 .pin_value = GPIO_HIGH,
59 .gpio_num = WM831X_P07, //tp1
63 .gpio_num = WM831X_P08, //tp1
65 .pin_value = GPIO_HIGH,
68 .gpio_num = WM831X_P09, //tp1
70 .pin_value = GPIO_HIGH,
73 .gpio_num = WM831X_P10, //tp1
77 .gpio_num = WM831X_P11, //tp1
79 .pin_value = GPIO_HIGH,
82 .gpio_num = WM831X_P12,
84 .pin_value = GPIO_HIGH,
89 #if defined(CONFIG_MFD_WM831X)
91 #define UNLOCK_SECURITY_KEY ~(0x1<<5)
92 #define LOCK_SECURITY_KEY 0x00
93 #define PMU_POWER_SLEEP RK30_PIN0_PA1
94 static struct wm831x *Wm831x;
96 static int wm831x_pre_init(struct wm831x *parm)
100 // printk("%s\n", __func__);
101 gpio_request(PMU_POWER_SLEEP, "NULL");
102 gpio_direction_output(PMU_POWER_SLEEP, GPIO_LOW);
104 #ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
105 #ifdef CONFIG_BATTERY_RK30_VOL3V8
106 wm831x_set_bits(parm,WM831X_SYSVDD_CONTROL ,0xc077,0xc035); //pvdd power on dect vbat voltage
107 printk("+++The vbat is too low+++\n");
111 ret = wm831x_reg_read(parm, WM831X_POWER_STATE) & 0xffff;
112 wm831x_reg_write(parm, WM831X_POWER_STATE, (ret & 0xfff8) | 0x04);
114 wm831x_set_bits(parm, WM831X_RTC_CONTROL, WM831X_RTC_ALAM_ENA_MASK, 0x0400);//enable rtc alam
116 wm831x_reg_write(parm, WM831X_SECURITY_KEY, 0x9716); // unlock security key
117 wm831x_set_bits(parm, WM831X_RESET_CONTROL, 0x1003, 0x1001);
118 ret = wm831x_reg_read(parm, WM831X_RESET_CONTROL) & 0xffff & UNLOCK_SECURITY_KEY; // enternal reset active in sleep
119 // printk("%s:WM831X_RESET_CONTROL=0x%x\n", __func__, ret);
120 wm831x_reg_write(parm, WM831X_RESET_CONTROL, ret);
122 wm831x_set_bits(parm,WM831X_DC1_ON_CONFIG ,0x0300,0x0000); //set dcdc mode is FCCM
123 wm831x_set_bits(parm,WM831X_DC2_ON_CONFIG ,0x0300,0x0000);
124 wm831x_set_bits(parm,WM831X_DC3_ON_CONFIG ,0x0300,0x0000);
125 wm831x_set_bits(parm,0x4066,0x0300,0x0000);
127 #ifndef CONFIG_MACH_RK3066_SDK
128 wm831x_set_bits(parm,WM831X_LDO10_CONTROL ,0x0040,0x0040);// set ldo10 in switch mode
130 wm831x_set_bits(parm,WM831X_STATUS_LED_1 ,0xc300,0xc100);// set led1 on(in manual mode)
131 wm831x_set_bits(parm,WM831X_STATUS_LED_2 ,0xc300,0xc000);//set led2 off(in manual mode)
133 wm831x_set_bits(parm,WM831X_LDO5_SLEEP_CONTROL ,0xe000,0x2000);// set ldo5 is disable in sleep mode
134 wm831x_set_bits(parm,WM831X_LDO1_SLEEP_CONTROL ,0xe000,0x2000);// set ldo1 is disable in sleep mode
136 wm831x_reg_write(parm, WM831X_SECURITY_KEY, LOCK_SECURITY_KEY); // lock security key
140 static int wm831x_mask_interrupt(struct wm831x *Wm831x)
142 /**************************clear interrupt********************/
143 wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_1,0xffff);
144 wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_2,0xffff);
145 wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_3,0xffff);
146 wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_4,0xffff);
147 wm831x_reg_write(Wm831x,WM831X_INTERRUPT_STATUS_5,0xffff);
149 wm831x_reg_write(Wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0xbedc); //mask interrupt which not used
151 /*****************************************************************/
154 #ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
155 static int wm831x_low_power_detection(struct wm831x *wm831x)
157 #ifdef CONFIG_BATTERY_RK30_VOL3V8
158 wm831x_reg_write(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0xbe5c);
159 wm831x_set_bits(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x8000,0x0000);
160 wm831x_set_bits(wm831x,WM831X_SYSVDD_CONTROL ,0xc077,0x0035); //set pvdd low voltage is 3.1v hi voltage is 3.3v
162 wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0x803f); //open adc
163 wm831x_reg_write(wm831x,WM831X_AUXADC_CONTROL,0xd03f);
164 wm831x_reg_write(wm831x,WM831X_AUXADC_SOURCE,0x0001);
166 wm831x_reg_write(wm831x,WM831X_COMPARATOR_CONTROL,0x0001);
167 wm831x_reg_write(wm831x,WM831X_COMPARATOR_1,0x2844); //set the low power is 3.1v
169 wm831x_reg_write(wm831x,WM831X_INTERRUPT_STATUS_1_MASK,0x99ee);
170 wm831x_set_bits(wm831x,WM831X_SYSTEM_INTERRUPTS_MASK,0x0100,0x0000);
171 if (wm831x_reg_read(wm831x,WM831X_AUXADC_DATA)< 0x1844){
172 printk("The vbat is too low.\n");
173 wm831x_device_shutdown(wm831x);
181 int wm831x_post_init(struct wm831x *Wm831x)
183 struct regulator *dcdc;
184 struct regulator *ldo;
187 g_pmic_type = PMIC_TYPE_WM8326;
188 printk("%s:g_pmic_type=%d\n",__func__,g_pmic_type);
190 ldo = regulator_get(NULL, "ldo6"); //vcc_33
191 regulator_set_voltage(ldo, 3300000, 3300000);
192 regulator_set_suspend_voltage(ldo, 3300000);
193 regulator_enable(ldo);
194 // printk("%s set ldo6 vcc_33=%dmV end\n", __func__, regulator_get_voltage(ldo));
198 ldo = regulator_get(NULL, "ldo4"); // vdd_11
199 regulator_set_voltage(ldo, 900000, 900000);
200 regulator_set_suspend_voltage(ldo, 900000);
201 regulator_enable(ldo);
202 // printk("%s set ldo4 vdd_11=%dmV end\n", __func__, regulator_get_voltage(ldo));
206 ldo = regulator_get(NULL, "ldo5"); //vcc_25
207 regulator_set_voltage(ldo, 1800000, 1800000);
208 regulator_set_suspend_voltage(ldo,1800000);
209 regulator_enable(ldo);
210 // printk("%s set ldo5 vcc_25=%dmV end\n", __func__, regulator_get_voltage(ldo));
213 dcdc = regulator_get(NULL, "dcdc4"); // vcc_io
214 #ifdef CONFIG_MACH_RK3066_SDK
215 regulator_set_voltage(dcdc, 3300000, 3300000);
216 regulator_set_suspend_voltage(dcdc, 3100000);
218 regulator_set_voltage(dcdc, 3000000, 3000000);
219 regulator_set_suspend_voltage(dcdc, 2800000);
221 regulator_enable(dcdc);
222 // printk("%s set dcdc4 vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
226 dcdc = regulator_get(NULL, "vdd_cpu"); // vdd_arm
227 regulator_set_voltage(dcdc, 1000000, 1000000);
228 regulator_set_suspend_voltage(dcdc, 1000000);
229 regulator_enable(dcdc);
230 printk("%s set dcdc2 vdd_cpu(vdd_arm)=%dmV end\n", __func__, regulator_get_voltage(dcdc));
234 dcdc = regulator_get(NULL, "vdd_core"); // vdd_log
236 /* Read avs value under logic 1.1V*/
238 regulator_set_voltage(dcdc, 1100000, 1100000);
239 avs_init_val_get(1,1100000,"wm8326 init");
241 avs_set_scal_val(AVS_BASE);
243 regulator_set_voltage(dcdc, 1000000, 1000000);
244 regulator_set_suspend_voltage(dcdc, 1000000);
245 regulator_enable(dcdc);
246 printk("%s set dcdc1 vdd_core(vdd_log)=%dmV end\n", __func__, regulator_get_voltage(dcdc));
250 dcdc = regulator_get(NULL, "dcdc3"); // vcc_ddr
251 regulator_set_voltage(dcdc, 1150000, 1150000);
252 regulator_set_suspend_voltage(dcdc, 1150000);
253 regulator_enable(dcdc);
254 // printk("%s set dcdc3 vcc_ddr=%dmV end\n", __func__, regulator_get_voltage(dcdc));
258 ldo = regulator_get(NULL, "ldo7"); // vcc28_cif
259 regulator_set_voltage(ldo, 2800000, 2800000);
260 regulator_set_suspend_voltage(ldo, 2800000);
261 regulator_enable(ldo);
262 // printk("%s set ldo7 vcc28_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
266 ldo = regulator_get(NULL, "ldo1"); // vcc18_cif
267 regulator_set_voltage(ldo, 1800000, 1800000);
268 regulator_set_suspend_voltage(ldo, 1800000);
269 regulator_enable(ldo);
270 // printk("%s set ldo1 vcc18_cif=%dmV end\n", __func__, regulator_get_voltage(ldo));
274 ldo = regulator_get(NULL, "ldo8"); // vcca_33
275 regulator_set_voltage(ldo, 3300000, 3300000);
276 regulator_set_suspend_voltage(ldo, 3300000);
277 regulator_enable(ldo);
278 // printk("%s set ldo8 vcca_33=%dmV end\n", __func__, regulator_get_voltage(ldo));
282 ldo = regulator_get(NULL, "ldo2"); //vccio_wl
283 regulator_set_voltage(ldo, 1800000, 1800000);
284 regulator_set_suspend_voltage(ldo, 1800000);
285 regulator_enable(ldo);
286 // printk("%s set ldo2 vccio_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
290 ldo = regulator_get(NULL, "ldo10"); //flash io
291 regulator_set_voltage(ldo, 1800000, 1800000);
292 regulator_set_suspend_voltage(ldo, 1800000);
293 regulator_enable(ldo);
294 // printk("%s set ldo10 vcca_wl=%dmV end\n", __func__, regulator_get_voltage(ldo));
298 #ifdef CONFIG_MACH_RK3066_SDK
299 ldo = regulator_get(NULL, "ldo3"); //vdd11_hdmi
300 regulator_set_voltage(ldo, 1100000, 1100000);
301 regulator_set_suspend_voltage(ldo, 1100000);
303 ldo = regulator_get(NULL, "ldo3"); //vdd_12
304 regulator_set_voltage(ldo, 1200000, 1200000);
305 regulator_set_suspend_voltage(ldo, 1200000);
307 regulator_enable(ldo);
308 // printk("%s set ldo3 vdd_12=%dmV end\n", __func__, regulator_get_voltage(ldo));
312 ldo = regulator_get(NULL, "ldo9"); //vcc_tp
313 regulator_set_voltage(ldo, 3300000, 3300000);
314 regulator_set_suspend_voltage(ldo, 3300000);
315 regulator_enable(ldo);
316 // printk("%s set ldo9 vcc_tp=%dmV end\n", __func__, regulator_get_voltage(ldo));
320 wm831x_mask_interrupt(Wm831x);
322 #ifdef CONFIG_WM8326_VBAT_LOW_DETECTION
323 wm831x_low_power_detection(Wm831x);
326 printk("wm831x_post_init end");
330 static int wm831x_last_deinit(struct wm831x *Wm831x)
332 struct regulator *ldo;
334 printk("%s\n", __func__);
335 ldo = regulator_get(NULL, "ldo1");
336 regulator_disable(ldo);
339 ldo = regulator_get(NULL, "ldo2");
340 regulator_disable(ldo);
343 ldo = regulator_get(NULL, "ldo3");
344 regulator_disable(ldo);
347 ldo = regulator_get(NULL, "ldo4");
348 //regulator_disable(ldo);
351 ldo = regulator_get(NULL, "ldo5");
352 // regulator_disable(ldo);
355 ldo = regulator_get(NULL, "ldo6");
356 // regulator_disable(ldo);
359 ldo = regulator_get(NULL, "ldo7");
360 regulator_disable(ldo);
363 ldo = regulator_get(NULL, "ldo8");
364 regulator_disable(ldo);
367 ldo = regulator_get(NULL, "ldo9");
368 regulator_disable(ldo);
371 ldo = regulator_get(NULL, "ldo10");
372 regulator_disable(ldo);
378 struct wm831x_status_pdata wm831x_status_platdata[WM831X_MAX_STATUS] = {
380 .default_src = WM831X_STATUS_OTP,
381 .name = "wm831x_status0",
382 .default_trigger = "wm831x_otp",
385 .default_src = WM831X_STATUS_POWER,
386 .name = "wm831x_status1",
387 .default_trigger = "wm831x_power",
391 static struct regulator_consumer_supply dcdc1_consumers[] = {
393 .supply = "vdd_core",
397 static struct regulator_consumer_supply dcdc2_consumers[] = {
404 static struct regulator_consumer_supply dcdc3_consumers[] = {
410 static struct regulator_consumer_supply dcdc4_consumers[] = {
417 static struct regulator_consumer_supply epe1_consumers[] = {
423 static struct regulator_consumer_supply epe2_consumers[] = {
430 static struct regulator_consumer_supply ldo1_consumers[] = {
436 static struct regulator_consumer_supply ldo2_consumers[] = {
442 static struct regulator_consumer_supply ldo3_consumers[] = {
448 static struct regulator_consumer_supply ldo4_consumers[] = {
454 static struct regulator_consumer_supply ldo5_consumers[] = {
460 static struct regulator_consumer_supply ldo6_consumers[] = {
466 static struct regulator_consumer_supply ldo7_consumers[] = {
472 static struct regulator_consumer_supply ldo8_consumers[] = {
478 static struct regulator_consumer_supply ldo9_consumers[] = {
484 static struct regulator_consumer_supply ldo10_consumers[] = {
490 static struct regulator_consumer_supply ldo11_consumers[] = {
496 struct regulator_init_data wm831x_regulator_init_dcdc[WM831X_MAX_DCDC] = {
501 .max_uV = 1800000, //0.6-1.8V
503 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
504 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST | REGULATOR_MODE_IDLE,
506 .num_consumer_supplies = ARRAY_SIZE(dcdc1_consumers),
507 .consumer_supplies = dcdc1_consumers,
513 .max_uV = 1800000, //0.6-1.8V
515 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
516 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST | REGULATOR_MODE_IDLE,
518 .num_consumer_supplies = ARRAY_SIZE(dcdc2_consumers),
519 .consumer_supplies = dcdc2_consumers,
525 .max_uV = 3400000, //0.85-3.4V
527 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
528 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST | REGULATOR_MODE_IDLE,
530 .num_consumer_supplies = ARRAY_SIZE(dcdc3_consumers),
531 .consumer_supplies = dcdc3_consumers,
537 .max_uV = 3400000, //0.85-3.4V
539 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
540 .valid_modes_mask = REGULATOR_MODE_STANDBY | REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST | REGULATOR_MODE_IDLE,
542 .num_consumer_supplies = ARRAY_SIZE(dcdc4_consumers),
543 .consumer_supplies = dcdc4_consumers,
548 struct regulator_init_data wm831x_regulator_init_epe[WM831X_MAX_EPE] = {
555 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
557 .num_consumer_supplies = ARRAY_SIZE(epe1_consumers),
558 .consumer_supplies = epe1_consumers,
566 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE,
568 .num_consumer_supplies = ARRAY_SIZE(epe2_consumers),
569 .consumer_supplies = epe2_consumers,
574 struct regulator_init_data wm831x_regulator_init_ldo[WM831X_MAX_LDO] = {
581 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
582 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
584 .num_consumer_supplies = ARRAY_SIZE(ldo1_consumers),
585 .consumer_supplies = ldo1_consumers,
593 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
594 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
596 .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
597 .consumer_supplies = ldo2_consumers,
605 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
606 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
608 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumers),
609 .consumer_supplies = ldo3_consumers,
617 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
618 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
620 .num_consumer_supplies = ARRAY_SIZE(ldo4_consumers),
621 .consumer_supplies = ldo4_consumers,
629 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
630 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
632 .num_consumer_supplies = ARRAY_SIZE(ldo5_consumers),
633 .consumer_supplies = ldo5_consumers,
641 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
642 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
644 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumers),
645 .consumer_supplies = ldo6_consumers,
653 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
654 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
656 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumers),
657 .consumer_supplies = ldo7_consumers,
665 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
666 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
668 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumers),
669 .consumer_supplies = ldo8_consumers,
677 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
678 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
680 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumers),
681 .consumer_supplies = ldo9_consumers,
689 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
690 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
692 .num_consumer_supplies = ARRAY_SIZE(ldo10_consumers),
693 .consumer_supplies = ldo10_consumers,
701 .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_MODE,
702 .valid_modes_mask = REGULATOR_MODE_IDLE | REGULATOR_MODE_NORMAL,
704 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumers),
705 .consumer_supplies = ldo11_consumers,
709 static int wm831x_init_pin_type(struct wm831x *wm831x)
711 struct wm831x_pdata *pdata;
712 struct rk29_gpio_expander_info *wm831x_gpio_settinginfo;
713 uint16_t wm831x_settingpin_num;
716 if (!wm831x || !wm831x->dev)
719 pdata = wm831x->dev->platform_data;
723 wm831x_gpio_settinginfo = pdata->settinginfo;
724 if (!wm831x_gpio_settinginfo)
727 wm831x_settingpin_num = pdata->settinginfolen;
728 for (i = 0; i < wm831x_settingpin_num; i++) {
729 if (wm831x_gpio_settinginfo[i].pin_type == GPIO_IN) {
730 wm831x_set_bits(wm831x,
731 WM831X_GPIO1_CONTROL + i,
732 WM831X_GPN_DIR_MASK | WM831X_GPN_TRI_MASK,
733 1 << WM831X_GPN_DIR_SHIFT | 1 << WM831X_GPN_TRI_SHIFT);
735 wm831x_set_bits(wm831x,
736 WM831X_GPIO1_CONTROL + i,
739 wm831x_set_bits(wm831x,
740 WM831X_GPIO1_CONTROL + i,
743 } // set gpio2 sleep/wakeup
746 wm831x_set_bits(wm831x,
747 WM831X_GPIO1_CONTROL + i,
748 WM831X_GPN_PULL_MASK,
749 0x0000); //disable pullup/down
750 wm831x_set_bits(wm831x,
751 WM831X_GPIO1_CONTROL + i,
752 WM831X_GPN_PWR_DOM_MASK,
754 wm831x_set_bits(wm831x,
755 WM831X_GPIO1_CONTROL + i,
758 } //set gpio10 as adc input
761 wm831x_set_bits(wm831x,
762 WM831X_GPIO1_CONTROL + i,
763 WM831X_GPN_DIR_MASK | WM831X_GPN_TRI_MASK,
764 1 << WM831X_GPN_TRI_SHIFT);
765 if (wm831x_gpio_settinginfo[i].pin_value == GPIO_HIGH) {
766 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << i, 1 << i);
768 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << i, 0 << i);
771 wm831x_set_bits(wm831x,
772 WM831X_GPIO1_CONTROL + i,
773 WM831X_GPN_PWR_DOM_MASK | WM831X_GPN_POL_MASK |WM831X_GPN_FN_MASK,
774 1 << WM831X_GPN_POL_SHIFT | 1 << WM831X_GPN_PWR_DOM_SHIFT | 1 << 0);
776 } // set gpio3 as clkout output 32.768K
782 for (i = 0; i < pdata->gpio_pin_num; i++) {
783 wm831x_set_bits(wm831x,
784 WM831X_GPIO1_CONTROL + i,
785 WM831X_GPN_PULL_MASK | WM831X_GPN_POL_MASK | WM831X_GPN_OD_MASK | WM831X_GPN_TRI_MASK,
786 1 << WM831X_GPN_POL_SHIFT | 1 << WM831X_GPN_TRI_SHIFT);
788 ret = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i);
789 printk("Gpio%d Pin Configuration = %x\n", i, ret);
797 #ifdef CONFIG_HAS_EARLYSUSPEND
798 void wm831x_pmu_early_suspend(struct regulator_dev *rdev)
800 struct regulator *dcdc;
801 struct regulator *ldo;
802 printk("%s\n", __func__);
804 dcdc = regulator_get(NULL, "dcdc4"); //vcc_io
805 regulator_set_voltage(dcdc, 2800000, 2800000);
806 regulator_set_mode(dcdc, REGULATOR_MODE_STANDBY);
807 regulator_enable(dcdc);
808 printk("%s set dcdc4 vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
812 ldo = regulator_get(NULL, "ldo1"); //
813 regulator_set_mode(ldo, REGULATOR_MODE_IDLE);
814 regulator_enable(ldo);
818 ldo = regulator_get(NULL, "ldo4");
819 regulator_set_mode(ldo, REGULATOR_MODE_IDLE);
820 regulator_enable(ldo);
824 ldo = regulator_get(NULL, "ldo6");
825 regulator_set_mode(ldo, REGULATOR_MODE_IDLE);
826 regulator_enable(ldo);
830 ldo = regulator_get(NULL, "ldo8");
831 regulator_set_mode(ldo, REGULATOR_MODE_IDLE);
832 regulator_enable(ldo);
837 void wm831x_pmu_early_resume(struct regulator_dev *rdev)
839 struct regulator *dcdc;
840 struct regulator *ldo;
841 printk("%s\n", __func__);
843 dcdc = regulator_get(NULL, "dcdc4"); //vcc_io
844 regulator_set_voltage(dcdc, 3000000, 3000000);
845 regulator_set_mode(dcdc, REGULATOR_MODE_FAST);
846 regulator_enable(dcdc);
847 printk("%s set dcdc4 vcc_io=%dmV end\n", __func__, regulator_get_voltage(dcdc));
851 ldo = regulator_get(NULL, "ldo1"); //
852 regulator_set_mode(ldo, REGULATOR_MODE_NORMAL);
853 regulator_enable(ldo);
857 ldo = regulator_get(NULL, "ldo4");
858 regulator_set_mode(ldo, REGULATOR_MODE_NORMAL);
859 regulator_enable(ldo);
863 ldo = regulator_get(NULL, "ldo6");
864 regulator_set_mode(ldo, REGULATOR_MODE_NORMAL);
865 regulator_enable(ldo);
869 ldo = regulator_get(NULL, "ldo8");
870 regulator_set_mode(ldo, REGULATOR_MODE_NORMAL);
871 regulator_enable(ldo);
876 void wm831x_pmu_early_suspend(struct regulator_dev *rdev)
879 void wm831x_pmu_early_resume(struct regulator_dev *rdev)
884 void __sramfunc board_pmu_wm8326_suspend(void)
887 cru_writel(CRU_CLKGATE5_GRFCLK_ON,CRU_CLKGATE5_CON_ADDR); //open grf clk
888 grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
889 grf_writel(GPIO6_PB1_DO_HIGH, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output low
890 grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
893 void __sramfunc board_pmu_wm8326_resume(void)
896 grf_writel(GPIO6_PB1_DIR_OUT, GRF_GPIO6L_DIR_ADDR);
897 grf_writel(GPIO6_PB1_DO_LOW, GRF_GPIO6L_DO_ADDR); //set gpio6_b1 output high
898 grf_writel(GPIO6_PB1_EN_MASK, GRF_GPIO6L_EN_ADDR);
899 #ifdef CONFIG_CLK_SWITCH_TO_32K
900 sram_32k_udelay(10000);
906 static struct wm831x_pdata wm831x_platdata = {
908 /** Called before subdevices are set up */
909 .pre_init = wm831x_pre_init,
910 /** Called after subdevices are set up */
911 .post_init = wm831x_post_init,
912 /** Called before subdevices are power down */
913 .last_deinit = wm831x_last_deinit,
915 #if defined(CONFIG_GPIO_WM831X)
916 .gpio_base = WM831X_GPIO_EXPANDER_BASE,
917 .gpio_pin_num = WM831X_TOTOL_GPIO_NUM,
918 .settinginfo = wm831x_gpio_settinginfo,
919 .settinginfolen = ARRAY_SIZE(wm831x_gpio_settinginfo),
920 .pin_type_init = wm831x_init_pin_type,
921 .irq_base = NR_GIC_IRQS + NR_GPIO_IRQS,
924 /** LED1 = 0 and so on */
925 .status = { &wm831x_status_platdata[0], &wm831x_status_platdata[1] },
927 /** DCDC1 = 0 and so on */
929 &wm831x_regulator_init_dcdc[0],
930 &wm831x_regulator_init_dcdc[1],
931 &wm831x_regulator_init_dcdc[2],
932 &wm831x_regulator_init_dcdc[3],
935 /** EPE1 = 0 and so on */
936 //.epe = { &wm831x_regulator_init_epe[0], &wm831x_regulator_init_epe[1] },
938 /** LDO1 = 0 and so on */
940 &wm831x_regulator_init_ldo[0],
941 &wm831x_regulator_init_ldo[1],
942 &wm831x_regulator_init_ldo[2],
943 &wm831x_regulator_init_ldo[3],
944 &wm831x_regulator_init_ldo[4],
945 &wm831x_regulator_init_ldo[5],
946 &wm831x_regulator_init_ldo[6],
947 &wm831x_regulator_init_ldo[7],
948 &wm831x_regulator_init_ldo[8],
949 &wm831x_regulator_init_ldo[9],
950 &wm831x_regulator_init_ldo[10],