2 * arch/arm/mach-rk29/include/mach/iomux.h
4 *Copyright (C) 2010 ROCKCHIP, Inc.
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #ifndef __RK29_IOMUX_H__
17 #define __RK29_IOMUX_H__
22 #define GPIO0A_GPIO0A7 0
23 #define GPIO0A_I2S_8CH_SDI 1
24 #define GPIO0A_GPIO0A6 0
25 #define GPIO0A_HOST_DRV_VBUS 1
26 #define GPIO0A_GPIO0A5 0
27 #define GPIO0A_OTG_DRV_VBUS 1
28 #define GPIO0A_GPIO0A4 0
30 #define GPIO0A_GPIO0A3 0
32 #define GPIO0A_GPIO0A2 0
33 #define GPIO0A_HDMI_I2C_SDA 1
34 #define GPIO0A_GPIO0A1 0
35 #define GPIO0A_HDMI_I2C_SCL 1
36 #define GPIO0A_GPIO0A0 0
37 #define GPIO0A_HDMI_HOT_PLUG_IN 1
41 #define GPIO0B_GPIO0B7 0
42 #define GPIO0B_I2S_8CH_SDO3 1
43 #define GPIO0B_GPIO0B6 0
44 #define GPIO0B_I2S_8CH_SDO2 1
45 #define GPIO0B_GPIO0B5 0
46 #define GPIO0B_I2S_8CH_SDO1 1
47 #define GPIO0B_GPIO0B4 0
48 #define GPIO0B_I2S_8CH_SDO0 1
49 #define GPIO0B_GPIO0B3 0
50 #define GPIO0B_I2S_8CH_LRCK_TX 1
51 #define GPIO0B_GPIO0B2 0
52 #define GPIO0B_I2S_8CH_LRCK_RX 1
53 #define GPIO0B_GPIO0B1 0
54 #define GPIO0B_I2S_8CH_SCLK 1
55 #define GPIO0B_GPIO0B0 0
56 #define GPIO0B_I2S_8CH_CLK 1
60 #define GPIO0C_GPIO0C7 0
61 #define GPIO0C_TRACE_CTL 1
62 #define GPIO0C_SMC_ADDR3 2
63 #define GPIO0C_GPIO0C6 0
64 #define GPIO0C_TRACE_CLK 1
65 #define GPIO0C_SMC_ADDR2 2
66 #define GPIO0C_GPIO0C5 0
67 #define GPIO0C_I2S1_2CH_SDO 1
68 #define GPIO0C_GPIO0C4 0
69 #define GPIO0C_I2S1_2CH_SDI 1
70 #define GPIO0C_GPIO0C3 0
71 #define GPIO0C_I2S1_2CH_LRCK_TX 1
72 #define GPIO0C_GPIO0C2 0
73 #define GPIO0C_I2S1_2CH_LRCK_RX 1
74 #define GPIO0C_GPIO0C1 0
75 #define GPIO0C_I2S1_2CH_SCLK 1
76 #define GPIO0C_GPIO0C0 0
77 #define GPIO0C_I2S1_2CH_CLK 1
82 #define GPIO0D_GPIO0D7 0
84 #define GPIO0D_GPIO0D6 0
86 #define GPIO0D_GPIO0D5 0
87 #define GPIO0D_I2S2_2CH_SDO 1
88 #define GPIO0D_SMC_ADDR1 2
89 #define GPIO0D_GPIO0D4 0
90 #define GPIO0D_I2S2_2CH_SDI 1
91 #define GPIO0D_SMC_ADDR0 2
92 #define GPIO0D_GPIO0D3 0
93 #define GPIO0D_I2S2_2CH_LRCK_TX 1
94 #define GPIO0D_SMC_ADV_N 2
95 #define GPIO0D_GPIO0D2 0
96 #define GPIO0D_I2S2_2CH_LRCK_RX 1
97 #define GPIO0D_SMC_OE_N 2
98 #define GPIO0D_GPIO0D1 0
99 #define GPIO0D_I2S2_2CH_SCLK 1
100 #define GPIO0D_SMC_WE_N 2
101 #define GPIO0D_GPIO0D0 0
102 #define GPIO0D_I2S2_2CH_CLK 1
103 #define GPIO0D_SMC_CSN0 2
107 #define GPIO1A_GPIO1A7 0
108 #define GPIO1A_UART1_RTS_N 1
109 #define GPIO1A_SPI0_TXD 2
110 #define GPIO1A_GPIO1A6 0
111 #define GPIO1A_UART1_CTS_N 1
112 #define GPIO1A_SPI0_RXD 2
113 #define GPIO1A_GPIO1A5 0
114 #define GPIO1A_UART1_SOUT 1
115 #define GPIO1A_SPI0_CLK 2
116 #define GPIO1A_GPIO1A4 0
117 #define GPIO1A_UART1_SIN 1
118 #define GPIO1A_SPI0_CSN0 2
119 #define GPIO1A_GPIO1A3 0
120 #define GPIO1A_UART0_RTS_N 1
121 #define GPIO1A_GPIO1A2 0
122 #define GPIO1A_UART0_CTS_N 1
123 #define GPIO1A_GPIO1A1 0
124 #define GPIO1A_UART0_SOUT 1
125 #define GPIO1A_GPIO1A0 0
126 #define GPIO1A_UART0_SIN 1
130 #define GPIO1B_GPIO1B7 0
131 #define GPIO1B_CIF_DATA11 1
132 #define GPIO1B_GPIO1B6 0
133 #define GPIO1B_CIF_DATA10 1
134 #define GPIO1B_GPIO1B5 0
135 #define GPIO1B_CIF0_DATA1 1
136 #define GPIO1B_GPIO1B4 0
137 #define GPIO1B_CIF0_DATA0 1
138 #define GPIO1B_GPIO1B3 0
139 #define GPIO1B_CIF0_CLKOUT 1
140 #define GPIO1B_GPIO1B2 0
141 #define GPIO1B_SPDIF_TX 1
142 #define GPIO1B_GPIO1B1 0
143 #define GPIO1B_UART2_SOUT 1
144 #define GPIO1B_GPIO1B0 0
145 #define GPIO1B_UART2_SIN 1
149 #define GPIO1C_GPIO1C7 0
150 #define GPIO1C_CIF_DATA9 1
151 #define GPIO1C_RMII_RXD0 2
152 #define GPIO1C_GPIO1C6 0
153 #define GPIO1C_CIF_DATA8 1
154 #define GPIO1C_RMII_RXD1 2
155 #define GPIO1C_GPIO1C5 0
156 #define GPIO1C_CIF_DATA7 1
157 #define GPIO1C_RMII_CRS_DVALID 2
158 #define GPIO1C_GPIO1C4 0
159 #define GPIO1C_CIF_DATA6 1
160 #define GPIO1C_RMII_RX_ERR 2
161 #define GPIO1C_GPIO1C3 0
162 #define GPIO1C_CIF_DATA5 1
163 #define GPIO1C_RMII_TXD0 2
164 #define GPIO1C_GPIO1C2 0
165 #define GPIO1C_CIF1_DATA4 1
166 #define GPIO1C_RMII_TXD1 2
167 #define GPIO1C_GPIO1C1 0
168 #define GPIO1C_CIF_DATA3 1
169 #define GPIO1C_RMII_TX_EN 2
170 #define GPIO1C_GPIO1C0 0
171 #define GPIO1C_CIF1_DATA2 1
172 #define GPIO1C_RMII_CLKOUT 2
173 #define GPIO1C_RMII_CLKIN 3
177 #define GPIO1D_GPIO1D7 0
178 #define GPIO1D_CIF1_CLKOUT 1
179 #define GPIO1D_GPIO1D6 0
180 #define GPIO1D_CIF1_DATA11 1
181 #define GPIO1D_GPIO1D5 0
182 #define GPIO1D_CIF1_DATA10 1
183 #define GPIO1D_GPIO1D4 0
184 #define GPIO1D_CIF1_DATA1 1
185 #define GPIO1D_GPIO1D3 0
186 #define GPIO1D_CIF1_DATA0 1
187 #define GPIO1D_GPIO1D2 0
188 #define GPIO1D_CIF1_CLKIN 1
189 #define GPIO1D_GPIO1D1 0
190 #define GPIO1D_CIF1_HREF 1
191 #define GPIO1D_MII_MDCLK 2
192 #define GPIO1D_GPIO1D0 0
193 #define GPIO1D_CIF1_VSYNC 1
194 #define GPIO1D_MII_MD 2
198 #define GPIO2A_GPIO2A7 0
199 #define GPIO2A_LCDC1_DATA7 1
200 #define GPIO2A_SMC_ADDR11 2
201 #define GPIO2A_GPIO2A6 0
202 #define GPIO2A_LCDC1_DATA6 1
203 #define GPIO2A_SMC_ADDR10 2
204 #define GPIO2A_GPIO2A5 0
205 #define GPIO2A_LCDC1_DATA5 1
206 #define GPIO2A_SMC_ADDR9 2
207 #define GPIO2A_GPIO2A4 0
208 #define GPIO2A_LCDC1_DATA4 1
209 #define GPIO2A_SMC_ADDR8 2
210 #define GPIO2A_GPIO2A3 0
211 #define GPIO2A_LCDC_DATA3 1
212 #define GPIO2A_SMC_ADDR7 2
213 #define GPIO2A_GPIO2A2 0
214 #define GPIO2A_LCDC_DATA2 1
215 #define GPIO2A_SMC_ADDR6 2
216 #define GPIO2A_GPIO2A1 0
217 #define GPIO2A_LCDC1_DATA1 1
218 #define GPIO2A_SMC_ADDR5 2
219 #define GPIO2A_GPIO2A0 0
220 #define GPIO2A_LCDC1_DATA0 1
221 #define GPIO2A_SMC_ADDR4 2
225 #define GPIO2B_GPIO2B7 0
226 #define GPIO2B_LCDC1_DATA15 1
227 #define GPIO2B_SMC_ADDR19 2
228 #define GPIO2B_HSADC_DATA7 3
229 #define GPIO2B_GPIO2B6 0
230 #define GPIO2B_LCDC1_DATA14 1
231 #define GPIO2B_SMC_ADDR18 2
232 #define GPIO2B_TS_SYNC 3
233 #define GPIO2B_GPIO2B5 0
234 #define GPIO2B_LCDC1_DATA13 1
235 #define GPIO2B_SMC_ADDR17 2
236 #define GPIO2B_HSADC_DATA8 3
237 #define GPIO2B_GPIO2B4 0
238 #define GPIO2B_LCDC1_DATA12 1
239 #define GPIO2B_SMC_ADDR16 2
240 #define GPIO2B_HSADC_DATA9 3
241 #define GPIO2B_GPIO2B3 0
242 #define GPIO2B_LCDC1_DATA11 1
243 #define GPIO2B_SMC_ADDR15 2
244 #define GPIO2B_GPIO2B2 0
245 #define GPIO2B_LCDC1_DATA10 1
246 #define GPIO2B_SMC_ADDR14 2
247 #define GPIO2B_GPIO2B1 0
248 #define GPIO2B_LCDC1_DATA9 1
249 #define GPIO2B_SMC_ADDR13 2
250 #define GPIO2B_GPIO2B0 0
251 #define GPIO2B_LCDC1_DATA8 1
252 #define GPIO2B_SMC_ADDR12 2
256 #define GPIO2C_GPIO2C7 0
257 #define GPIO2C_LCDC1_DATA23 1
258 #define GPIO2C_SPI1_CSN1 2
259 #define GPIO2C_HSADC_DATA4 3
260 #define GPIO2C_GPIO2C6 0
261 #define GPIO2C_LCDC1_DATA22 1
262 #define GPIO2C_SPI1_RXD 2
263 #define GPIO2C_HSADC_DATA3 3
264 #define GPIO2C_GPIO2C5 0
265 #define GPIO2C_LCDC1_DATA21 1
266 #define GPIO2C_SPI1_TXD 2
267 #define GPIO2C_HSADC_DATA2 3
268 #define GPIO2C_GPIO2C4 0
269 #define GPIO2C_LCDC1_DATA20 1
270 #define GPIO2C_SPI1_CSN0 2
271 #define GPIO2C_HSADC_DATA1 3
272 #define GPIO2C_GPIO2C3 0
273 #define GPIO2C_LCDC1_DATA19 1
274 #define GPIO2C_SPI1_CLK 2
275 #define GPIO2C_HSADC_DATA0 3
276 #define GPIO2C_GPIO2C2 0
277 #define GPIO2C_LCDC1_DATA18 1
278 #define GPIO2C_SMC_BLS_N1 2
279 #define GPIO2C_HSADC_DATA5 3
280 #define GPIO2C_GPIO2C1 0
281 #define GPIO2C_LCDC1_DATA17 1
282 #define GPIO2C_SMC_BLS_N0 2
283 #define GPIO2C_HSADC_DATA6 3
284 #define GPIO2C_GPIO2C0 0
285 #define GPIO2C_LCDC_DATA16 1
286 #define GPIO2C_GPS_CLK 2
287 #define GPIO2C_HSADC_CLKOUT 3
291 #define GPIO2D_GPIO2D7 0
292 #define GPIO2D_I2C1_SCL 1
293 #define GPIO2D_GPIO2D6 0
294 #define GPIO2D_I2C1_SDA 1
295 #define GPIO2D_GPIO2D5 0
296 #define GPIO2D_I2C0_SCL 1
297 #define GPIO2D_GPIO2D4 0
298 #define GPIO2D_I2C0_SDA 1
299 #define GPIO2D_GPIO2D3 0
300 #define GPIO2D_LCDC1_VSYNC 1
301 #define GPIO2D_GPIO2D2 0
302 #define GPIO2D_LCDC1_HSYNC 1
303 #define GPIO2D_GPIO2D1 0
304 #define GPIO2D_LCDC1_DEN 1
305 #define GPIO2D_SMC_CSN1 2
306 #define GPIO2D_GPIO2D0 0
307 #define GPIO2D_LCDC1_DCLK 1
311 #define GPIO3A_GPIO3A7 0
312 #define GPIO3A_SDMMC0_PWR_EN 1 //#define GPIO3A_SDMMC0_WRITE_PRT 1 //Modifyed by xbw,at 2012-03-05
313 #define GPIO3A_GPIO3A6 0
314 #define GPIO3A_SDMMC0_RSTN_OUT 1
315 #define GPIO3A_GPIO3A5 0
316 #define GPIO3A_I2C4_SCL 1
317 #define GPIO3A_GPIO3A4 0
318 #define GPIO3A_I2C4_SDA 1
319 #define GPIO3A_GPIO3A3 0
320 #define GPIO3A_I2C3_SCL 1
321 #define GPIO3A_GPIO3A2 0
322 #define GPIO3A_I2C3_SDA 1
323 #define GPIO3A_GPIO3A1 0
324 #define GPIO3A_I2C2_SCL 1
325 #define GPIO3A_GPIO3A0 0
326 #define GPIO3A_I2C2_SDA 1
330 #define GPIO3B_GPIO3B7 0
331 #define GPIO3B_SDMMC0_WRITE_PRT 1
332 #define GPIO3B_GPIO3B6 0
333 #define GPIO3B_SDMMC0_DETECT_N 1
334 #define GPIO3B_GPIO3B5 0
335 #define GPIO3B_SDMMC0_DATA3 1
336 #define GPIO3B_GPIO3B4 0
337 #define GPIO3B_SDMMC0_DATA2 1
338 #define GPIO3B_GPIO3B3 0
339 #define GPIO3B_SDMMC0_DATA1 1
340 #define GPIO3B_GPIO3B2 0
341 #define GPIO3B_SDMMC0_DATA0 1
342 #define GPIO3B_GPIO3B1 0
343 #define GPIO3B_SDMMC0_CMD 1
344 #define GPIO3B_GPIO3B0 0
345 #define GPIO3B_SDMMC0_CLKOUT 1
349 #define GPIO3C_GPIO3C7 0
350 #define GPIO3C_SDMMC1_WRITE_PRT 1
351 #define GPIO3C_GPIO3C6 0
352 #define GPIO3C_SDMMC1_DETECT_N 1
353 #define GPIO3C_GPIO3C5 0
354 #define GPIO3C_SDMMC1_CLKOUT 1
355 #define GPIO3C_GPIO3C4 0
356 #define GPIO3C_SDMMC1_DATA3 1
357 #define GPIO3C_GPIO3C3 0
358 #define GPIO3C_SDMMC1_DATA2 1
359 #define GPIO3C_GPIO3C2 0
360 #define GPIO3C_SDMMC1_DATA1 1
361 #define GPIO3C_GPIO3C1 0
362 #define GPIO3C_SDMMC1_DATA0 1
363 #define GPIO3C_GPIO3C0 0
364 #define GPIO3C_SMMC1_CMD 1
368 #define GPIO3D_GPIO3D7 0
369 #define GPIO3D_FLASH_DQS 1
370 #define GPIO3D_EMMC_CLKOUT 2
371 #define GPIO3D_GPIO3D6 0
372 #define GPIO3D_UART3_RTS_N 1
373 #define GPIO3D_GPIO3D5 0
374 #define GPIO3D_UART3_CTS_N 1
375 #define GPIO3D_GPIO3D4 0
376 #define GPIO3D_UART3_SOUT 1
377 #define GPIO3D_GPIO3D3 0
378 #define GPIO3D_UART3_SIN 1
379 #define GPIO3D_GPIO3D2 0
380 #define GPIO3D_SDMMC1_INT_N 1
381 #define GPIO3D_GPIO3D1 0
382 #define GPIO3D_SDMMC1_BACKEND_PWR 1
383 #define GPIO3D_GPIO3D0 0
384 #define GPIO3D_SDMMC1_PWR_EN 1
388 #define GPIO4A_GPIO4A7 0
389 #define GPIO4A_FLASH_DATA15 1
390 #define GPIO4A_GPIO4A6 0
391 #define GPIO4A_FLASH_DATA14 1
392 #define GPIO4A_GPIO4A5 0
393 #define GPIO4A_FLASH_DATA13 1
394 #define GPIO4A_GPIO4A4 0
395 #define GPIO4A_FLASH_DATA12 1
396 #define GPIO4A_GPIO4A3 0
397 #define GPIO4A_FLASH_DATA11 1
398 #define GPIO4A_GPIO4A2 0
399 #define GPIO4A_FLASH_DATA10 1
400 #define GPIO4A_GPIO4A1 0
401 #define GPIO4A_FLASH_DATA9 1
402 #define GPIO4A_GPIO4A0 0
403 #define GPIO4A_FLASH_DATA8 1
407 #define GPIO4B_GPIO4B7 0
408 #define GPIO4B_SPI0_CSN1 1
409 #define GPIO4B_GPIO4B6 0
410 #define GPIO4B_FLASH_CSN7 1
411 #define GPIO4B_GPIO4B5 0
412 #define GPIO4B_FLASH_CSN6 1
413 #define GPIO4B_GPIO4B4 0
414 #define GPIO4B_FLASH_CSN5 1
415 #define GPIO4B_GPIO4B3 0
416 #define GPIO4B_FLASH_CSN4 1
417 #define GPIO4B_GPIO4B2 0
418 #define GPIO4B_FLASH_CSN3 1
419 #define GPIO4B_EMMC_RSTN_OUT 2
420 #define GPIO4B_GPIO4B1 0
421 #define GPIO4B_FLASH_CSN2 1
422 #define GPIO4B_EMMC_CMD 2
423 #define GPIO4B_GPIO4B0 0
424 #define GPIO4B_FLASH_CSN1 1
428 #define GPIO4C_GPIO4C7 0
429 #define GPIO4C_SMC_DATA7 1
430 #define GPIO4C_TRACE_DATA7 2
431 #define GPIO4C_GPIO4C6 0
432 #define GPIO4C_SMC_DATA6 1
433 #define GPIO4C_TRACE_DATA6 2
434 #define GPIO4C_GPIO4C5 0
435 #define GPIO4C_SMC_DATA5 1
436 #define GPIO4C_TRACE_DATA5 2
437 #define GPIO4C_GPIO4C4 0
438 #define GPIO4C_SMC_DATA4 1
439 #define GPIO4C_TRACE_DATA4 2
440 #define GPIO4C_GPIO4C3 0
441 #define GPIO4C_SMC_DATA3 1
442 #define GPIO4C_TRACE_DATA3 2
443 #define GPIO4C_GPIO4C2 0
444 #define GPIO4C_SMC_DATA2 1
445 #define GPIO4C_TRACE_DATA2 2
446 #define GPIO4C_GPIO4C1 0
447 #define GPIO4C_SMC_DATA1 1
448 #define GPIO4C_TRACE_DATA1 2
449 #define GPIO4C_GPIO4C0 0
450 #define GPIO4C_SMC_DATA0 1
451 #define GPIO4C_TRACE_DATA0 2
455 #define GPIO4D_GPIO4D7 0
456 #define GPIO4D_SMC_DATA15 1
457 #define GPIO4D_TRACE_DATA15 2
458 #define GPIO4D_GPIO4D6 0
459 #define GPIO4D_SMC_DATA14 1
460 #define GPIO4D_TRACE_DATA14 2
461 #define GPIO4D_GPIO4D5 0
462 #define GPIO4D_SMC_DATA13 1
463 #define GPIO4D_TRACE_DATA13 2
464 #define GPIO4D_GPIO4D4 0
465 #define GPIO4D_SMC_DATA12 1
466 #define GPIO4D_TRACE_DATA12 2
467 #define GPIO4D_GPIO4D3 0
468 #define GPIO4D_SMC_DATA11 1
469 #define GPIO4D_TRACE_DATA11 2
470 #define GPIO4D_GPIO4D2 0
471 #define GPIO4D_SMC_DATA10 1
472 #define GPIO4D_TRACE_DATA10 2
473 #define GPIO4D_GPIO4D1 0
474 #define GPIO4D_SMC_DATA9 1
475 #define GPIO4D_TRACE_DATA9 2
476 #define GPIO4D_GPIO4D0 0
477 #define GPIO4D_SMC_DATA8 1
478 #define GPIO4D_TRACE_DATA8 2
482 #define GPIO6B_GPIO6B7 0
483 #define GPIO6B_TEST_CLOCK_OUT 1
490 #define GRF_GPIO0L_DIR 0x0000
491 #define GRF_GPIO0H_DIR 0x0004
492 #define GRF_GPIO1L_DIR 0x0008
493 #define GRF_GPIO1H_DIR 0x000c
494 #define GRF_GPIO2L_DIR 0x0010
495 #define GRF_GPIO2H_DIR 0x0014
496 #define GRF_GPIO3L_DIR 0x0018
497 #define GRF_GPIO3H_DIR 0x001c
498 #define GRF_GPIO4L_DIR 0x0020
499 #define GRF_GPIO4H_DIR 0x0024
500 #define GRF_GPIO6L_DIR 0x0030
501 #define GRF_GPIO0L_DO 0x0038
502 #define GRF_GPIO0H_DO 0x003c
503 #define GRF_GPIO1L_DO 0x0040
504 #define GRF_GPIO1H_DO 0x0044
505 #define GRF_GPIO2L_DO 0x0048
506 #define GRF_GPIO2H_DO 0x004c
507 #define GRF_GPIO3L_DO 0x0050
508 #define GRF_GPIO3H_DO 0x0054
509 #define GRF_GPIO4L_DO 0x0058
510 #define GRF_GPIO4H_DO 0x005c
511 #define GRF_GPIO6L_DO 0x0068
512 #define GRF_GPIO0L_EN 0x0070
513 #define GRF_GPIO0H_EN 0x0074
514 #define GRF_GPIO1L_EN 0x0078
515 #define GRF_GPIO1H_EN 0x007c
516 #define GRF_GPIO2L_EN 0x0080
517 #define GRF_GPIO2H_EN 0x0084
518 #define GRF_GPIO3L_EN 0x0088
519 #define GRF_GPIO3H_EN 0x008c
520 #define GRF_GPIO4L_EN 0x0090
521 #define GRF_GPIO4H_EN 0x0094
522 #define GRF_GPIO6L_EN 0x00a0
523 #define GRF_GPIO0A_IOMUX RK30_GRF_BASE+0x00a8
524 #define GRF_GPIO0B_IOMUX RK30_GRF_BASE+0x00ac
525 #define GRF_GPIO0C_IOMUX RK30_GRF_BASE+0x00b0
526 #define GRF_GPIO0D_IOMUX RK30_GRF_BASE+0x00b4
527 #define GRF_GPIO1A_IOMUX RK30_GRF_BASE+0x00b8
528 #define GRF_GPIO1B_IOMUX RK30_GRF_BASE+0x00bc
529 #define GRF_GPIO1C_IOMUX RK30_GRF_BASE+0x00c0
530 #define GRF_GPIO1D_IOMUX RK30_GRF_BASE+0x00c4
531 #define GRF_GPIO2A_IOMUX RK30_GRF_BASE+0x00c8
532 #define GRF_GPIO2B_IOMUX RK30_GRF_BASE+0x00cc
533 #define GRF_GPIO2C_IOMUX RK30_GRF_BASE+0x00d0
534 #define GRF_GPIO2D_IOMUX RK30_GRF_BASE+0x00d4
535 #define GRF_GPIO3A_IOMUX RK30_GRF_BASE+0x00d8
536 #define GRF_GPIO3B_IOMUX RK30_GRF_BASE+0x00dc
537 #define GRF_GPIO3C_IOMUX RK30_GRF_BASE+0x00e0
538 #define GRF_GPIO3D_IOMUX RK30_GRF_BASE+0x00e4
539 #define GRF_GPIO4A_IOMUX RK30_GRF_BASE+0x00e8
540 #define GRF_GPIO4B_IOMUX RK30_GRF_BASE+0x00ec
541 #define GRF_GPIO4C_IOMUX RK30_GRF_BASE+0x00f0
542 #define GRF_GPIO4D_IOMUX RK30_GRF_BASE+0x00f4
543 #define GRF_GPIO6B_IOMUX RK30_GRF_BASE+0x010c
544 #define GRF_GPIO0L_PULL 0x0118
545 #define GRF_GPIO0H_PULL 0x011c
546 #define GRF_GPIO1L_PULL 0x0120
547 #define GRF_GPIO1H_PULL 0x0124
548 #define GRF_GPIO2L_PULL 0x0128
549 #define GRF_GPIO2H_PULL 0x012c
550 #define GRF_GPIO3L_PULL 0x0130
551 #define GRF_GPIO3H_PULL 0x0134
552 #define GRF_GPIO4L_PULL 0x0138
553 #define GRF_GPIO4H_PULL 0x013c
554 #define GRF_GPIO6L_PULL 0x0148
555 #define GRF_SOC_CON0 0x0150
556 #define GRF_SOC_CON1 0x0154
557 #define GRF_SOC_CON2 0x0158
558 #define GRF_SOC_STATUS0 0x015c
559 #define GRF_DMAC1_CON0 0x0160
560 #define GRF_DMAC1_CON1 0x0164
561 #define GRF_DMAC1_CON2 0x0168
562 #define GRF_DMAC2_CON0 0x016c
563 #define GRF_DMAC2_CON1 0x0170
564 #define GRF_DMAC2_CON2 0x0174
565 #define GRF_DMAC2_CON3 0x0178
566 #define GRF_UOC0_CON0 0x017c
567 #define GRF_UOC0_CON1 0x0180
568 #define GRF_UOC0_CON2 0x0184
569 #define GRF_UOC1_CON0 0x0188
570 #define GRF_UOC1_CON1 0x018c
571 #define GRF_UOC1_CON2 0x0190
572 #define GRF_UOC1_CON3 0x0194
573 #define GRF_DDRC_CON0 0x0198
574 #define GRF_DDRC_STAT 0x019c
575 #define GRF_OS_REG0 0x01c8
576 #define GRF_OS_REG1 0x01cc
577 #define GRF_OS_REG2 0x01d0
578 #define GRF_OS_REG3 0x01d4
582 #define GPIO0A7_I2S8CHSDI_NAME "gpio0a7_i2s8chsdi_name"
583 #define GPIO0A6_HOSTDRVVBUS_NAME "gpio0a6_hostdrvvbus_name"
584 #define GPIO0A5_OTGDRVVBUS_NAME "gpio0a5_otgdrvvbus_name"
585 #define GPIO0A4_PWM1_NAME "gpio0a4_pwm1_name"
586 #define GPIO0A3_PWM0_NAME "gpio0a3_pwm0_name"
587 #define GPIO0A2_HDMII2CSDA_NAME "gpio0a2_hdmii2csda_name"
588 #define GPIO0A1_HDMII2CSCL_NAME "gpio0a1_hdmii2cscl_name"
589 #define GPIO0A0_HDMIHOTPLUGIN_NAME "gpio0a0_hdmihotplugin_name"
593 #define GPIO0B7_I2S8CHSDO3_NAME "gpio0b7_i2s8chsdo3_name"
594 #define GPIO0B6_I2S8CHSDO2_NAME "gpio0b6_i2s8chsdo2_name"
595 #define GPIO0B5_I2S8CHSDO1_NAME "gpio0b5_i2s8chsdo1_name"
596 #define GPIO0B4_I2S8CHSDO0_NAME "gpio0b4_i2s8chsdo0_name"
597 #define GPIO0B3_I2S8CHLRCKTX_NAME "gpio0b3_i2s8chlrcktx_name"
598 #define GPIO0B2_I2S8CHLRCKRX_NAME "gpio0b2_i2s8chlrckrx_name"
599 #define GPIO0B1_I2S8CHSCLK_NAME "gpio0b1_i2s8chsclk_name"
600 #define GPIO0B0_I2S8CHCLK_NAME "gpio0b0_i2s8chclk_name"
604 #define GPIO0C7_TRACECTL_SMCADDR3_NAME "gpio0c7_tracectl_smcaddr3_name"
605 #define GPIO0C6_TRACECLK_SMCADDR2_NAME "gpio0c6_traceclk_smcaddr2_name"
606 #define GPIO0C5_I2S12CHSDO_NAME "gpio0c5_i2s12chsdo_name"
607 #define GPIO0C4_I2S12CHSDI_NAME "gpio0c4_i2s12chsdi_name"
608 #define GPIO0C3_I2S12CHLRCKTX_NAME "gpio0c3_i2s12chlrcktx_name"
609 #define GPIO0C2_I2S12CHLRCKRX_NAME "gpio0c2_i2s12chlrckrx_name"
610 #define GPIO0C1_I2S12CHSCLK_NAME "gpio0c1_i2s12chsclk_name"
611 #define GPIO0C0_I2S12CHCLK_NAME "gpio0c0_i2s12chclk_name"
615 #define GPIO0D7_PWM3_NAME "gpio0d7_pwm3_name"
616 #define GPIO0D6_PWM2_NAME "gpio0d6_pwm2_name"
617 #define GPIO0D5_I2S22CHSDO_SMCADDR1_NAME "gpio0d5_i2s22chsdo_smcaddr1_name"
618 #define GPIO0D4_I2S22CHSDI_SMCADDR0_NAME "gpio0d4_i2s22chsdi_smcaddr0_name"
619 #define GPIO0D3_I2S22CHLRCKTX_SMCADVN_NAME "gpio0d3_i2s22chlrcktx_smcadvn_name"
620 #define GPIO0D2_I2S22CHLRCKRX_SMCOEN_NAME "gpio0d2_i2s22chlrckrx_smcoen_name"
621 #define GPIO0D1_I2S22CHSCLK_SMCWEN_NAME "gpio0d1_i2s22chsclk_smcwen_name"
622 #define GPIO0D0_I2S22CHCLK_SMCCSN0_NAME "gpio0d0_i2s22chclk_smccsn0_name"
626 #define GPIO1A7_UART1RTSN_SPI0TXD_NAME "gpio1a7_uart1rtsn_spi0txd_name"
627 #define GPIO1A6_UART1CTSN_SPI0RXD_NAME "gpio1a6_uart1ctsn_spi0rxd_name"
628 #define GPIO1A5_UART1SOUT_SPI0CLK_NAME "gpio1a5_uart1sout_spi0clk_name"
629 #define GPIO1A4_UART1SIN_SPI0CSN0_NAME "gpio1a4_uart1sin_spi0csn0_name"
630 #define GPIO1A3_UART0RTSN_NAME "gpio1a3_uart0rtsn_name"
631 #define GPIO1A2_UART0CTSN_NAME "gpio1a2_uart0ctsn_name"
632 #define GPIO1A1_UART0SOUT_NAME "gpio1a1_uart0sout_name"
633 #define GPIO1A0_UART0SIN_NAME "gpio1a0_uart0sin_name"
638 #define GPIO1B7_CIFDATA11_NAME "gpio1b7_cifdata11_name"
639 #define GPIO1B6_CIFDATA10_NAME "gpio1b6_cifdata10_name"
640 #define GPIO1B5_CIF0DATA1_NAME "gpio1b5_cif0data1_name"
641 #define GPIO1B4_CIF0DATA0_NAME "gpio1b4_cif0data0_name"
642 #define GPIO1B3_CIF0CLKOUT_NAME "gpio1b3_cif0clkout_name"
643 #define GPIO1B2_SPDIFTX_NAME "gpio1b2_spdiftx_name"
644 #define GPIO1B1_UART2SOUT_NAME "gpio1b1_uart2sout_name"
645 #define GPIO1B0_UART2SIN_NAME "gpio1b0_uart2sin_name"
649 #define GPIO1C7_CIFDATA9_RMIIRXD0_NAME "gpio1c7_cifdata9_rmiirxd0_name"
650 #define GPIO1C6_CIFDATA8_RMIIRXD1_NAME "gpio1c6_cifdata8_rmiirxd1_name"
651 #define GPIO1C5_CIFDATA7_RMIICRSDVALID_NAME "gpio1c5_cifdata7_rmiicrsdvalid_name"
652 #define GPIO1C4_CIFDATA6_RMIIRXERR_NAME "gpio1c4_cifdata6_rmiirxerr_name"
653 #define GPIO1C3_CIFDATA5_RMIITXD0_NAME "gpio1c3_cifdata5_rmiitxd0_name"
654 #define GPIO1C2_CIF1DATA4_RMIITXD1_NAME "gpio1c2_cif1data4_rmiitxd1_name"
655 #define GPIO1C1_CIFDATA3_RMIITXEN_NAME "gpio1c1_cifdata3_rmiitxen_name"
656 #define GPIO1C0_CIF1DATA2_RMIICLKOUT_RMIICLKIN_NAME "gpio1c0_cif1data2_rmiiclkout_rmiiclkin_name"
660 #define GPIO1D7_CIF1CLKOUT_NAME "gpio1d7_cif1clkout_name"
661 #define GPIO1D6_CIF1DATA11_NAME "gpio1d6_cif1data11_name"
662 #define GPIO1D5_CIF1DATA10_NAME "gpio1d5_cif1data10_name"
663 #define GPIO1D4_CIF1DATA1_NAME "gpio1d4_cif1data1_name"
664 #define GPIO1D3_CIF1DATA0_NAME "gpio1d3_cif1data0_name"
665 #define GPIO1D2_CIF1CLKIN_NAME "gpio1d2_cif1clkin_name"
666 #define GPIO1D1_CIF1HREF_MIIMDCLK_NAME "gpio1d1_cif1href_miimdclk_name"
667 #define GPIO1D0_CIF1VSYNC_MIIMD_NAME "gpio1d0_cif1vsync_miimd_name"
671 #define GPIO2A7_LCDC1DATA7_SMCADDR11_NAME "gpio2a7_lcdc1data7_smcaddr11_name"
672 #define GPIO2A6_LCDC1DATA6_SMCADDR10_NAME "gpio2a6_lcdc1data6_smcaddr10_name"
673 #define GPIO2A5_LCDC1DATA5_SMCADDR9_NAME "gpio2a5_lcdc1data5_smcaddr9_name"
674 #define GPIO2A4_LCDC1DATA4_SMCADDR8_NAME "gpio2a4_lcdc1data4_smcaddr8_name"
675 #define GPIO2A3_LCDCDATA3_SMCADDR7_NAME "gpio2a3_lcdcdata3_smcaddr7_name"
676 #define GPIO2A2_LCDCDATA2_SMCADDR6_NAME "gpio2a2_lcdcdata2_smcaddr6_name"
677 #define GPIO2A1_LCDC1DATA1_SMCADDR5_NAME "gpio2a1_lcdc1data1_smcaddr5_name"
678 #define GPIO2A0_LCDC1DATA0_SMCADDR4_NAME "gpio2a0_lcdc1data0_smcaddr4_name"
682 #define GPIO2B7_LCDC1DATA15_SMCADDR19_HSADCDATA7_NAME "gpio2b7_lcdc1data15_smcaddr19_hsadcdata7_name"
683 #define GPIO2B6_LCDC1DATA14_SMCADDR18_TSSYNC_NAME "gpio2b6_lcdc1data14_smcaddr18_tssync_name"
684 #define GPIO2B5_LCDC1DATA13_SMCADDR17_HSADCDATA8_NAME "gpio2b5_lcdc1data13_smcaddr17_hsadcdata8_name"
685 #define GPIO2B4_LCDC1DATA12_SMCADDR16_HSADCDATA9_NAME "gpio2b4_lcdc1data12_smcaddr16_hsadcdata9_name"
686 #define GPIO2B3_LCDC1DATA11_SMCADDR15_NAME "gpio2b3_lcdc1data11_smcaddr15_name"
687 #define GPIO2B2_LCDC1DATA10_SMCADDR14_NAME "gpio2b2_lcdc1data10_smcaddr14_name"
688 #define GPIO2B1_LCDC1DATA9_SMCADDR13_NAME "gpio2b1_lcdc1data9_smcaddr13_name"
689 #define GPIO2B0_LCDC1DATA8_SMCADDR12_NAME "gpio2b0_lcdc1data8_smcaddr12_name"
693 #define GPIO2C7_LCDC1DATA23_SPI1CSN1_HSADCDATA4_NAME "gpio2c7_lcdc1data23_spi1csn1_hsadcdata4_name"
694 #define GPIO2C6_LCDC1DATA22_SPI1RXD_HSADCDATA3_NAME "gpio2c6_lcdc1data22_spi1rxd_hsadcdata3_name"
695 #define GPIO2C5_LCDC1DATA21_SPI1TXD_HSADCDATA2_NAME "gpio2c5_lcdc1data21_spi1txd_hsadcdata2_name"
696 #define GPIO2C4_LCDC1DATA20_SPI1CSN0_HSADCDATA1_NAME "gpio2c4_lcdc1data20_spi1csn0_hsadcdata1_name"
697 #define GPIO2C3_LCDC1DATA19_SPI1CLK_HSADCDATA0_NAME "gpio2c3_lcdc1data19_spi1clk_hsadcdata0_name"
698 #define GPIO2C2_LCDC1DATA18_SMCBLSN1_HSADCDATA5_NAME "gpio2c2_lcdc1data18_smcblsn1_hsadcdata5_name"
699 #define GPIO2C1_LCDC1DATA17_SMCBLSN0_HSADCDATA6_NAME "gpio2c1_lcdc1data17_smcblsn0_hsadcdata6_name"
700 #define GPIO2C0_LCDCDATA16_GPSCLK_HSADCCLKOUT_NAME "gpio2c0_lcdcdata16_gpsclk_hsadcclkout_name"
704 #define GPIO2D7_I2C1SCL_NAME "gpio2d7_i2c1scl_name"
705 #define GPIO2D6_I2C1SDA_NAME "gpio2d6_i2c1sda_name"
706 #define GPIO2D5_I2C0SCL_NAME "gpio2d5_i2c0scl_name"
707 #define GPIO2D4_I2C0SDA_NAME "gpio2d4_i2c0sda_name"
708 #define GPIO2D3_LCDC1VSYNC_NAME "gpio2d3_lcdc1vsync_name"
709 #define GPIO2D2_LCDC1HSYNC_NAME "gpio2d2_lcdc1hsync_name"
710 #define GPIO2D1_LCDC1DEN_SMCCSN1_NAME "gpio2d1_lcdc1den_smccsn1_name"
711 #define GPIO2D0_LCDC1DCLK_NAME "gpio2d0_lcdc1dclk_name"
715 //#define GPIO3A7_SDMMC0WRITEPRT_NAME "gpio3a7_sdmmc0writeprt_name"
716 #define GPIO3A7_SDMMC0PWREN_NAME "gpio3a70_sdmmc0pwren_name" //Modifyed by xbw,at 2012-03-05
717 #define GPIO3A6_SDMMC0RSTNOUT_NAME "gpio3a6_sdmmc0rstnout_name"
718 #define GPIO3A5_I2C4SCL_NAME "gpio3a5_i2c4scl_name"
719 #define GPIO3A4_I2C4SDA_NAME "gpio3a4_i2c4sda_name"
720 #define GPIO3A3_I2C3SCL_NAME "gpio3a3_i2c3scl_name"
721 #define GPIO3A2_I2C3SDA_NAME "gpio3a2_i2c3sda_name"
722 #define GPIO3A1_I2C2SCL_NAME "gpio3a1_i2c2scl_name"
723 #define GPIO3A0_I2C2SDA_NAME "gpio3a0_i2c2sda_name"
728 #define GPIO3B7_SDMMC0WRITEPRT_NAME "gpio3b7_sdmmc0writeprt_name"
729 #define GPIO3B6_SDMMC0DETECTN_NAME "gpio3b6_sdmmc0detectn_name"
730 #define GPIO3B5_SDMMC0DATA3_NAME "gpio3b5_sdmmc0data3_name"
731 #define GPIO3B4_SDMMC0DATA2_NAME "gpio3b4_sdmmc0data2_name"
732 #define GPIO3B3_SDMMC0DATA1_NAME "gpio3b3_sdmmc0data1_name"
733 #define GPIO3B2_SDMMC0DATA0_NAME "gpio3b2_sdmmc0data0_name"
734 #define GPIO3B1_SDMMC0CMD_NAME "gpio3b1_sdmmc0cmd_name"
735 #define GPIO3B0_SDMMC0CLKOUT_NAME "gpio3b0_sdmmc0clkout_name"
739 #define GPIO3C7_SDMMC1WRITEPRT_NAME "gpio3c7_sdmmc1writeprt_name"
740 #define GPIO3C6_SDMMC1DETECTN_NAME "gpio3c6_sdmmc1detectn_name"
741 #define GPIO3C5_SDMMC1CLKOUT_NAME "gpio3c5_sdmmc1clkout_name"
742 #define GPIO3C4_SDMMC1DATA3_NAME "gpio3c4_sdmmc1data3_name"
743 #define GPIO3C3_SDMMC1DATA2_NAME "gpio3c3_sdmmc1data2_name"
744 #define GPIO3C2_SDMMC1DATA1_NAME "gpio3c2_sdmmc1data1_name"
745 #define GPIO3C1_SDMMC1DATA0_NAME "gpio3c1_sdmmc1data0_name"
746 #define GPIO3C0_SMMC1CMD_NAME "gpio3c0_smmc1cmd_name"
750 #define GPIO3D7_FLASHDQS_EMMCCLKOUT_NAME "gpio3d7_flashdqs_emmcclkout_name"
751 #define GPIO3D6_UART3RTSN_NAME "gpio3d6_uart3rtsn_name"
752 #define GPIO3D5_UART3CTSN_NAME "gpio3d5_uart3ctsn_name"
753 #define GPIO3D4_UART3SOUT_NAME "gpio3d4_uart3sout_name"
754 #define GPIO3D3_UART3SIN_NAME "gpio3d3_uart3sin_name"
755 #define GPIO3D2_SDMMC1INTN_NAME "gpio3d2_sdmmc1intn_name"
756 #define GPIO3D1_SDMMC1BACKENDPWR_NAME "gpio3d1_sdmmc1backendpwr_name"
757 #define GPIO3D0_SDMMC1PWREN_NAME "gpio3d0_sdmmc1pwren_name"
761 #define GPIO4A7_FLASHDATA15_NAME "gpio4a7_flashdata15_name"
762 #define GPIO4A6_FLASHDATA14_NAME "gpio4a6_flashdata14_name"
763 #define GPIO4A5_FLASHDATA13_NAME "gpio4a5_flashdata13_name"
764 #define GPIO4A4_FLASHDATA12_NAME "gpio4a4_flashdata12_name"
765 #define GPIO4A3_FLASHDATA11_NAME "gpio4a3_flashdata11_name"
766 #define GPIO4A2_FLASHDATA10_NAME "gpio4a2_flashdata10_name"
767 #define GPIO4A1_FLASHDATA9_NAME "gpio4a1_flashdata9_name"
768 #define GPIO4A0_FLASHDATA8_NAME "gpio4a0_flashdata8_name"
772 #define GPIO4B7_SPI0CSN1_NAME "gpio4b7_spi0csn1_name"
773 #define GPIO4B6_FLASHCSN7_NAME "gpio4b6_flashcsn7_name"
774 #define GPIO4B5_FLASHCSN6_NAME "gpio4b5_flashcsn6_name"
775 #define GPIO4B4_FLASHCSN5_NAME "gpio4b4_flashcsn5_name"
776 #define GPIO4B3_FLASHCSN4_NAME "gpio4b3_flashcsn4_name"
777 #define GPIO4B2_FLASHCSN3_EMMCRSTNOUT_NAME "gpio4b2_flashcsn3_emmcrstnout_name"
778 #define GPIO4B1_FLASHCSN2_EMMCCMD_NAME "gpio4b1_flashcsn2_emmccmd_name"
779 #define GPIO4B0_FLASHCSN1_NAME "gpio4b0_flashcsn1_name"
783 #define GPIO4C7_SMCDATA7_TRACEDATA7_NAME "gpio4c7_smcdata7_tracedata7_name"
784 #define GPIO4C6_SMCDATA6_TRACEDATA6_NAME "gpio4c6_smcdata6_tracedata6_name"
785 #define GPIO4C5_SMCDATA5_TRACEDATA5_NAME "gpio4c5_smcdata5_tracedata5_name"
786 #define GPIO4C4_SMCDATA4_TRACEDATA4_NAME "gpio4c4_smcdata4_tracedata4_name"
787 #define GPIO4C3_SMCDATA3_TRACEDATA3_NAME "gpio4c3_smcdata3_tracedata3_name"
788 #define GPIO4C2_SMCDATA2_TRACEDATA2_NAME "gpio4c2_smcdata2_tracedata2_name"
789 #define GPIO4C1_SMCDATA1_TRACEDATA1_NAME "gpio4c1_smcdata1_tracedata1_name"
790 #define GPIO4C0_SMCDATA0_TRACEDATA0_NAME "gpio4c0_smcdata0_tracedata0_name"
794 #define GPIO4D7_SMCDATA15_TRACEDATA15_NAME "gpio4d7_smcdata15_tracedata15_name"
795 #define GPIO4D6_SMCDATA14_TRACEDATA14_NAME "gpio4d6_smcdata14_tracedata14_name"
796 #define GPIO4D5_SMCDATA13_TRACEDATA13_NAME "gpio4d5_smcdata13_tracedata13_name"
797 #define GPIO4D4_SMCDATA12_TRACEDATA12_NAME "gpio4d4_smcdata12_tracedata12_name"
798 #define GPIO4D3_SMCDATA11_TRACEDATA11_NAME "gpio4d3_smcdata11_tracedata11_name"
799 #define GPIO4D2_SMCDATA10_TRACEDATA10_NAME "gpio4d2_smcdata10_tracedata10_name"
800 #define GPIO4D1_SMCDATA9_TRACEDATA9_NAME "gpio4d1_smcdata9_tracedata9_name"
801 #define GPIO4D0_SMCDATA8_TRACEDATA8_NAME "gpio4d0_smcdata8_tracedata8_name"
806 #define GPIO6B7_TESTCLOCKOUT_NAME "gpio6b7_testclockout_name"
808 #define MUX_CFG(desc,reg,off,interl,mux_mode,bflags) \
812 .interleave = interl, \
813 .mux_reg = GRF_##reg##_IOMUX, \
815 .premode = mux_mode, \
821 const unsigned int offset;
823 unsigned int premode;
824 const void* __iomem mux_reg;
825 const unsigned int interleave;
828 #define rk29_mux_api_set rk30_mux_api_set
830 extern int __init rk30_iomux_init(void);
831 extern void rk30_mux_api_set(char *name, unsigned int mode);
832 extern int rk30_mux_api_get(char *name);