arch/arm/mach-rockchip/ddr_freq.c

   1 #define pr_fmt(fmt) "ddrfreq: " fmt
   2 #define DEBUG
   3 #include <linux/clk.h>
   4 #include <linux/fb.h>
   5 #include <linux/cpu.h>
   6 #include <linux/cpufreq.h>
   7 #include <linux/delay.h>
   8 #include <linux/freezer.h>
   9 #include <linux/fs.h>
  10 #include <linux/kthread.h>
  11 #include <linux/miscdevice.h>
  12 #include <linux/module.h>
  13 #include <linux/reboot.h>
  14 #include <linux/slab.h>
  15 #include <linux/uaccess.h>
  16 #include <linux/sched/rt.h>
  17 #include <linux/of.h>
  18 #include <linux/fb.h>
  19 #include <linux/input.h>
  20 #include <asm/cacheflush.h>
  21 #include <asm/tlbflush.h>
  22 #include <linux/vmalloc.h>
  23 #include <linux/rockchip/common.h>
  24 #include <linux/rockchip/dvfs.h>
  25 #include <dt-bindings/clock/ddr.h>
  26 #include <dt-bindings/clock/rk_system_status.h>
  27 #include <asm/io.h>
  28 #include <linux/rockchip/grf.h>
  29 #include <linux/rockchip/iomap.h>
  30 #include <linux/clk-private.h>
  31 #include <linux/rockchip/cpu.h>
  32 #include "../../../drivers/clk/rockchip/clk-pd.h"
  33 #include "cpu_axi.h"
  34
  35 #ifdef CONFIG_CPU_FREQ
  36 extern int rockchip_cpufreq_reboot_limit_freq(void);
  37 #else
  38 static inline int rockchip_cpufreq_reboot_limit_freq(void) { return 0; }
  39 #endif
  40
  41 static DECLARE_COMPLETION(ddrfreq_completion);
  42 static DEFINE_MUTEX(ddrfreq_mutex);
  43
  44 #define VOP_REQ_BLOCK
  45 #ifdef VOP_REQ_BLOCK
  46 static DECLARE_COMPLETION(vop_req_completion);
  47 #endif
  48
  49 static struct dvfs_node *clk_cpu_dvfs_node = NULL;
  50 static int ddr_boost = 0;
  51 static int print=0;
  52 static int watch=0;
  53 static int high_load = 70;
  54 static int low_load = 60;
  55 static int auto_freq_interval_ms = 20;
  56 static long down_rate_delay_ms = 500;
  57 static unsigned long *auto_freq_table = NULL;
  58 static int cur_freq_index;
  59 static int auto_freq_table_size;
  60 static unsigned long vop_bandwidth_update_jiffies = 0, vop_bandwidth = 0;
  61 static int vop_bandwidth_update_flag = 0;
  62 static struct ddr_bw_info ddr_bw_ch0 = {0}, ddr_bw_ch1 = {0};
  63
  64 enum {
  65         DEBUG_DDR = 1U << 0,
  66         DEBUG_VIDEO_STATE = 1U << 1,
  67         DEBUG_SUSPEND = 1U << 2,
  68         DEBUG_VERBOSE = 1U << 3,
  69 };
  70 static int debug_mask;
  71
  72 module_param(debug_mask, int, S_IRUGO | S_IWUSR | S_IWGRP);
  73 #define dprintk(mask, fmt, ...) do { if (mask & debug_mask) pr_debug(fmt, ##__VA_ARGS__); } while (0)
  74
  75 #define MHZ     (1000*1000)
  76 #define KHZ     1000
  77
  78 struct video_info {
  79         int width;
  80         int height;
  81         int ishevc;
  82         int videoFramerate;
  83         int streamBitrate;
  84
  85         struct list_head node;
  86 };
  87 struct vop_info {
  88         int state;
  89         int zone_num;
  90         int reserve;
  91         int reserve2;
  92 };
  93
  94 struct bpvopinfo {
  95         struct vop_info vopinfo[4];
  96         int bp_size;
  97         int bp_vop_size;
  98 };
  99
 100 struct ddr {
 101         struct dvfs_node *clk_dvfs_node;
 102         struct list_head video_info_list;
 103         unsigned long normal_rate;
 104         unsigned long video_1080p_rate;
 105         unsigned long video_4k_rate;
 106         unsigned long performance_rate;
 107         unsigned long dualview_rate;
 108         unsigned long hdmi_rate;
 109         unsigned long idle_rate;
 110         unsigned long suspend_rate;
 111         unsigned long reboot_rate;
 112         unsigned long boost_rate;
 113         unsigned long isp_rate;
 114         bool auto_freq;
 115         bool auto_self_refresh;
 116         char *mode;
 117         unsigned long sys_status;
 118         struct task_struct *task;
 119         wait_queue_head_t wait;
 120 };
 121 static struct ddr ddr;
 122
 123 module_param_named(sys_status, ddr.sys_status, ulong, S_IRUGO);
 124 module_param_named(auto_self_refresh, ddr.auto_self_refresh, bool, S_IRUGO);
 125 module_param_named(mode, ddr.mode, charp, S_IRUGO);
 126
 127 static unsigned long auto_freq_round(unsigned long freq)
 128 {
 129         int i;
 130
 131         if (!auto_freq_table)
 132                 return -EINVAL;
 133
 134         for (i = 0; auto_freq_table[i] != 0; i++) {
 135                 if (auto_freq_table[i] >= freq) {
 136                         return auto_freq_table[i];
 137                 }
 138         }
 139
 140         return auto_freq_table[i-1];
 141 }
 142
 143 static unsigned long auto_freq_get_index(unsigned long freq)
 144 {
 145         int i;
 146
 147         if (!auto_freq_table)
 148                 return 0;
 149
 150         for (i = 0; auto_freq_table[i] != 0; i++) {
 151                 if (auto_freq_table[i] >= freq) {
 152                         return i;
 153                 }
 154         }
 155         return i-1;
 156 }
 157
 158 static unsigned int auto_freq_update_index(unsigned long freq)
 159 {
 160         cur_freq_index = auto_freq_get_index(freq);
 161
 162         return cur_freq_index;
 163 }
 164
 165
 166 static unsigned long auto_freq_get_next_step(void)
 167 {
 168         if (cur_freq_index < auto_freq_table_size-1) {
 169                         return auto_freq_table[cur_freq_index+1];
 170         }
 171
 172         return auto_freq_table[cur_freq_index];
 173 }
 174
 175 static void ddrfreq_mode(bool auto_self_refresh, unsigned long target_rate, char *name)
 176 {
 177         unsigned int min_rate, max_rate;
 178         int freq_limit_en;
 179
 180         ddr.mode = name;
 181         if (auto_self_refresh != ddr.auto_self_refresh) {
 182                 ddr_set_auto_self_refresh(auto_self_refresh);
 183                 ddr.auto_self_refresh = auto_self_refresh;
 184                 dprintk(DEBUG_DDR, "change auto self refresh to %d when %s\n", auto_self_refresh, name);
 185         }
 186
 187         if (target_rate != dvfs_clk_get_last_set_rate(ddr.clk_dvfs_node)) {
 188                 freq_limit_en = dvfs_clk_get_limit(clk_cpu_dvfs_node, &min_rate, &max_rate);
 189
 190                 dvfs_clk_enable_limit(clk_cpu_dvfs_node, 600000000, -1);
 191                 if (dvfs_clk_set_rate(ddr.clk_dvfs_node, target_rate) == 0) {
 192                         target_rate = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 193                         auto_freq_update_index(target_rate);
 194                         dprintk(DEBUG_DDR, "change freq to %lu MHz when %s\n", target_rate / MHZ, name);
 195                 }
 196
 197                 if (freq_limit_en) {
 198                         dvfs_clk_enable_limit(clk_cpu_dvfs_node, min_rate, max_rate);
 199                 } else {
 200                         dvfs_clk_disable_limit(clk_cpu_dvfs_node);
 201                 }
 202         }
 203 }
 204
 205 unsigned long req_freq_by_vop(unsigned long bandwidth)
 206 {
 207         if (time_after(jiffies, vop_bandwidth_update_jiffies+down_rate_delay_ms))
 208                 return 0;
 209
 210         if (bandwidth >= 5000){
 211                 return 800000000;
 212         }
 213
 214         if (bandwidth >= 3500) {
 215                 return 456000000;
 216         }
 217
 218         if (bandwidth >= 2600) {
 219                 return 396000000;
 220         }
 221         if (bandwidth >= 2000) {
 222                 return 324000000;
 223         }
 224
 225         return 0;
 226 }
 227
 228 static void ddr_auto_freq(void)
 229 {
 230         unsigned long freq, new_freq=0, vop_req_freq=0, total_bw_req_freq=0;
 231         u32 ddr_percent, target_load;
 232         static u32 local_jiffies=0, max_ddr_percent=0;
 233
 234         if (!local_jiffies)
 235                 local_jiffies = jiffies;
 236         freq = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 237
 238         ddr_bandwidth_get(&ddr_bw_ch0, &ddr_bw_ch1);
 239         ddr_percent = ddr_bw_ch0.ddr_percent;
 240
 241         if ((watch)||(print)) {
 242                 if((watch == 2)&& (ddr_bw_ch0.ddr_percent < max_ddr_percent)) {
 243                     return;
 244                 } else if(watch == 2) {
 245                     max_ddr_percent = ddr_bw_ch0.ddr_percent;
 246                 }
 247                 printk("Unit:MB/s total  use%%    rd    wr  cpum   gpu  peri video  vio0  vio1  vio2\n");
 248                 printk("%3u(ms): %5u %5u %5u %5u %5u %5u %5u %5u %5u %5u %5u\n",
 249                         ddr_bw_ch0.ddr_time,
 250                         ddr_bw_ch0.ddr_total,
 251                         ddr_bw_ch0.ddr_percent,
 252                         ddr_bw_ch0.ddr_rd,
 253                         ddr_bw_ch0.ddr_wr,
 254                         ddr_bw_ch0.cpum,
 255                         ddr_bw_ch0.gpu,
 256                         ddr_bw_ch0.peri,
 257                         ddr_bw_ch0.video,
 258                         ddr_bw_ch0.vio0,
 259                         ddr_bw_ch0.vio1,
 260                         ddr_bw_ch0.vio2);
 261
 262                 if (watch)
 263                         return;
 264         }
 265
 266         if (ddr_boost) {
 267                 ddr_boost = 0;
 268                 new_freq = max(ddr.boost_rate, new_freq);
 269         }
 270
 271         if(ddr_percent > high_load){
 272                 total_bw_req_freq = auto_freq_get_next_step();
 273         } else if (ddr_percent < low_load){
 274                 target_load = (low_load+high_load)/2;
 275                 total_bw_req_freq = ddr_percent*(freq/target_load);
 276         }
 277         new_freq = max(total_bw_req_freq, new_freq);
 278
 279         vop_req_freq = req_freq_by_vop(vop_bandwidth);
 280         new_freq = max(vop_req_freq, new_freq);
 281
 282         new_freq = auto_freq_round(new_freq);
 283
 284         if (new_freq < freq) {
 285                 if (time_after(jiffies, local_jiffies+down_rate_delay_ms/10)) {
 286                         local_jiffies = jiffies;
 287                         ddrfreq_mode(false, new_freq, "auto down rate");
 288                 }
 289         } else if(new_freq > freq){
 290                 local_jiffies = jiffies;
 291                 ddrfreq_mode(false, new_freq, "auto up rate");
 292         }
 293 }
 294
 295 static noinline long ddrfreq_work(unsigned long sys_status)
 296 {
 297         long timeout = MAX_SCHEDULE_TIMEOUT;
 298         unsigned long target_rate = 0;
 299         unsigned long s = sys_status;
 300         bool auto_self_refresh = false;
 301         char *mode = NULL;
 302
 303         dprintk(DEBUG_VERBOSE, "sys_status %02lx\n", sys_status);
 304
 305         if (ddr.reboot_rate && (s & SYS_STATUS_REBOOT)) {
 306                 ddrfreq_mode(false, ddr.reboot_rate, "shutdown/reboot");
 307
 308                 return timeout;
 309         }
 310
 311         if (ddr.suspend_rate && (s & SYS_STATUS_SUSPEND)) {
 312                 if (ddr.suspend_rate > target_rate) {
 313                         target_rate = ddr.suspend_rate;
 314                         auto_self_refresh = true;
 315                         mode = "suspend";
 316                 }
 317         }
 318
 319         if (ddr.performance_rate && (s & SYS_STATUS_PERFORMANCE)) {
 320                 if (ddr.performance_rate > target_rate) {
 321                         target_rate = ddr.performance_rate;
 322                         auto_self_refresh = false;
 323                         mode = "performance";
 324                 }
 325         }
 326
 327          if (ddr.dualview_rate &&
 328                 (s & SYS_STATUS_LCDC0) && (s & SYS_STATUS_LCDC1)) {
 329                  if (ddr.dualview_rate > target_rate) {
 330                          target_rate = ddr.dualview_rate;
 331                          auto_self_refresh = false;
 332                          mode = "dual-view";
 333                  }
 334          }
 335
 336          if (ddr.hdmi_rate &&
 337                 (s & SYS_STATUS_HDMI)) {
 338                  if (ddr.hdmi_rate > target_rate) {
 339                          target_rate = ddr.hdmi_rate;
 340                          auto_self_refresh = false;
 341                          mode = "hdmi";
 342                  }
 343          }
 344
 345         if (ddr.video_4k_rate && (s & SYS_STATUS_VIDEO_4K) && !(s & SYS_STATUS_SUSPEND)) {
 346                 if (ddr.video_4k_rate > target_rate) {
 347                         target_rate = ddr.video_4k_rate;
 348                         auto_self_refresh = false;
 349                         mode = "video_4k";
 350                 }
 351         }
 352
 353         if (ddr.video_1080p_rate && (s & SYS_STATUS_VIDEO_1080P)) {
 354                 if (ddr.video_1080p_rate > target_rate) {
 355                         target_rate = ddr.video_1080p_rate;
 356                         auto_self_refresh = false;
 357                         mode = "video_1080p";
 358                 }
 359         }
 360
 361         if (ddr.isp_rate && (s & SYS_STATUS_ISP)) {
 362                 if (ddr.isp_rate > target_rate) {
 363                         target_rate = ddr.isp_rate;
 364                         auto_self_refresh = false;
 365                         mode = "isp";
 366                 }
 367         }
 368
 369         if (target_rate > 0) {
 370                 ddrfreq_mode(auto_self_refresh, target_rate, mode);
 371         } else {
 372                 if (ddr.auto_freq) {
 373                         ddr_auto_freq();
 374                         timeout = auto_freq_interval_ms/10;
 375                 }
 376                 else {
 377                         ddrfreq_mode(false, ddr.normal_rate, "normal");
 378                 }
 379         }
 380
 381         return timeout;
 382 #if 0
 383
 384         if (ddr.reboot_rate && (s & SYS_STATUS_REBOOT)) {
 385                 ddrfreq_mode(false, &ddr.reboot_rate, "shutdown/reboot");
 386                 rockchip_cpufreq_reboot_limit_freq();
 387                 reboot_config_done = 1;
 388         } else if (ddr.suspend_rate && (s & SYS_STATUS_SUSPEND)) {
 389                 ddrfreq_mode(true, &ddr.suspend_rate, "suspend");
 390         } else if (ddr.dualview_rate &&
 391                 (s & SYS_STATUS_LCDC0) && (s & SYS_STATUS_LCDC1)) {
 392                 ddrfreq_mode(false, &ddr.dualview_rate, "dual-view");
 393         } else if (ddr.video_1080p_rate && (s & SYS_STATUS_VIDEO_1080P)) {
 394                 ddrfreq_mode(false, &ddr.video_1080p_rate, "video_1080p");
 395         } else if (ddr.video_4k_rate && (s & SYS_STATUS_VIDEO_4K)) {
 396                 ddrfreq_mode(false, &ddr.video_4k_rate, "video_4k");
 397         } else if (ddr.performance_rate && (s & SYS_STATUS_PERFORMANCE)) {
 398                 ddrfreq_mode(false, &ddr.performance_rate, "performance");
 399         }  else if (ddr.isp_rate && (s & SYS_STATUS_ISP)) {
 400                 ddrfreq_mode(false, &ddr.isp_rate, "isp");
 401         } else if (ddr.idle_rate
 402                 && !(s & SYS_STATUS_GPU)
 403                 && !(s & SYS_STATUS_RGA)
 404                 && !(s & SYS_STATUS_CIF0)
 405                 && !(s & SYS_STATUS_CIF1)
 406                 && (clk_get_rate(cpu) < 816 * MHZ)
 407                 && (clk_get_rate(gpu) <= 200 * MHZ)
 408                 ) {
 409                 ddrfreq_mode(false, &ddr.idle_rate, "idle");
 410         } else {
 411                 if (ddr.auto_freq) {
 412                         ddr_auto_freq();
 413                         timeout = auto_freq_interval_ms;
 414                 }
 415                 else {
 416                         ddrfreq_mode(false, &ddr.normal_rate, "normal");
 417                 }
 418         }
 419
 420
 421
 422         return timeout;
 423 #endif
 424 }
 425
 426 static int ddrfreq_task(void *data)
 427 {
 428         long timeout;
 429         unsigned long status=ddr.sys_status, old_status=ddr.sys_status;
 430
 431         set_freezable();
 432
 433         do {
 434                 status = ddr.sys_status;
 435                 timeout = ddrfreq_work(status);
 436                 if (old_status != status)
 437                         complete(&ddrfreq_completion);
 438                 if (vop_bandwidth_update_flag) {
 439                         vop_bandwidth_update_flag = 0;
 440 #ifdef VOP_REQ_BLOCK
 441                         complete(&vop_req_completion);
 442 #endif
 443                 }
 444                 wait_event_freezable_timeout(ddr.wait, vop_bandwidth_update_flag || (status != ddr.sys_status) || kthread_should_stop(), timeout);
 445                 old_status = status;
 446         } while (!kthread_should_stop());
 447
 448         return 0;
 449 }
 450
 451 void add_video_info(struct video_info *video_info)
 452 {
 453         if (video_info)
 454                 list_add(&video_info->node, &ddr.video_info_list);
 455 }
 456
 457 void del_video_info(struct video_info *video_info)
 458 {
 459         if (video_info) {
 460                 list_del(&video_info->node);
 461                 kfree(video_info);
 462         }
 463 }
 464
 465 void clear_video_info(void)
 466 {
 467         struct video_info *video_info, *next;
 468
 469         list_for_each_entry_safe(video_info, next, &ddr.video_info_list, node) {
 470                 del_video_info(video_info);
 471         }
 472 }
 473
 474 struct video_info *find_video_info(struct video_info *match_video_info)
 475 {
 476         struct video_info *video_info;
 477
 478         if (!match_video_info)
 479                 return NULL;
 480
 481         list_for_each_entry(video_info, &ddr.video_info_list, node) {
 482                 if ((video_info->width == match_video_info->width)
 483                         && (video_info->height == match_video_info->height)
 484                         && (video_info->ishevc== match_video_info->ishevc)
 485                         && (video_info->videoFramerate == match_video_info->videoFramerate)
 486                         && (video_info->streamBitrate== match_video_info->streamBitrate)) {
 487
 488                         return video_info;
 489                 }
 490
 491         }
 492
 493         return NULL;
 494 }
 495
 496 void update_video_info(void)
 497 {
 498         struct video_info *video_info, *max_res_video;
 499         int max_res=0, res=0;
 500
 501         if (list_empty(&ddr.video_info_list)) {
 502                 rockchip_clear_system_status(SYS_STATUS_VIDEO_1080P|SYS_STATUS_VIDEO_4K);
 503                 return;
 504         }
 505
 506         list_for_each_entry(video_info, &ddr.video_info_list, node) {
 507                 res = video_info->width * video_info->height;
 508                 if (res > max_res) {
 509                         max_res = res;
 510                         max_res_video = video_info;
 511                 }
 512         }
 513
 514         if (max_res <= 1920*1080)
 515                 rockchip_set_system_status(SYS_STATUS_VIDEO_1080P);
 516         else
 517                 rockchip_set_system_status(SYS_STATUS_VIDEO_4K);
 518
 519         return;
 520 }
 521
 522 /***format: width=val,height=val,ishevc=val,videoFramerate=val,streamBitrate=val***/
 523 static long get_video_param(char **str)
 524 {
 525         char *p;
 526
 527         strsep(str,"=");
 528         p=strsep(str,",");
 529         if (p)
 530                 return simple_strtol(p,NULL,10);
 531
 532         return 0;
 533 }
 534
 535 static ssize_t video_state_write(struct file *file, const char __user *buffer,
 536                                  size_t count, loff_t *ppos)
 537 {
 538         struct video_info *video_info = NULL;
 539         char state, *cookie_pot, *buf = vzalloc(count);
 540         cookie_pot = buf;
 541
 542         if(!buf)
 543                 return -ENOMEM;
 544
 545         if (count < 1){
 546                 vfree(buf);
 547                 return -EPERM;
 548         }
 549
 550         if (copy_from_user(cookie_pot, buffer, count)) {
 551                 vfree(buf);
 552                 return -EFAULT;
 553         }
 554
 555         dprintk(DEBUG_VIDEO_STATE, "%s: %s,len %d\n", __func__, cookie_pot,count);
 556
 557         state=cookie_pot[0];
 558         if( (count>=3) && (cookie_pot[2]=='w') )
 559         {
 560                 video_info = kzalloc(sizeof(struct video_info), GFP_KERNEL);
 561                 if (!video_info){
 562                         vfree(buf);
 563                         return -ENOMEM;
 564                 }
 565                 INIT_LIST_HEAD(&video_info->node);
 566
 567                 strsep(&cookie_pot,",");
 568
 569                 video_info->width = get_video_param(&cookie_pot);
 570                 video_info->height = get_video_param(&cookie_pot);
 571                 video_info->ishevc = get_video_param(&cookie_pot);
 572                 video_info->videoFramerate = get_video_param(&cookie_pot);
 573                 video_info->streamBitrate = get_video_param(&cookie_pot);
 574
 575                 dprintk(DEBUG_VIDEO_STATE, "%s: video_state=%c,width=%d,height=%d,ishevc=%d,videoFramerate=%d,streamBitrate=%d\n",
 576                         __func__, state,video_info->width,video_info->height,
 577                         video_info->ishevc, video_info->videoFramerate,
 578                         video_info->streamBitrate);
 579
 580         }
 581         switch (state) {
 582         case '0':
 583                 del_video_info(find_video_info(video_info));
 584                 kfree(video_info);
 585                 update_video_info();
 586                 break;
 587         case '1':
 588                 add_video_info(video_info);
 589                 update_video_info();
 590                 break;
 591         case 'p'://performance
 592                 rockchip_set_system_status(SYS_STATUS_PERFORMANCE);
 593                 break;
 594         case 'n'://normal
 595                 rockchip_clear_system_status(SYS_STATUS_PERFORMANCE);
 596                 break;
 597         default:
 598                 vfree(buf);
 599                 return -EINVAL;
 600
 601         }
 602
 603         vfree(buf);
 604         return count;
 605 }
 606
 607 static int video_state_release(struct inode *inode, struct file *file)
 608 {
 609         dprintk(DEBUG_VIDEO_STATE, "video_state release\n");
 610         clear_video_info();
 611         update_video_info();
 612         return 0;
 613 }
 614
 615
 616 static const struct file_operations video_state_fops = {
 617         .owner  = THIS_MODULE,
 618         .release= video_state_release,
 619         .write  = video_state_write,
 620 };
 621
 622 static struct miscdevice video_state_dev = {
 623         .fops   = &video_state_fops,
 624         .name   = "video_state",
 625         .minor  = MISC_DYNAMIC_MINOR,
 626 };
 627
 628 static long ddr_freq_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 629 {
 630         struct bpvopinfo *bpvinfo = (struct bpvopinfo *)arg;
 631         unsigned long vop_req_freq;
 632         int ret = -1;
 633
 634         vop_bandwidth = bpvinfo->bp_vop_size;
 635         vop_bandwidth_update_jiffies = jiffies;
 636         vop_req_freq = req_freq_by_vop(vop_bandwidth);
 637         if (dvfs_clk_get_rate(ddr.clk_dvfs_node) >= vop_req_freq)
 638                 ret = 0;
 639
 640         vop_bandwidth_update_flag = 1;
 641         wake_up(&ddr.wait);
 642 #ifdef VOP_REQ_BLOCK
 643         wait_for_completion(&vop_req_completion);
 644         if (dvfs_clk_get_rate(ddr.clk_dvfs_node) >= vop_req_freq)
 645                 ret = 0;
 646 #endif
 647
 648         return ret;
 649 }
 650
 651
 652 static const struct file_operations ddr_freq_fops = {
 653         .owner  = THIS_MODULE,
 654         .unlocked_ioctl = ddr_freq_ioctl,
 655 };
 656
 657 static struct miscdevice ddr_freq_dev = {
 658         .fops   = &ddr_freq_fops,
 659         .name   = "ddr_freq",
 660         .mode   = S_IRUGO | S_IWUSR | S_IWUGO,
 661         .minor  = MISC_DYNAMIC_MINOR,
 662 };
 663
 664 #ifdef CONFIG_INPUT
 665 static void ddr_freq_input_event(struct input_handle *handle, unsigned int type,
 666                 unsigned int code, int value)
 667 {
 668         if (type == EV_ABS)
 669                 ddr_boost = 1;
 670 }
 671
 672 static int ddr_freq_input_connect(struct input_handler *handler,
 673                 struct input_dev *dev, const struct input_device_id *id)
 674 {
 675         struct input_handle *handle;
 676         int error;
 677
 678         handle = kzalloc(sizeof(struct input_handle), GFP_KERNEL);
 679         if (!handle)
 680                 return -ENOMEM;
 681
 682         handle->dev = dev;
 683         handle->handler = handler;
 684         handle->name = "ddr_freq";
 685
 686         error = input_register_handle(handle);
 687         if (error)
 688                 goto err2;
 689
 690         error = input_open_device(handle);
 691         if (error)
 692                 goto err1;
 693
 694         return 0;
 695 err1:
 696         input_unregister_handle(handle);
 697 err2:
 698         kfree(handle);
 699         return error;
 700 }
 701
 702 static void ddr_freq_input_disconnect(struct input_handle *handle)
 703 {
 704         input_close_device(handle);
 705         input_unregister_handle(handle);
 706         kfree(handle);
 707 }
 708
 709 static const struct input_device_id ddr_freq_ids[] = {
 710         {
 711                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT |
 712                         INPUT_DEVICE_ID_MATCH_ABSBIT,
 713                 .evbit = { BIT_MASK(EV_ABS) },
 714                 .absbit = { [BIT_WORD(ABS_MT_POSITION_X)] =
 715                         BIT_MASK(ABS_MT_POSITION_X) |
 716                         BIT_MASK(ABS_MT_POSITION_Y) },
 717         },
 718         {
 719                 .flags = INPUT_DEVICE_ID_MATCH_KEYBIT |
 720                         INPUT_DEVICE_ID_MATCH_ABSBIT,
 721                 .keybit = { [BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH) },
 722                 .absbit = { [BIT_WORD(ABS_X)] =
 723                         BIT_MASK(ABS_X) | BIT_MASK(ABS_Y) },
 724         },
 725         {
 726                 .flags = INPUT_DEVICE_ID_MATCH_EVBIT,
 727                 .evbit = { BIT_MASK(EV_KEY) },
 728         },
 729         { },
 730 };
 731
 732 static struct input_handler ddr_freq_input_handler = {
 733         .event          = ddr_freq_input_event,
 734         .connect        = ddr_freq_input_connect,
 735         .disconnect     = ddr_freq_input_disconnect,
 736         .name           = "ddr_freq",
 737         .id_table       = ddr_freq_ids,
 738 };
 739 #endif
 740 #if 0
 741 static int ddrfreq_clk_event(int status, unsigned long event)
 742 {
 743         switch (event) {
 744         case RK_CLK_PD_PREPARE:
 745                 ddrfreq_set_sys_status(status);
 746                 break;
 747         case RK_CLK_PD_UNPREPARE:
 748                 ddrfreq_clear_sys_status(status);
 749                 break;
 750         }
 751         return NOTIFY_OK;
 752 }
 753
 754 #define CLK_NOTIFIER(name, status) \
 755 static int ddrfreq_clk_##name##_event(struct notifier_block *this, unsigned long event, void *ptr) \
 756 { \
 757         return ddrfreq_clk_event(SYS_STATUS_##status, event); \
 758 } \
 759 static struct notifier_block ddrfreq_clk_##name##_notifier = { .notifier_call = ddrfreq_clk_##name##_event };
 760
 761 #define REGISTER_CLK_NOTIFIER(name) \
 762 do { \
 763         struct clk *clk = clk_get(NULL, #name); \
 764         rk_clk_pd_notifier_register(clk, &ddrfreq_clk_##name##_notifier); \
 765         clk_put(clk); \
 766 } while (0)
 767
 768 #define UNREGISTER_CLK_NOTIFIER(name) \
 769 do { \
 770         struct clk *clk = clk_get(NULL, #name); \
 771         rk_clk_pd_notifier_unregister(clk, &ddrfreq_clk_##name##_notifier); \
 772         clk_put(clk); \
 773 } while (0)
 774
 775 CLK_NOTIFIER(pd_isp, ISP)
 776 CLK_NOTIFIER(pd_vop0, LCDC0)
 777 CLK_NOTIFIER(pd_vop1, LCDC1)
 778 #endif
 779
 780 static int ddrfreq_reboot_notifier_event(struct notifier_block *this, unsigned long event, void *ptr)
 781 {
 782         rockchip_set_system_status(SYS_STATUS_REBOOT);
 783         rockchip_cpufreq_reboot_limit_freq();
 784
 785         return NOTIFY_OK;
 786 }
 787
 788 static struct notifier_block ddrfreq_reboot_notifier = {
 789         .notifier_call = ddrfreq_reboot_notifier_event,
 790 };
 791
 792 static int ddr_freq_suspend_notifier_call(struct notifier_block *self,
 793                                 unsigned long action, void *data)
 794 {
 795         struct fb_event *event = data;
 796         int blank_mode = *((int *)event->data);
 797
 798         if (action == FB_EARLY_EVENT_BLANK) {
 799                 switch (blank_mode) {
 800                 case FB_BLANK_UNBLANK:
 801                         rockchip_clear_system_status(SYS_STATUS_SUSPEND);
 802                         break;
 803                 default:
 804                         break;
 805                 }
 806         }
 807         else if (action == FB_EVENT_BLANK) {
 808                 switch (blank_mode) {
 809                 case FB_BLANK_POWERDOWN:
 810                         rockchip_set_system_status(SYS_STATUS_SUSPEND);
 811                         break;
 812                 default:
 813                         break;
 814                 }
 815         }
 816
 817         return NOTIFY_OK;
 818 }
 819
 820 static struct notifier_block ddr_freq_suspend_notifier = {
 821                 .notifier_call = ddr_freq_suspend_notifier_call,
 822 };
 823
 824 static int ddrfreq_system_status_notifier_call(struct notifier_block *nb,
 825                                 unsigned long val, void *data)
 826 {
 827         mutex_lock(&ddrfreq_mutex);
 828         ddr.sys_status = val;
 829         wake_up(&ddr.wait);
 830         wait_for_completion(&ddrfreq_completion);
 831         mutex_unlock(&ddrfreq_mutex);
 832
 833         return NOTIFY_OK;
 834 }
 835
 836 static struct notifier_block ddrfreq_system_status_notifier = {
 837                 .notifier_call = ddrfreq_system_status_notifier_call,
 838 };
 839
 840
 841 int of_init_ddr_freq_table(void)
 842 {
 843         struct device_node *clk_ddr_dev_node;
 844         const struct property *prop;
 845         const __be32 *val;
 846         int nr, i=0;
 847
 848         clk_ddr_dev_node = of_find_node_by_name(NULL, "clk_ddr");
 849         if (IS_ERR_OR_NULL(clk_ddr_dev_node)) {
 850                 pr_err("%s: get clk ddr dev node err\n", __func__);
 851                 return PTR_ERR(clk_ddr_dev_node);
 852         }
 853
 854         prop = of_find_property(clk_ddr_dev_node, "auto-freq", NULL);
 855         if (prop && prop->value)
 856                 ddr.auto_freq = be32_to_cpup(prop->value);
 857
 858         prop = of_find_property(clk_ddr_dev_node, "auto-freq-table", NULL);
 859         if (prop && prop->value) {
 860                 nr = prop->length / sizeof(u32);
 861                 auto_freq_table = kzalloc((sizeof(u32) *(nr+1)), GFP_KERNEL);
 862                 val = prop->value;
 863                 while (nr) {
 864                         auto_freq_table[i++] =
 865                                 dvfs_clk_round_rate(ddr.clk_dvfs_node, 1000 * be32_to_cpup(val++));
 866                         nr--;
 867                 }
 868                 cur_freq_index = 0;
 869                 auto_freq_table_size = i;
 870         }
 871
 872         prop = of_find_property(clk_ddr_dev_node, "freq-table", NULL);
 873         if (!prop)
 874                 return -ENODEV;
 875         if (!prop->value)
 876                 return -ENODATA;
 877
 878         nr = prop->length / sizeof(u32);
 879         if (nr % 2) {
 880                 pr_err("%s: Invalid freq list\n", __func__);
 881                 return -EINVAL;
 882         }
 883
 884         val = prop->value;
 885         while (nr) {
 886                 unsigned long status = be32_to_cpup(val++);
 887                 unsigned long rate =
 888                         dvfs_clk_round_rate(ddr.clk_dvfs_node, be32_to_cpup(val++) * 1000);
 889
 890                 if (status & SYS_STATUS_NORMAL)
 891                         ddr.normal_rate = rate;
 892                 if (status & SYS_STATUS_SUSPEND)
 893                         ddr.suspend_rate = rate;
 894                 if (status & SYS_STATUS_VIDEO_1080P)
 895                         ddr.video_1080p_rate = rate;
 896                 if (status & SYS_STATUS_VIDEO_4K)
 897                         ddr.video_4k_rate = rate;
 898                 if (status & SYS_STATUS_PERFORMANCE)
 899                         ddr.performance_rate= rate;
 900                 if ((status & SYS_STATUS_LCDC0)&&(status & SYS_STATUS_LCDC1))
 901                         ddr.dualview_rate = rate;
 902                 if (status & SYS_STATUS_HDMI)
 903                         ddr.hdmi_rate = rate;
 904                 if (status & SYS_STATUS_IDLE)
 905                         ddr.idle_rate= rate;
 906                 if (status & SYS_STATUS_REBOOT)
 907                         ddr.reboot_rate= rate;
 908                 if (status & SYS_STATUS_BOOST)
 909                         ddr.boost_rate= rate;
 910                 if (status & SYS_STATUS_ISP)
 911                         ddr.isp_rate= rate;
 912
 913                 nr -= 2;
 914         }
 915
 916         return 0;
 917 }
 918
 919 static int ddrfreq_scale_rate_for_dvfs(struct clk *clk, unsigned long rate)
 920 {
 921         unsigned long real_rate;
 922
 923         real_rate = ddr_change_freq(rate/MHZ);
 924         real_rate *= MHZ;
 925         if (!real_rate)
 926                 return -EAGAIN;
 927         if (cpu_is_rk312x()) {
 928                 clk->parent->rate = 2 * real_rate;
 929                 clk->rate = real_rate;
 930         } else {
 931                 clk->rate = real_rate;
 932                 clk->parent->rate = real_rate;
 933         }
 934
 935         return 0;
 936 }
 937
 938 #if defined(CONFIG_RK_PM_TESTS)
 939 static void ddrfreq_tst_init(void);
 940 #endif
 941
 942 static int ddrfreq_init(void)
 943 {
 944         int ret, i;
 945         struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 };
 946
 947 #if defined(CONFIG_RK_PM_TESTS)
 948         ddrfreq_tst_init();
 949 #endif
 950
 951         clk_cpu_dvfs_node = clk_get_dvfs_node("clk_core");
 952         if (!clk_cpu_dvfs_node){
 953                 return -EINVAL;
 954         }
 955
 956         memset(&ddr, 0x00, sizeof(ddr));
 957         ddr.clk_dvfs_node = clk_get_dvfs_node("clk_ddr");
 958         if (!ddr.clk_dvfs_node){
 959                 return -EINVAL;
 960         }
 961         clk_enable_dvfs(ddr.clk_dvfs_node);
 962
 963         dvfs_clk_register_set_rate_callback(ddr.clk_dvfs_node, ddrfreq_scale_rate_for_dvfs);
 964
 965         init_waitqueue_head(&ddr.wait);
 966         INIT_LIST_HEAD(&ddr.video_info_list);
 967         ddr.mode = "normal";
 968         ddr.normal_rate = dvfs_clk_get_rate(ddr.clk_dvfs_node);
 969         ddr.sys_status = rockchip_get_system_status();
 970
 971         of_init_ddr_freq_table();
 972
 973         if (!ddr.reboot_rate)
 974                 ddr.reboot_rate = ddr.normal_rate;
 975
 976 #ifdef CONFIG_INPUT
 977         ret = input_register_handler(&ddr_freq_input_handler);
 978         if (ret)
 979                 ddr.auto_freq = false;
 980 #endif
 981
 982         //REGISTER_CLK_NOTIFIER(pd_isp);
 983         //REGISTER_CLK_NOTIFIER(pd_vop0);
 984         //REGISTER_CLK_NOTIFIER(pd_vop1);
 985
 986         ret = misc_register(&video_state_dev);
 987         ret = misc_register(&ddr_freq_dev);
 988         if (unlikely(ret)) {
 989                 pr_err("failed to register video_state misc device! error %d\n", ret);
 990                 goto err;
 991         }
 992
 993         ddr.task = kthread_create(ddrfreq_task, NULL, "ddrfreqd");
 994         if (IS_ERR(ddr.task)) {
 995                 ret = PTR_ERR(ddr.task);
 996                 pr_err("failed to create kthread! error %d\n", ret);
 997                 goto err1;
 998         }
 999
1000         sched_setscheduler_nocheck(ddr.task, SCHED_FIFO, &param);
1001         get_task_struct(ddr.task);
1002         kthread_bind(ddr.task, 0);
1003         wake_up_process(ddr.task);
1004
1005         rockchip_register_system_status_notifier(&ddrfreq_system_status_notifier);
1006         fb_register_client(&ddr_freq_suspend_notifier);
1007         register_reboot_notifier(&ddrfreq_reboot_notifier);
1008
1009         pr_info("verion 1.2 20140526\n");
1010         pr_info("normal %luMHz video_1080p %luMHz video_4k %luMHz dualview %luMHz idle %luMHz suspend %luMHz reboot %luMHz\n",
1011                 ddr.normal_rate / MHZ,
1012                 ddr.video_1080p_rate / MHZ,
1013                 ddr.video_4k_rate / MHZ,
1014                 ddr.dualview_rate / MHZ,
1015                 ddr.idle_rate / MHZ,
1016                 ddr.suspend_rate / MHZ,
1017                 ddr.reboot_rate / MHZ);
1018
1019         pr_info("auto-freq=%d\n", ddr.auto_freq);
1020         if (auto_freq_table) {
1021                 for (i = 0; i < auto_freq_table_size; i++) {
1022                         pr_info("auto-freq-table[%d] %luMHz\n", i, auto_freq_table[i] / MHZ);
1023                 }
1024         } else {
1025                 pr_info("auto-freq-table epmty!\n");
1026         }
1027         return 0;
1028
1029 err1:
1030         misc_deregister(&video_state_dev);
1031 err:
1032         return ret;
1033 }
1034 late_initcall(ddrfreq_init);
1035 /****************************ddr bandwith tst************************************/
1036 #if defined(CONFIG_RK_PM_TESTS)
1037 static ssize_t ddrbw_dyn_show(struct kobject *kobj, struct kobj_attribute *attr,
1038                 char *buf)
1039 {
1040         char *str = buf;
1041         str += sprintf(str, "print: %d\n", print);
1042         str += sprintf(str, "watch: %d\n", watch);
1043         str += sprintf(str, "high_load: %d\n", high_load);
1044         str += sprintf(str, "low_load: %d\n", low_load);
1045         str += sprintf(str, "auto_freq_interval_ms: %d\n", auto_freq_interval_ms);
1046         str += sprintf(str, "down_rate_delay_ms: %ld\n", down_rate_delay_ms);
1047 //      str += sprintf(str, "low_load_last_ms: %d\n", low_load_last_ms);
1048         if (str != buf)
1049                 *(str - 1) = '\n';
1050         return (str - buf);
1051 }
1052
1053 static ssize_t ddrbw_dyn_store(struct kobject *kobj, struct kobj_attribute *attr,
1054                 const char *buf, size_t n)
1055 {
1056         int value;
1057         char var_name[64];
1058
1059         sscanf(buf, "%s %u", var_name, &value);
1060
1061         if((strncmp(buf, "print", strlen("print")) == 0)) {
1062                 print = value;
1063         } else if((strncmp(buf, "watch", strlen("watch")) == 0)) {
1064                 watch = value;
1065         } else if((strncmp(buf, "high", strlen("high")) == 0)) {
1066                 high_load = value;
1067         } else if((strncmp(buf, "low", strlen("low")) == 0)) {
1068                 low_load = value;
1069         } else if((strncmp(buf, "interval", strlen("interval")) == 0)) {
1070                 auto_freq_interval_ms = value;
1071         } else if((strncmp(buf, "downdelay", strlen("downdelay")) == 0)) {
1072                 down_rate_delay_ms = value;
1073         }
1074         return n;
1075 }
1076
1077 struct ddrfreq_attribute {
1078         struct attribute        attr;
1079         ssize_t (*show)(struct kobject *kobj, struct kobj_attribute *attr,
1080                         char *buf);
1081         ssize_t (*store)(struct kobject *kobj, struct kobj_attribute *attr,
1082                         const char *buf, size_t n);
1083 };
1084
1085 static struct ddrfreq_attribute ddrfreq_attrs[] = {
1086         /*     node_name        permision               show_func       store_func */
1087         __ATTR(ddrfreq, S_IRUSR|S_IRGRP|S_IWUSR,        ddrbw_dyn_show, ddrbw_dyn_store),
1088 };
1089 int rk_pm_tests_kobj_atrradd(const struct attribute *attr);
1090
1091 static void ddrfreq_tst_init(void)
1092 {
1093         int ret;
1094
1095         ret = rk_pm_tests_kobj_atrradd(&ddrfreq_attrs[0].attr);
1096
1097         if (ret) {
1098                 printk("%s: create ddrfreq sysfs node error, ret: %d\n", __func__, ret);
1099                 return;
1100         }
1101 }
1102 #endif