2 #include <linux/linkage.h>
3 #include <asm/assembler.h>
4 #include <asm/memory.h>
5 //#include <asm/suspend.h>
7 #define _RKPM_SEELP_S_INCLUDE_
11 ENTRY(rkpm_slp_cpu_while_tst)
12 stmfd sp!, { r3 - r12, lr }
17 ldmfd sp!, { r3 - r12, pc }
19 ENDPROC(rkpm_slp_cpu_while_tst)
23 ENTRY(rkpm_slp_cpu_resume)
32 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
43 WFENE // ; wait if it.s locked
44 B cpu1loop // ; if any failure, loop
53 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
54 mcr p15, 2, r0, c0, c0, 0
55 mrc p15, 1, r0, c0, c0, 0
58 and r2, r1, r0, lsr #13
62 and r3, r1, r0, lsr #3 @ NumWays - 1
63 add r2, r2, #1 @ NumSets
66 add r0, r0, #4 @ SetShift
69 add r4, r3, #1 @ NumWays
70 1: sub r2, r2, #1 @ NumSets--
71 mov r3, r4 @ Temp = NumWays
72 2: subs r3, r3, #1 @ Temp--
75 orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
76 mcr p15, 0, r5, c7, c6, 2
84 ldr r1,=PM_BOOT_CODE_SP
85 mov sp, r1 //setting sp
91 adr r1,9b // boot ram base
92 ldr r5,8f // resume data offset ,from ram base
93 add r5,r5,r1 // resume data addr
96 ldr r3 ,[r5,#(RKPM_BOOTDATA_L2LTY*4)]
97 mcr p15, 1, r3, c9, c0, 2
100 ldr sp,[r5,#(RKPM_BOOTDATA_CPUSP*4)] //sp
102 ldr r3,[r5,#(RKPM_BOOTDATA_DDR_F*4)] //get SLP_DDR_NEED_RES ,if it is 1 ,ddr need to reusme
105 ldr r1,[r5,#(RKPM_BOOTDATA_DDRCODE*4)] // ddr resume code
106 ldr r0,[r5,#(RKPM_BOOTDATA_DDRDATA*4)] //ddr resume data
112 ldr r4, = (0xFF730000+0x18)
119 ldr pc, [r5,#(RKPM_BOOTDATA_CPUCODE*4)]
120 8: .long (RKPM_BOOT_CODE_OFFSET+RKPM_BOOT_CODE_SIZE)
121 ENDPROC(rkpm_slp_cpu_resume)