1 /* linux/arch/arm/mach-s3c2410/s3c2410.c
3 * Copyright (c) 2003-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * http://www.simtec.co.uk/products/EB2410ITX/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/gpio.h>
20 #include <linux/clk.h>
21 #include <linux/device.h>
22 #include <linux/syscore_ops.h>
23 #include <linux/serial_core.h>
24 #include <linux/platform_device.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
31 #include <mach/hardware.h>
34 #include <plat/cpu-freq.h>
36 #include <mach/regs-clock.h>
37 #include <plat/regs-serial.h>
39 #include <plat/s3c2410.h>
41 #include <plat/devs.h>
42 #include <plat/clock.h>
45 #include <plat/watchdog-reset.h>
47 #include <plat/gpio-core.h>
48 #include <plat/gpio-cfg.h>
49 #include <plat/gpio-cfg-helpers.h>
51 /* Initial IO mappings */
53 static struct map_desc s3c2410_iodesc[] __initdata = {
59 /* our uart devices */
61 /* uart registration process */
63 void __init s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no)
65 s3c24xx_init_uartdevs("s3c2410-uart", s3c2410_uart_resources, cfg, no);
70 * register the standard cpu IO areas, and any passed in from the
71 * machine specific initialisation.
74 void __init s3c2410_map_io(void)
76 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
77 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
79 iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
82 void __init_or_cpufreq s3c2410_setup_clocks(void)
91 xtal_clk = clk_get(NULL, "xtal");
92 xtal = clk_get_rate(xtal_clk);
95 /* now we've got our machine bits initialised, work out what
98 fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal);
100 tmp = __raw_readl(S3C2410_CLKDIVN);
102 /* work out clock scalings */
104 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1);
105 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1);
107 /* print brieft summary of clocks, etc */
109 printk("S3C2410: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
110 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
112 /* initialise the clocks here, to allow other things like the
113 * console to use them
116 s3c24xx_setup_clocks(fclk, hclk, pclk);
119 /* fake ARMCLK for use with cpufreq, etc. */
121 static struct clk s3c2410_armclk = {
127 static struct clk_lookup s3c2410_clk_lookup[] = {
128 CLKDEV_INIT(NULL, "clk_uart_baud0", &clk_p),
129 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
132 void __init s3c2410_init_clocks(int xtal)
134 s3c24xx_register_baseclocks(xtal);
135 s3c2410_setup_clocks();
136 s3c2410_baseclk_add();
137 s3c24xx_register_clock(&s3c2410_armclk);
138 clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
141 struct bus_type s3c2410_subsys = {
142 .name = "s3c2410-core",
143 .dev_name = "s3c2410-core",
146 /* Note, we would have liked to name this s3c2410-core, but we cannot
147 * register two subsystems with the same name.
149 struct bus_type s3c2410a_subsys = {
150 .name = "s3c2410a-core",
151 .dev_name = "s3c2410a-core",
154 static struct device s3c2410_dev = {
155 .bus = &s3c2410_subsys,
158 /* need to register the subsystem before we actually register the device, and
159 * we also need to ensure that it has been initialised before any of the
160 * drivers even try to use it (even if not on an s3c2410 based system)
161 * as a driver which may support both 2410 and 2440 may try and use it.
164 static int __init s3c2410_core_init(void)
166 return subsys_system_register(&s3c2410_subsys, NULL);
169 core_initcall(s3c2410_core_init);
171 static int __init s3c2410a_core_init(void)
173 return subsys_system_register(&s3c2410a_subsys, NULL);
176 core_initcall(s3c2410a_core_init);
178 int __init s3c2410_init(void)
180 printk("S3C2410: Initialising architecture\n");
183 register_syscore_ops(&s3c2410_pm_syscore_ops);
185 register_syscore_ops(&s3c24xx_irq_syscore_ops);
187 return device_register(&s3c2410_dev);
190 int __init s3c2410a_init(void)
192 s3c2410_dev.bus = &s3c2410a_subsys;
193 return s3c2410_init();
196 void s3c2410_restart(char mode, const char *cmd)
204 /* we'll take a jump through zero as a poor second */