1 /* linux/arch/arm/mach-s3c2412/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2412 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sysdev.h>
18 #include <linux/serial_core.h>
21 #include <asm/arch/dma.h>
24 #include <asm/plat-s3c24xx/dma.h>
25 #include <asm/plat-s3c24xx/cpu.h>
27 #include <asm/plat-s3c/regs-serial.h>
28 #include <asm/arch/regs-gpio.h>
29 #include <asm/plat-s3c/regs-ac97.h>
30 #include <asm/arch/regs-mem.h>
31 #include <asm/arch/regs-lcd.h>
32 #include <asm/arch/regs-sdi.h>
33 #include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
34 #include <asm/plat-s3c24xx/regs-iis.h>
35 #include <asm/plat-s3c24xx/regs-spi.h>
37 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
39 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
42 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
46 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
50 .channels = MAP(S3C2412_DMAREQSEL_SDI),
51 .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
52 .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
56 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
57 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
58 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
62 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
63 .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
68 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
69 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
70 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
74 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
75 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
80 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
81 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
84 [DMACH_UART0_SRC2] = {
86 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
87 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
88 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
90 [DMACH_UART1_SRC2] = {
92 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
93 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
94 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
96 [DMACH_UART2_SRC2] = {
98 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
99 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
100 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
104 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
108 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
109 .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD,
113 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
114 .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD,
118 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
122 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
126 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
130 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
134 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
135 struct s3c24xx_dma_map *map)
137 writel(map->channels[0] | S3C2412_DMAREQSEL_HW,
138 chan->regs + S3C2412_DMA_DMAREQSEL);
141 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
142 .select = s3c2412_dma_select,
144 .map = s3c2412_dma_mappings,
145 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
148 static int __init s3c2412_dma_add(struct sys_device *sysdev)
151 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
154 static struct sysdev_driver s3c2412_dma_driver = {
155 .add = s3c2412_dma_add,
158 static int __init s3c2412_dma_init(void)
160 return sysdev_driver_register(&s3c2412_sysclass, &s3c2412_dma_driver);
163 arch_initcall(s3c2412_dma_init);