1 /* linux/arch/arm/mach-s3c2410/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
24 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-dma.h>
29 #include <mach/regs-lcd.h>
30 #include <plat/regs-spi.h>
32 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
35 .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
39 .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
43 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
44 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
45 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
49 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
53 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
57 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
61 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
65 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
69 .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
70 .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
71 .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
75 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
76 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
80 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
84 .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
88 .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
92 .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
96 .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
100 static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
101 struct s3c24xx_dma_map *map)
103 chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
106 static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
107 .select = s3c2410_dma_select,
108 .dcon_mask = 7 << 24,
109 .map = s3c2410_dma_mappings,
110 .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
113 static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
117 [0] = 3 | DMA_CH_VALID,
118 [1] = 2 | DMA_CH_VALID,
119 [2] = 0 | DMA_CH_VALID,
124 [0] = 1 | DMA_CH_VALID,
125 [1] = 2 | DMA_CH_VALID,
131 static int __init s3c2410_dma_add(struct device *dev,
132 struct subsys_interface *sif)
135 s3c24xx_dma_order_set(&s3c2410_dma_order);
136 return s3c24xx_dma_init_map(&s3c2410_dma_sel);
139 #if defined(CONFIG_CPU_S3C2410)
140 static struct subsys_interface s3c2410_dma_interface = {
141 .name = "s3c2410_dma",
142 .subsys = &s3c2410_subsys,
143 .add_dev = s3c2410_dma_add,
146 static int __init s3c2410_dma_drvinit(void)
148 return subsys_interface_register(&s3c2410_dma_interface);
151 arch_initcall(s3c2410_dma_drvinit);
153 static struct subsys_interface s3c2410a_dma_interface = {
154 .name = "s3c2410a_dma",
155 .subsys = &s3c2410a_subsys,
156 .add_dev = s3c2410_dma_add,
159 static int __init s3c2410a_dma_drvinit(void)
161 return subsys_interface_register(&s3c2410a_dma_interface);
164 arch_initcall(s3c2410a_dma_drvinit);
167 #if defined(CONFIG_CPU_S3C2442)
168 /* S3C2442 DMA contains the same selection table as the S3C2410 */
169 static struct subsys_interface s3c2442_dma_interface = {
170 .name = "s3c2442_dma",
171 .subsys = &s3c2442_subsys,
172 .add_dev = s3c2410_dma_add,
175 static int __init s3c2442_dma_drvinit(void)
177 return subsys_interface_register(&s3c2442_dma_interface);
180 arch_initcall(s3c2442_dma_drvinit);