1 /* linux/arch/arm/mach-s3c2412/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2412 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/device.h>
18 #include <linux/serial_core.h>
23 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-mem.h>
31 #include <mach/regs-lcd.h>
32 #include <mach/regs-sdi.h>
33 #include <plat/regs-iis.h>
34 #include <plat/regs-spi.h>
36 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
38 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
41 .channels = MAP(S3C2412_DMAREQSEL_XDREQ0),
42 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0),
46 .channels = MAP(S3C2412_DMAREQSEL_XDREQ1),
47 .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1),
51 .channels = MAP(S3C2412_DMAREQSEL_SDI),
52 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
56 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
57 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
62 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
66 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
67 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
71 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
72 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
76 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
77 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
79 [DMACH_UART0_SRC2] = {
81 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
82 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
84 [DMACH_UART1_SRC2] = {
86 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
87 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
89 [DMACH_UART2_SRC2] = {
91 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
92 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
96 .channels = MAP(S3C2412_DMAREQSEL_TIMER),
97 .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER),
101 .channels = MAP(S3C2412_DMAREQSEL_I2SRX),
102 .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX),
106 .channels = MAP(S3C2412_DMAREQSEL_I2STX),
107 .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX),
111 .channels = MAP(S3C2412_DMAREQSEL_USBEP1),
112 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1),
116 .channels = MAP(S3C2412_DMAREQSEL_USBEP2),
117 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2),
121 .channels = MAP(S3C2412_DMAREQSEL_USBEP3),
122 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3),
126 .channels = MAP(S3C2412_DMAREQSEL_USBEP4),
127 .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4),
131 static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan,
132 struct s3c24xx_dma_map *map,
133 enum dma_data_direction dir)
137 if (dir == DMA_FROM_DEVICE)
138 chsel = map->channels_rx[0];
140 chsel = map->channels[0];
142 chsel &= ~DMA_CH_VALID;
143 chsel |= S3C2412_DMAREQSEL_HW;
145 writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL);
148 static void s3c2412_dma_select(struct s3c2410_dma_chan *chan,
149 struct s3c24xx_dma_map *map)
151 s3c2412_dma_direction(chan, map, chan->source);
154 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
155 .select = s3c2412_dma_select,
156 .direction = s3c2412_dma_direction,
158 .map = s3c2412_dma_mappings,
159 .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
162 static int __init s3c2412_dma_add(struct device *dev,
163 struct subsys_interface *sif)
166 return s3c24xx_dma_init_map(&s3c2412_dma_sel);
169 static struct subsys_interface s3c2412_dma_interface = {
170 .name = "s3c2412_dma",
171 .subsys = &s3c2412_subsys,
172 .add_dev = s3c2412_dma_add,
175 static int __init s3c2412_dma_init(void)
177 return subsys_interface_register(&s3c2412_dma_interface);
180 arch_initcall(s3c2412_dma_init);