1 /* linux/arch/arm/mach-s3c2440/mach-anubis.c
3 * Copyright 2003-2009 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/list.h>
16 #include <linux/timer.h>
17 #include <linux/init.h>
18 #include <linux/gpio.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/ata_platform.h>
22 #include <linux/i2c.h>
24 #include <linux/sm501.h>
25 #include <linux/sm501-regs.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
31 #include <mach/anubis-map.h>
32 #include <mach/anubis-irq.h>
33 #include <mach/anubis-cpld.h>
35 #include <mach/hardware.h>
37 #include <asm/mach-types.h>
39 #include <plat/regs-serial.h>
40 #include <mach/regs-gpio.h>
41 #include <mach/regs-mem.h>
42 #include <mach/regs-lcd.h>
43 #include <plat/nand.h>
46 #include <linux/mtd/mtd.h>
47 #include <linux/mtd/nand.h>
48 #include <linux/mtd/nand_ecc.h>
49 #include <linux/mtd/partitions.h>
51 #include <net/ax88796.h>
53 #include <plat/clock.h>
54 #include <plat/devs.h>
56 #include <plat/audio-simtec.h>
61 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
63 static struct map_desc anubis_iodesc[] __initdata = {
67 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
68 .pfn = __phys_to_pfn(0x0),
72 .virtual = (u32)S3C24XX_VA_ISA_WORD,
73 .pfn = __phys_to_pfn(0x0),
78 /* we could possibly compress the next set down into a set of smaller tables
79 * pagetables, but that would mean using an L2 section, and it still means
80 * we cannot actually feed the same register to an LDR due to 16K spacing
83 /* CPLD control registers */
86 .virtual = (u32)ANUBIS_VA_CTRL1,
87 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1),
91 .virtual = (u32)ANUBIS_VA_IDREG,
92 .pfn = __phys_to_pfn(ANUBIS_PA_IDREG),
98 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
99 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
100 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
102 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
109 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
117 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
121 /* NAND Flash on Anubis board */
123 static int external_map[] = { 2 };
124 static int chip0_map[] = { 0 };
125 static int chip1_map[] = { 1 };
127 static struct mtd_partition __initdata anubis_default_nand_part[] = {
129 .name = "Boot Agent",
135 .size = SZ_4M - SZ_16K,
141 .size = SZ_32M - SZ_4M,
146 .size = MTDPART_SIZ_FULL,
150 static struct mtd_partition __initdata anubis_default_nand_part_large[] = {
152 .name = "Boot Agent",
158 .size = SZ_4M - SZ_128K,
164 .size = SZ_32M - SZ_4M,
169 .size = MTDPART_SIZ_FULL,
173 /* the Anubis has 3 selectable slots for nand-flash, the two
174 * on-board chip areas, as well as the external slot.
176 * Note, there is no current hot-plug support for the External
180 static struct s3c2410_nand_set __initdata anubis_nand_sets[] = {
184 .nr_map = external_map,
185 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
186 .partitions = anubis_default_nand_part,
192 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
193 .partitions = anubis_default_nand_part,
199 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
200 .partitions = anubis_default_nand_part,
204 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
208 slot = set->nr_map[slot] & 3;
210 pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
211 slot, set, set->nr_map);
213 tmp = __raw_readb(ANUBIS_VA_CTRL1);
214 tmp &= ~ANUBIS_CTRL1_NANDSEL;
217 pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
219 __raw_writeb(tmp, ANUBIS_VA_CTRL1);
222 static struct s3c2410_platform_nand __initdata anubis_nand_info = {
226 .nr_sets = ARRAY_SIZE(anubis_nand_sets),
227 .sets = anubis_nand_sets,
228 .select_chip = anubis_nand_select,
233 static struct pata_platform_info anubis_ide_platdata = {
237 static struct resource anubis_ide0_resource[] = {
238 [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32),
239 [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32),
240 [3] = DEFINE_RES_IRQ(IRQ_IDE0),
243 static struct platform_device anubis_device_ide0 = {
244 .name = "pata_platform",
246 .num_resources = ARRAY_SIZE(anubis_ide0_resource),
247 .resource = anubis_ide0_resource,
249 .platform_data = &anubis_ide_platdata,
250 .coherent_dma_mask = ~0,
254 static struct resource anubis_ide1_resource[] = {
255 [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32),
256 [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32),
257 [2] = DEFINE_RES_IRQ(IRQ_IDE0),
260 static struct platform_device anubis_device_ide1 = {
261 .name = "pata_platform",
263 .num_resources = ARRAY_SIZE(anubis_ide1_resource),
264 .resource = anubis_ide1_resource,
266 .platform_data = &anubis_ide_platdata,
267 .coherent_dma_mask = ~0,
271 /* Asix AX88796 10/100 ethernet controller */
273 static struct ax_plat_data anubis_asix_platdata = {
274 .flags = AXFLG_MAC_FROMDEV,
280 static struct resource anubis_asix_resource[] = {
281 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20),
282 [1] = DEFINE_RES_IRQ(IRQ_ASIX),
285 static struct platform_device anubis_device_asix = {
288 .num_resources = ARRAY_SIZE(anubis_asix_resource),
289 .resource = anubis_asix_resource,
291 .platform_data = &anubis_asix_platdata,
297 static struct resource anubis_sm501_resource[] = {
298 [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M),
299 [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
300 [2] = DEFINE_RES_IRQ(IRQ_EINT0),
303 static struct sm501_initdata anubis_sm501_initdata = {
305 .set = 0x3F000000, /* 24bit panel */
309 .set = 0x010100, /* SDRAM timing */
313 .set = SM501_MISC_PNL_24BIT,
317 .devices = SM501_USE_GPIO,
319 /* set the SDRAM and bus clocks */
324 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
337 static struct sm501_platdata anubis_sm501_platdata = {
338 .init = &anubis_sm501_initdata,
340 .gpio_i2c = anubis_sm501_gpio_i2c,
341 .gpio_i2c_nr = ARRAY_SIZE(anubis_sm501_gpio_i2c),
344 static struct platform_device anubis_device_sm501 = {
347 .num_resources = ARRAY_SIZE(anubis_sm501_resource),
348 .resource = anubis_sm501_resource,
350 .platform_data = &anubis_sm501_platdata,
354 /* Standard Anubis devices */
356 static struct platform_device *anubis_devices[] __initdata = {
366 &anubis_device_sm501,
369 static struct clk *anubis_clocks[] __initdata = {
379 static struct i2c_board_info anubis_i2c_devs[] __initdata = {
381 I2C_BOARD_INFO("tps65011", 0x48),
387 static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
392 .amp_gpio = S3C2410_GPB(2),
393 .amp_gain[0] = S3C2410_GPD(10),
394 .amp_gain[1] = S3C2410_GPD(11),
397 static void __init anubis_map_io(void)
399 /* initialise the clocks */
401 s3c24xx_dclk0.parent = &clk_upll;
402 s3c24xx_dclk0.rate = 12*1000*1000;
404 s3c24xx_dclk1.parent = &clk_upll;
405 s3c24xx_dclk1.rate = 24*1000*1000;
407 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
408 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
410 s3c24xx_uclk.parent = &s3c24xx_clkout1;
412 s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks));
414 s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
415 s3c24xx_init_clocks(0);
416 s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
418 /* check for the newer revision boards with large page nand */
420 if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) {
421 printk(KERN_INFO "ANUBIS-B detected (revision %d)\n",
422 __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK);
423 anubis_nand_sets[0].partitions = anubis_default_nand_part_large;
424 anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
426 /* ensure that the GPIO is setup */
427 s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
431 static void __init anubis_init(void)
433 s3c_i2c0_set_platdata(NULL);
434 s3c_nand_set_platdata(&anubis_nand_info);
435 simtec_audio_add(NULL, false, &anubis_audio);
437 platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
439 i2c_register_board_info(0, anubis_i2c_devs,
440 ARRAY_SIZE(anubis_i2c_devs));
444 MACHINE_START(ANUBIS, "Simtec-Anubis")
445 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
446 .atag_offset = 0x100,
447 .map_io = anubis_map_io,
448 .init_machine = anubis_init,
449 .init_irq = s3c24xx_init_irq,
450 .timer = &s3c24xx_timer,
451 .restart = s3c244x_restart,