2 * Copyright (c) 2005-2008 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/interrupt.h>
14 #include <linux/list.h>
15 #include <linux/timer.h>
16 #include <linux/init.h>
17 #include <linux/gpio.h>
18 #include <linux/device.h>
19 #include <linux/syscore_ops.h>
20 #include <linux/serial_core.h>
21 #include <linux/clk.h>
22 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
26 #include <linux/i2c/tps65010.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/map.h>
31 #include <asm/mach/irq.h>
34 #include <linux/platform_data/mtd-nand-s3c2410.h>
35 #include <linux/platform_data/i2c-s3c2410.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/nand.h>
39 #include <linux/mtd/nand_ecc.h>
40 #include <linux/mtd/partitions.h>
42 #include <plat/clock.h>
44 #include <plat/cpu-freq.h>
45 #include <plat/devs.h>
46 #include <plat/gpio-cfg.h>
47 #include <plat/regs-serial.h>
48 #include <plat/samsung-time.h>
50 #include <mach/hardware.h>
51 #include <mach/regs-gpio.h>
52 #include <mach/regs-lcd.h>
53 #include <mach/gpio-samsung.h>
59 /* onboard perihperal map */
61 static struct map_desc osiris_iodesc[] __initdata = {
62 /* ISA IO areas (may be over-written later) */
65 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
66 .pfn = __phys_to_pfn(S3C2410_CS5),
70 .virtual = (u32)S3C24XX_VA_ISA_WORD,
71 .pfn = __phys_to_pfn(S3C2410_CS5),
76 /* CPLD control registers */
79 .virtual = (u32)OSIRIS_VA_CTRL0,
80 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
84 .virtual = (u32)OSIRIS_VA_CTRL1,
85 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
89 .virtual = (u32)OSIRIS_VA_CTRL2,
90 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
94 .virtual = (u32)OSIRIS_VA_IDREG,
95 .pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
101 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
102 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
103 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
105 static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
112 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
120 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
128 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
132 /* NAND Flash on Osiris board */
134 static int external_map[] = { 2 };
135 static int chip0_map[] = { 0 };
136 static int chip1_map[] = { 1 };
138 static struct mtd_partition __initdata osiris_default_nand_part[] = {
140 .name = "Boot Agent",
146 .size = SZ_4M - SZ_16K,
152 .size = SZ_32M - SZ_4M,
157 .size = MTDPART_SIZ_FULL,
161 static struct mtd_partition __initdata osiris_default_nand_part_large[] = {
163 .name = "Boot Agent",
169 .size = SZ_4M - SZ_128K,
175 .size = SZ_32M - SZ_4M,
180 .size = MTDPART_SIZ_FULL,
184 /* the Osiris has 3 selectable slots for nand-flash, the two
185 * on-board chip areas, as well as the external slot.
187 * Note, there is no current hot-plug support for the External
191 static struct s3c2410_nand_set __initdata osiris_nand_sets[] = {
195 .nr_map = external_map,
196 .options = NAND_SCAN_SILENT_NODEV,
197 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
198 .partitions = osiris_default_nand_part,
204 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
205 .partitions = osiris_default_nand_part,
211 .options = NAND_SCAN_SILENT_NODEV,
212 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
213 .partitions = osiris_default_nand_part,
217 static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
221 slot = set->nr_map[slot] & 3;
223 pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
224 slot, set, set->nr_map);
226 tmp = __raw_readb(OSIRIS_VA_CTRL0);
227 tmp &= ~OSIRIS_CTRL0_NANDSEL;
230 pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
232 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
235 static struct s3c2410_platform_nand __initdata osiris_nand_info = {
239 .nr_sets = ARRAY_SIZE(osiris_nand_sets),
240 .sets = osiris_nand_sets,
241 .select_chip = osiris_nand_select,
244 /* PCMCIA control and configuration */
246 static struct resource osiris_pcmcia_resource[] = {
247 [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M),
248 [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M),
251 static struct platform_device osiris_pcmcia = {
252 .name = "osiris-pcmcia",
254 .num_resources = ARRAY_SIZE(osiris_pcmcia_resource),
255 .resource = osiris_pcmcia_resource,
258 /* Osiris power management device */
261 static unsigned char pm_osiris_ctrl0;
263 static int osiris_pm_suspend(void)
267 pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
268 tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
270 /* ensure correct NAND slot is selected on resume */
271 if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
274 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
276 /* ensure that an nRESET is not generated on resume. */
277 gpio_request_one(S3C2410_GPA(21), GPIOF_OUT_INIT_HIGH, NULL);
278 gpio_free(S3C2410_GPA(21));
283 static void osiris_pm_resume(void)
285 if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
286 __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
288 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
290 s3c_gpio_cfgpin(S3C2410_GPA(21), S3C2410_GPA21_nRSTOUT);
294 #define osiris_pm_suspend NULL
295 #define osiris_pm_resume NULL
298 static struct syscore_ops osiris_pm_syscore_ops = {
299 .suspend = osiris_pm_suspend,
300 .resume = osiris_pm_resume,
303 /* Link for DVS driver to TPS65011 */
305 static void osiris_tps_release(struct device *dev)
307 /* static device, do not need to release anything */
310 static struct platform_device osiris_tps_device = {
311 .name = "osiris-dvs",
313 .dev.release = osiris_tps_release,
316 static int osiris_tps_setup(struct i2c_client *client, void *context)
318 osiris_tps_device.dev.parent = &client->dev;
319 return platform_device_register(&osiris_tps_device);
322 static int osiris_tps_remove(struct i2c_client *client, void *context)
324 platform_device_unregister(&osiris_tps_device);
328 static struct tps65010_board osiris_tps_board = {
329 .base = -1, /* GPIO can go anywhere at the moment */
330 .setup = osiris_tps_setup,
331 .teardown = osiris_tps_remove,
334 /* I2C devices fitted. */
336 static struct i2c_board_info osiris_i2c_devs[] __initdata = {
338 I2C_BOARD_INFO("tps65011", 0x48),
340 .platform_data = &osiris_tps_board,
344 /* Standard Osiris devices */
346 static struct platform_device *osiris_devices[] __initdata = {
353 static struct clk *osiris_clocks[] __initdata = {
361 static struct s3c_cpufreq_board __initdata osiris_cpufreq = {
362 .refresh = 7800, /* refresh period is 7.8usec */
367 static void __init osiris_map_io(void)
371 /* initialise the clocks */
373 s3c24xx_dclk0.parent = &clk_upll;
374 s3c24xx_dclk0.rate = 12*1000*1000;
376 s3c24xx_dclk1.parent = &clk_upll;
377 s3c24xx_dclk1.rate = 24*1000*1000;
379 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
380 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
382 s3c24xx_uclk.parent = &s3c24xx_clkout1;
384 s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
386 s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
387 s3c24xx_init_clocks(0);
388 s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
389 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
391 /* check for the newer revision boards with large page nand */
393 if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
394 printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
395 __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
396 osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
397 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
399 /* write-protect line to the NAND */
400 gpio_request_one(S3C2410_GPA(0), GPIOF_OUT_INIT_HIGH, NULL);
401 gpio_free(S3C2410_GPA(0));
404 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
406 local_irq_save(flags);
407 __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
408 local_irq_restore(flags);
411 static void __init osiris_init(void)
413 register_syscore_ops(&osiris_pm_syscore_ops);
415 s3c_i2c0_set_platdata(NULL);
416 s3c_nand_set_platdata(&osiris_nand_info);
418 s3c_cpufreq_setboard(&osiris_cpufreq);
420 i2c_register_board_info(0, osiris_i2c_devs,
421 ARRAY_SIZE(osiris_i2c_devs));
423 platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
426 MACHINE_START(OSIRIS, "Simtec-OSIRIS")
427 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
428 .atag_offset = 0x100,
429 .map_io = osiris_map_io,
430 .init_irq = s3c2440_init_irq,
431 .init_machine = osiris_init,
432 .init_time = samsung_timer_init,
433 .restart = s3c244x_restart,