1 /* linux/arch/arm/mach-s3c2442/s3c2442.c
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * S3C2442 core and lock support
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/list.h>
28 #include <linux/errno.h>
29 #include <linux/err.h>
30 #include <linux/device.h>
31 #include <linux/syscore_ops.h>
32 #include <linux/interrupt.h>
33 #include <linux/ioport.h>
34 #include <linux/mutex.h>
35 #include <linux/gpio.h>
36 #include <linux/clk.h>
39 #include <mach/hardware.h>
40 #include <mach/gpio-samsung.h>
41 #include <linux/atomic.h>
44 #include <mach/regs-clock.h>
46 #include <plat/clock.h>
50 #include <plat/gpio-core.h>
51 #include <plat/gpio-cfg.h>
52 #include <plat/gpio-cfg-helpers.h>
56 #ifdef CONFIG_SAMSUNG_CLOCK
57 /* S3C2442 extended clock support */
59 static unsigned long s3c2442_camif_upll_round(struct clk *clk,
62 unsigned long parent_rate = clk_get_rate(clk->parent);
65 if (rate > parent_rate)
68 div = parent_rate / rate;
71 return parent_rate / 3;
73 /* note, we remove the +/- 1 calculations for the divisor */
82 return parent_rate / (div * 2);
85 static int s3c2442_camif_upll_setrate(struct clk *clk, unsigned long rate)
87 unsigned long parent_rate = clk_get_rate(clk->parent);
88 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
90 rate = s3c2442_camif_upll_round(clk, rate);
92 camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3;
94 if (rate == parent_rate) {
95 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL;
96 } else if ((parent_rate / rate) == 3) {
97 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
98 camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3;
100 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK;
101 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL;
102 camdivn |= (((parent_rate / rate) / 2) - 1);
105 __raw_writel(camdivn, S3C2440_CAMDIVN);
110 /* Extra S3C2442 clocks */
112 static struct clk s3c2442_clk_cam = {
115 .enable = s3c2410_clkcon_enable,
116 .ctrlbit = S3C2440_CLKCON_CAMERA,
119 static struct clk s3c2442_clk_cam_upll = {
120 .name = "camif-upll",
122 .ops = &(struct clk_ops) {
123 .set_rate = s3c2442_camif_upll_setrate,
124 .round_rate = s3c2442_camif_upll_round,
128 static int s3c2442_clk_add(struct device *dev, struct subsys_interface *sif)
130 struct clk *clock_upll;
134 clock_p = clk_get(NULL, "pclk");
135 clock_h = clk_get(NULL, "hclk");
136 clock_upll = clk_get(NULL, "upll");
138 if (IS_ERR(clock_p) || IS_ERR(clock_h) || IS_ERR(clock_upll)) {
139 printk(KERN_ERR "S3C2442: Failed to get parent clocks\n");
143 s3c2442_clk_cam.parent = clock_h;
144 s3c2442_clk_cam_upll.parent = clock_upll;
146 s3c24xx_register_clock(&s3c2442_clk_cam);
147 s3c24xx_register_clock(&s3c2442_clk_cam_upll);
149 clk_disable(&s3c2442_clk_cam);
154 static struct subsys_interface s3c2442_clk_interface = {
155 .name = "s3c2442_clk",
156 .subsys = &s3c2442_subsys,
157 .add_dev = s3c2442_clk_add,
160 static __init int s3c2442_clk_init(void)
162 return subsys_interface_register(&s3c2442_clk_interface);
165 arch_initcall(s3c2442_clk_init);
168 static struct device s3c2442_dev = {
169 .bus = &s3c2442_subsys,
172 int __init s3c2442_init(void)
174 printk("S3C2442: Initialising architecture\n");
177 register_syscore_ops(&s3c2410_pm_syscore_ops);
178 register_syscore_ops(&s3c24xx_irq_syscore_ops);
180 register_syscore_ops(&s3c244x_pm_syscore_ops);
182 return device_register(&s3c2442_dev);
185 void __init s3c2442_map_io(void)
189 s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1down;
190 s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1down;