1 /* linux/arch/arm/plat-s3c64xx/cpu.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/sysdev.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <linux/dma-mapping.h>
25 #include <mach/hardware.h>
28 #include <asm/mach/arch.h>
29 #include <asm/mach/map.h>
31 #include <plat/regs-serial.h>
34 #include <plat/devs.h>
35 #include <plat/clock.h>
37 #include <plat/s3c6400.h>
38 #include <plat/s3c6410.h>
40 /* table of supported CPUs */
42 static const char name_s3c6400[] = "S3C6400";
43 static const char name_s3c6410[] = "S3C6410";
45 static struct cpu_table cpu_ids[] __initdata = {
47 .idcode = S3C6400_CPU_ID,
48 .idmask = S3C64XX_CPU_MASK,
49 .map_io = s3c6400_map_io,
50 .init_clocks = s3c6400_init_clocks,
51 .init_uarts = s3c6400_init_uarts,
55 .idcode = S3C6410_CPU_ID,
56 .idmask = S3C64XX_CPU_MASK,
57 .map_io = s3c6410_map_io,
58 .init_clocks = s3c6410_init_clocks,
59 .init_uarts = s3c6410_init_uarts,
65 /* minimal IO mapping */
67 /* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
68 #define UART_OFFS (S3C_PA_UART & 0xfffff)
70 static struct map_desc s3c_iodesc[] __initdata = {
72 .virtual = (unsigned long)S3C_VA_SYS,
73 .pfn = __phys_to_pfn(S3C64XX_PA_SYSCON),
77 .virtual = (unsigned long)S3C_VA_MEM,
78 .pfn = __phys_to_pfn(S3C64XX_PA_SROM),
82 .virtual = (unsigned long)(S3C_VA_UART + UART_OFFS),
83 .pfn = __phys_to_pfn(S3C_PA_UART),
87 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S3C64XX_PA_VIC0),
92 .virtual = (unsigned long)VA_VIC1,
93 .pfn = __phys_to_pfn(S3C64XX_PA_VIC1),
97 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S3C_PA_TIMER),
102 .virtual = (unsigned long)S3C64XX_VA_GPIO,
103 .pfn = __phys_to_pfn(S3C64XX_PA_GPIO),
107 .virtual = (unsigned long)S3C64XX_VA_MODEM,
108 .pfn = __phys_to_pfn(S3C64XX_PA_MODEM),
112 .virtual = (unsigned long)S3C_VA_WATCHDOG,
113 .pfn = __phys_to_pfn(S3C64XX_PA_WATCHDOG),
117 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
118 .pfn = __phys_to_pfn(S3C64XX_PA_USB_HSPHY),
125 struct sysdev_class s3c64xx_sysclass = {
126 .name = "s3c64xx-core",
129 static struct sys_device s3c64xx_sysdev = {
130 .cls = &s3c64xx_sysclass,
133 /* uart registration process */
135 void __init s3c6400_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
137 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
140 /* read cpu identification code */
142 void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
144 /* initialise the io descriptors we need for initialisation */
145 iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc));
146 iotable_init(mach_desc, size);
147 init_consistent_dma_size(SZ_8M);
152 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
155 static __init int s3c64xx_sysdev_init(void)
157 sysdev_class_register(&s3c64xx_sysclass);
158 return sysdev_register(&s3c64xx_sysdev);
161 core_initcall(s3c64xx_sysdev_init);