Merge tag 'omapdss-for-3.5' of git://github.com/tomba/linux into fbdev-next
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-s3c64xx / mach-real6410.c
1 /* linux/arch/arm/mach-s3c64xx/mach-real6410.c
2  *
3  * Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
4  * Copyright 2008 Openmoko, Inc.
5  * Copyright 2008 Simtec Electronics
6  *      Ben Dooks <ben@simtec.co.uk>
7  *      http://armlinux.simtec.co.uk/
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13 */
14
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/gpio.h>
19 #include <linux/kernel.h>
20 #include <linux/list.h>
21 #include <linux/dm9000.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/platform_device.h>
25 #include <linux/serial_core.h>
26 #include <linux/types.h>
27
28 #include <asm/hardware/vic.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include <mach/map.h>
34 #include <mach/regs-gpio.h>
35 #include <mach/regs-modem.h>
36 #include <mach/regs-srom.h>
37
38 #include <plat/adc.h>
39 #include <plat/cpu.h>
40 #include <plat/devs.h>
41 #include <plat/fb.h>
42 #include <plat/nand.h>
43 #include <plat/regs-serial.h>
44 #include <plat/ts.h>
45 #include <plat/regs-fb-v4.h>
46
47 #include <video/platform_lcd.h>
48
49 #include "common.h"
50
51 #define UCON S3C2410_UCON_DEFAULT
52 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
53 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
54
55 static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
56         [0] = {
57                 .hwport = 0,
58                 .flags  = 0,
59                 .ucon   = UCON,
60                 .ulcon  = ULCON,
61                 .ufcon  = UFCON,
62         },
63         [1] = {
64                 .hwport = 1,
65                 .flags  = 0,
66                 .ucon   = UCON,
67                 .ulcon  = ULCON,
68                 .ufcon  = UFCON,
69         },
70         [2] = {
71                 .hwport = 2,
72                 .flags  = 0,
73                 .ucon   = UCON,
74                 .ulcon  = ULCON,
75                 .ufcon  = UFCON,
76         },
77         [3] = {
78                 .hwport = 3,
79                 .flags  = 0,
80                 .ucon   = UCON,
81                 .ulcon  = ULCON,
82                 .ufcon  = UFCON,
83         },
84 };
85
86 /* DM9000AEP 10/100 ethernet controller */
87
88 static struct resource real6410_dm9k_resource[] = {
89         [0] = {
90                 .start  = S3C64XX_PA_XM0CSN1,
91                 .end    = S3C64XX_PA_XM0CSN1 + 1,
92                 .flags  = IORESOURCE_MEM
93         },
94         [1] = {
95                 .start  = S3C64XX_PA_XM0CSN1 + 4,
96                 .end    = S3C64XX_PA_XM0CSN1 + 5,
97                 .flags  = IORESOURCE_MEM
98         },
99         [2] = {
100                 .start  = S3C_EINT(7),
101                 .end    = S3C_EINT(7),
102                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
103         }
104 };
105
106 static struct dm9000_plat_data real6410_dm9k_pdata = {
107         .flags          = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
108 };
109
110 static struct platform_device real6410_device_eth = {
111         .name           = "dm9000",
112         .id             = -1,
113         .num_resources  = ARRAY_SIZE(real6410_dm9k_resource),
114         .resource       = real6410_dm9k_resource,
115         .dev            = {
116                 .platform_data  = &real6410_dm9k_pdata,
117         },
118 };
119
120 static struct s3c_fb_pd_win real6410_lcd_type0_fb_win = {
121         .max_bpp        = 32,
122         .default_bpp    = 16,
123         .xres           = 480,
124         .yres           = 272,
125 };
126
127 static struct fb_videomode real6410_lcd_type0_timing = {
128         /* 4.3" 480x272 */
129         .left_margin    = 3,
130         .right_margin   = 2,
131         .upper_margin   = 1,
132         .lower_margin   = 1,
133         .hsync_len      = 40,
134         .vsync_len      = 1,
135 };
136
137 static struct s3c_fb_pd_win real6410_lcd_type1_fb_win = {
138         .max_bpp        = 32,
139         .default_bpp    = 16,
140         .xres           = 800,
141         .yres           = 480,
142 };
143
144 static struct fb_videomode real6410_lcd_type1_timing = {
145         /* 7.0" 800x480 */
146         .left_margin    = 8,
147         .right_margin   = 13,
148         .upper_margin   = 7,
149         .lower_margin   = 5,
150         .hsync_len      = 3,
151         .vsync_len      = 1,
152         .xres           = 800,
153         .yres           = 480,
154 };
155
156 static struct s3c_fb_platdata real6410_lcd_pdata[] __initdata = {
157         {
158                 .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
159                 .vtiming        = &real6410_lcd_type0_timing,
160                 .win[0]         = &real6410_lcd_type0_fb_win,
161                 .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
162                 .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
163         }, {
164                 .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
165                 .vtiming        = &real6410_lcd_type1_timing,
166                 .win[0]         = &real6410_lcd_type1_fb_win,
167                 .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
168                 .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
169         },
170         { },
171 };
172
173 static struct mtd_partition real6410_nand_part[] = {
174         [0] = {
175                 .name   = "uboot",
176                 .size   = SZ_1M,
177                 .offset = 0,
178         },
179         [1] = {
180                 .name   = "kernel",
181                 .size   = SZ_2M,
182                 .offset = SZ_1M,
183         },
184         [2] = {
185                 .name   = "rootfs",
186                 .size   = MTDPART_SIZ_FULL,
187                 .offset = SZ_1M + SZ_2M,
188         },
189 };
190
191 static struct s3c2410_nand_set real6410_nand_sets[] = {
192         [0] = {
193                 .name           = "nand",
194                 .nr_chips       = 1,
195                 .nr_partitions  = ARRAY_SIZE(real6410_nand_part),
196                 .partitions     = real6410_nand_part,
197         },
198 };
199
200 static struct s3c2410_platform_nand real6410_nand_info = {
201         .tacls          = 25,
202         .twrph0         = 55,
203         .twrph1         = 40,
204         .nr_sets        = ARRAY_SIZE(real6410_nand_sets),
205         .sets           = real6410_nand_sets,
206 };
207
208 static struct platform_device *real6410_devices[] __initdata = {
209         &real6410_device_eth,
210         &s3c_device_hsmmc0,
211         &s3c_device_hsmmc1,
212         &s3c_device_fb,
213         &s3c_device_nand,
214         &s3c_device_adc,
215         &s3c_device_ts,
216         &s3c_device_ohci,
217 };
218
219 static void __init real6410_map_io(void)
220 {
221         u32 tmp;
222
223         s3c64xx_init_io(NULL, 0);
224         s3c24xx_init_clocks(12000000);
225         s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
226
227         /* set the LCD type */
228         tmp = __raw_readl(S3C64XX_SPCON);
229         tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
230         tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
231         __raw_writel(tmp, S3C64XX_SPCON);
232
233         /* remove the LCD bypass */
234         tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
235         tmp &= ~MIFPCON_LCD_BYPASS;
236         __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
237 }
238
239 /*
240  * real6410_features string
241  *
242  * 0-9 LCD configuration
243  *
244  */
245 static char real6410_features_str[12] __initdata = "0";
246
247 static int __init real6410_features_setup(char *str)
248 {
249         if (str)
250                 strlcpy(real6410_features_str, str,
251                         sizeof(real6410_features_str));
252         return 1;
253 }
254
255 __setup("real6410=", real6410_features_setup);
256
257 #define FEATURE_SCREEN (1 << 0)
258
259 struct real6410_features_t {
260         int done;
261         int lcd_index;
262 };
263
264 static void real6410_parse_features(
265                 struct real6410_features_t *features,
266                 const char *features_str)
267 {
268         const char *fp = features_str;
269
270         features->done = 0;
271         features->lcd_index = 0;
272
273         while (*fp) {
274                 char f = *fp++;
275
276                 switch (f) {
277                 case '0'...'9': /* tft screen */
278                         if (features->done & FEATURE_SCREEN) {
279                                 printk(KERN_INFO "REAL6410: '%c' ignored, "
280                                         "screen type already set\n", f);
281                         } else {
282                                 int li = f - '0';
283                                 if (li >= ARRAY_SIZE(real6410_lcd_pdata))
284                                         printk(KERN_INFO "REAL6410: '%c' out "
285                                                 "of range LCD mode\n", f);
286                                 else {
287                                         features->lcd_index = li;
288                                 }
289                         }
290                         features->done |= FEATURE_SCREEN;
291                         break;
292                 }
293         }
294 }
295
296 static void __init real6410_machine_init(void)
297 {
298         u32 cs1;
299         struct real6410_features_t features = { 0 };
300
301         printk(KERN_INFO "REAL6410: Option string real6410=%s\n",
302                         real6410_features_str);
303
304         /* Parse the feature string */
305         real6410_parse_features(&features, real6410_features_str);
306
307         printk(KERN_INFO "REAL6410: selected LCD display is %dx%d\n",
308                 real6410_lcd_pdata[features.lcd_index].win[0]->xres,
309                 real6410_lcd_pdata[features.lcd_index].win[0]->yres);
310
311         s3c_fb_set_platdata(&real6410_lcd_pdata[features.lcd_index]);
312         s3c_nand_set_platdata(&real6410_nand_info);
313         s3c24xx_ts_set_platdata(NULL);
314
315         /* configure nCS1 width to 16 bits */
316
317         cs1 = __raw_readl(S3C64XX_SROM_BW) &
318                 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
319         cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
320                 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
321                 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
322                         S3C64XX_SROM_BW__NCS1__SHIFT;
323         __raw_writel(cs1, S3C64XX_SROM_BW);
324
325         /* set timing for nCS1 suitable for ethernet chip */
326
327         __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
328                 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
329                 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
330                 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
331                 (13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
332                 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
333                 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
334
335         gpio_request(S3C64XX_GPF(15), "LCD power");
336
337         platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
338 }
339
340 MACHINE_START(REAL6410, "REAL6410")
341         /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
342         .atag_offset    = 0x100,
343
344         .init_irq       = s3c6410_init_irq,
345         .handle_irq     = vic_handle_irq,
346         .map_io         = real6410_map_io,
347         .init_machine   = real6410_machine_init,
348         .timer          = &s3c24xx_timer,
349         .restart        = s3c64xx_restart,
350 MACHINE_END