11d31fe87ccf44bd2b8d5b67c595b1a717abe5de
[firefly-linux-kernel-4.4.55.git] / arch / arm / mach-s5p6440 / include / mach / map.h
1 /* linux/arch/arm/mach-s5p6440/include/mach/map.h
2  *
3  * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4  *              http://www.samsung.com/
5  *
6  * S5P6440 - Memory map definitions
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11 */
12
13 #ifndef __ASM_ARCH_MAP_H
14 #define __ASM_ARCH_MAP_H __FILE__
15
16 #include <plat/map-base.h>
17 #include <plat/map-s5p.h>
18
19 #define S5P6440_PA_CHIPID       (0xE0000000)
20 #define S5P_PA_CHIPID           S5P6440_PA_CHIPID
21
22 #define S5P6440_PA_SYSCON       (0xE0100000)
23 #define S5P6440_PA_CLK          (S5P6440_PA_SYSCON + 0x0)
24 #define S5P_PA_SYSCON           S5P6440_PA_SYSCON
25
26 #define S5P6440_PA_GPIO         (0xE0308000)
27
28 #define S5P6440_PA_VIC0         (0xE4000000)
29 #define S5P6440_PA_VIC1         (0xE4100000)
30
31 #define S5P6440_PA_PDMA         0xE9000000
32
33 #define S5P6440_PA_TIMER        (0xEA000000)
34 #define S5P_PA_TIMER            S5P6440_PA_TIMER
35
36 #define S5P6440_PA_RTC          (0xEA100000)
37
38 #define S5P6440_PA_WDT          (0xEA200000)
39
40 #define S5P6440_PA_UART         (0xEC000000)
41
42 #define S5P_PA_UART0            (S5P6440_PA_UART + 0x0)
43 #define S5P_PA_UART1            (S5P6440_PA_UART + 0x400)
44 #define S5P_PA_UART2            (S5P6440_PA_UART + 0x800)
45 #define S5P_PA_UART3            (S5P6440_PA_UART + 0xC00)
46
47 #define S5P_SZ_UART             SZ_256
48
49 #define S5P6440_PA_IIC0         (0xEC104000)
50 #define S5P6440_PA_IIC1         (0xEC20F000)
51
52 #define S5P6440_PA_SPI0         0xEC400000
53 #define S5P6440_PA_SPI1         0xEC500000
54
55 #define S5P6440_PA_HSOTG        (0xED100000)
56
57 #define S5P6440_PA_HSMMC0       (0xED800000)
58 #define S5P6440_PA_HSMMC1       (0xED900000)
59 #define S5P6440_PA_HSMMC2       (0xEDA00000)
60
61 #define S5P6440_PA_SDRAM        (0x20000000)
62 #define S5P_PA_SDRAM            S5P6440_PA_SDRAM
63
64 /* I2S */
65 #define S5P6440_PA_I2S          0xF2000000
66
67 /* PCM */
68 #define S5P6440_PA_PCM          0xF2100000
69
70 #define S5P6440_PA_ADC          (0xF3000000)
71
72 /* compatibiltiy defines. */
73 #define S3C_PA_UART             S5P6440_PA_UART
74 #define S3C_PA_IIC              S5P6440_PA_IIC0
75 #define S3C_PA_RTC              S5P6440_PA_RTC
76 #define S3C_PA_IIC1             S5P6440_PA_IIC1
77 #define S3C_PA_WDT              S5P6440_PA_WDT
78
79 #define SAMSUNG_PA_ADC          S5P6440_PA_ADC
80
81 #endif /* __ASM_ARCH_MAP_H */