2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/cpufreq.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h> /* just for sched_clock() - funny that */
20 #include <linux/platform_device.h>
22 #include <asm/div64.h>
23 #include <asm/cnt32_to_63.h>
24 #include <asm/hardware.h>
25 #include <asm/system.h>
26 #include <asm/pgtable.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/flash.h>
36 * This table is setup for a 3.6864MHz Crystal.
38 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
57 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
59 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
65 for (i = 0; i < NR_FREQS; i++)
66 if (cclk_frequency_100khz[i] >= khz)
72 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
74 unsigned int freq = 0;
76 freq = cclk_frequency_100khz[idx] * 100;
81 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
82 * this platform, anyway.
84 int sa11x0_verify_speed(struct cpufreq_policy *policy)
90 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
92 /* make sure that at least one frequency is within the policy */
93 tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
94 if (tmp > policy->max)
97 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
102 unsigned int sa11x0_getspeed(unsigned int cpu)
106 return cclk_frequency_100khz[PPCR & 0xf] * 100;
111 * We still need to provide this so building without cpufreq works.
113 unsigned int cpufreq_get(unsigned int cpu)
115 return cclk_frequency_100khz[PPCR & 0xf] * 100;
117 EXPORT_SYMBOL(cpufreq_get);
121 * This is the SA11x0 sched_clock implementation. This has
122 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
124 * The return value is guaranteed to be monotonic in that range as
125 * long as there is always less than 582 seconds between successive
126 * calls to this function.
128 * ( * 1E9 / 3686400 => * 78125 / 288)
130 unsigned long long sched_clock(void)
132 unsigned long long v = cnt32_to_63(OSCR);
134 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
141 int gpio_direction_input(unsigned gpio)
148 local_irq_save(flags);
149 GPDR &= ~GPIO_GPIO(gpio);
150 local_irq_restore(flags);
154 EXPORT_SYMBOL(gpio_direction_input);
156 int gpio_direction_output(unsigned gpio)
163 local_irq_save(flags);
164 GPDR |= GPIO_GPIO(gpio);
165 local_irq_restore(flags);
169 EXPORT_SYMBOL(gpio_direction_output);
172 * Default power-off for SA1100
174 static void sa1100_power_off(void)
178 /* disable internal oscillator, float CS lines */
179 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
180 /* enable wake-up on GPIO0 (Assabet...) */
181 PWER = GFER = GRER = 1;
183 * set scratchpad to zero, just in case it is used as a
184 * restart address by the bootloader.
187 /* enter sleep mode */
191 static struct resource sa11x0udc_resources[] = {
195 .flags = IORESOURCE_MEM,
199 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
201 static struct platform_device sa11x0udc_device = {
202 .name = "sa11x0-udc",
205 .dma_mask = &sa11x0udc_dma_mask,
206 .coherent_dma_mask = 0xffffffff,
208 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
209 .resource = sa11x0udc_resources,
212 static struct resource sa11x0uart1_resources[] = {
216 .flags = IORESOURCE_MEM,
220 static struct platform_device sa11x0uart1_device = {
221 .name = "sa11x0-uart",
223 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
224 .resource = sa11x0uart1_resources,
227 static struct resource sa11x0uart3_resources[] = {
231 .flags = IORESOURCE_MEM,
235 static struct platform_device sa11x0uart3_device = {
236 .name = "sa11x0-uart",
238 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
239 .resource = sa11x0uart3_resources,
242 static struct resource sa11x0mcp_resources[] = {
246 .flags = IORESOURCE_MEM,
250 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
252 static struct platform_device sa11x0mcp_device = {
253 .name = "sa11x0-mcp",
256 .dma_mask = &sa11x0mcp_dma_mask,
257 .coherent_dma_mask = 0xffffffff,
259 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
260 .resource = sa11x0mcp_resources,
263 void sa11x0_set_mcp_data(struct mcp_plat_data *data)
265 sa11x0mcp_device.dev.platform_data = data;
268 static struct resource sa11x0ssp_resources[] = {
272 .flags = IORESOURCE_MEM,
276 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
278 static struct platform_device sa11x0ssp_device = {
279 .name = "sa11x0-ssp",
282 .dma_mask = &sa11x0ssp_dma_mask,
283 .coherent_dma_mask = 0xffffffff,
285 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
286 .resource = sa11x0ssp_resources,
289 static struct resource sa11x0fb_resources[] = {
293 .flags = IORESOURCE_MEM,
298 .flags = IORESOURCE_IRQ,
302 static struct platform_device sa11x0fb_device = {
306 .coherent_dma_mask = 0xffffffff,
308 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
309 .resource = sa11x0fb_resources,
312 static struct platform_device sa11x0pcmcia_device = {
313 .name = "sa11x0-pcmcia",
317 static struct platform_device sa11x0mtd_device = {
322 void sa11x0_set_flash_data(struct flash_platform_data *flash,
323 struct resource *res, int nr)
325 flash->name = "sa1100";
326 sa11x0mtd_device.dev.platform_data = flash;
327 sa11x0mtd_device.resource = res;
328 sa11x0mtd_device.num_resources = nr;
331 static struct resource sa11x0ir_resources[] = {
333 .start = __PREG(Ser2UTCR0),
334 .end = __PREG(Ser2UTCR0) + 0x24 - 1,
335 .flags = IORESOURCE_MEM,
337 .start = __PREG(Ser2HSCR0),
338 .end = __PREG(Ser2HSCR0) + 0x1c - 1,
339 .flags = IORESOURCE_MEM,
341 .start = __PREG(Ser2HSCR2),
342 .end = __PREG(Ser2HSCR2) + 0x04 - 1,
343 .flags = IORESOURCE_MEM,
345 .start = IRQ_Ser2ICP,
347 .flags = IORESOURCE_IRQ,
351 static struct platform_device sa11x0ir_device = {
354 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
355 .resource = sa11x0ir_resources,
358 void sa11x0_set_irda_data(struct irda_platform_data *irda)
360 sa11x0ir_device.dev.platform_data = irda;
363 static struct platform_device sa11x0rtc_device = {
364 .name = "sa1100-rtc",
368 static struct platform_device *sa11x0_devices[] __initdata = {
374 &sa11x0pcmcia_device,
380 static int __init sa1100_init(void)
382 pm_power_off = sa1100_power_off;
384 if (sa11x0ir_device.dev.platform_data)
385 platform_device_register(&sa11x0ir_device);
387 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
390 arch_initcall(sa1100_init);
392 void (*sa1100fb_backlight_power)(int on);
393 void (*sa1100fb_lcd_power)(int on);
395 EXPORT_SYMBOL(sa1100fb_backlight_power);
396 EXPORT_SYMBOL(sa1100fb_lcd_power);
400 * Common I/O mapping:
402 * Typically, static virtual address mappings are as follow:
404 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
405 * 0xf4000000-0xf4ffffff: SA-1111
406 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
407 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
408 * 0xffff0000-0xffff0fff: SA1100 exception vectors
409 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
411 * Below 0xe8000000 is reserved for vm allocation.
413 * The machine specific code must provide the extra mapping beside the
414 * default mapping provided here.
417 static struct map_desc standard_io_desc[] __initdata = {
419 .virtual = 0xf8000000,
420 .pfn = __phys_to_pfn(0x80000000),
421 .length = 0x00100000,
424 .virtual = 0xfa000000,
425 .pfn = __phys_to_pfn(0x90000000),
426 .length = 0x00100000,
429 .virtual = 0xfc000000,
430 .pfn = __phys_to_pfn(0xa0000000),
431 .length = 0x00100000,
434 .virtual = 0xfe000000,
435 .pfn = __phys_to_pfn(0xb0000000),
436 .length = 0x00200000,
441 void __init sa1100_map_io(void)
443 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
447 * Disable the memory bus request/grant signals on the SA1110 to
448 * ensure that we don't receive spurious memory requests. We set
449 * the MBGNT signal false to ensure the SA1111 doesn't own the
452 void __init sa1110_mb_disable(void)
456 local_irq_save(flags);
460 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
462 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
464 local_irq_restore(flags);
468 * If the system is going to use the SA-1111 DMA engines, set up
469 * the memory bus request/grant pins.
471 void __init sa1110_mb_enable(void)
475 local_irq_save(flags);
479 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
481 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
484 local_irq_restore(flags);