2 * linux/arch/arm/mach-sa1100/generic.c
4 * Author: Nicolas Pitre
6 * Code common to all SA11x0 machines.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/cpufreq.h>
18 #include <linux/ioport.h>
19 #include <linux/sched.h> /* just for sched_clock() - funny that */
20 #include <linux/platform_device.h>
22 #include <asm/div64.h>
23 #include <asm/cnt32_to_63.h>
24 #include <asm/hardware.h>
25 #include <asm/system.h>
26 #include <asm/pgtable.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/flash.h>
36 * This table is setup for a 3.6864MHz Crystal.
38 static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
57 #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
59 unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
65 for (i = 0; i < NR_FREQS; i++)
66 if (cclk_frequency_100khz[i] >= khz)
72 unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
74 unsigned int freq = 0;
76 freq = cclk_frequency_100khz[idx] * 100;
81 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
82 * this platform, anyway.
84 int sa11x0_verify_speed(struct cpufreq_policy *policy)
90 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
92 /* make sure that at least one frequency is within the policy */
93 tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
94 if (tmp > policy->max)
97 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
102 unsigned int sa11x0_getspeed(unsigned int cpu)
106 return cclk_frequency_100khz[PPCR & 0xf] * 100;
111 * We still need to provide this so building without cpufreq works.
113 unsigned int cpufreq_get(unsigned int cpu)
115 return cclk_frequency_100khz[PPCR & 0xf] * 100;
117 EXPORT_SYMBOL(cpufreq_get);
121 * This is the SA11x0 sched_clock implementation. This has
122 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
124 * The return value is guaranteed to be monotonic in that range as
125 * long as there is always less than 582 seconds between successive
126 * calls to this function.
128 * ( * 1E9 / 3686400 => * 78125 / 288)
130 unsigned long long sched_clock(void)
132 unsigned long long v = cnt32_to_63(OSCR);
134 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
142 * Default power-off for SA1100
144 static void sa1100_power_off(void)
148 /* disable internal oscillator, float CS lines */
149 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
150 /* enable wake-up on GPIO0 (Assabet...) */
151 PWER = GFER = GRER = 1;
153 * set scratchpad to zero, just in case it is used as a
154 * restart address by the bootloader.
157 /* enter sleep mode */
161 static struct resource sa11x0udc_resources[] = {
165 .flags = IORESOURCE_MEM,
169 static u64 sa11x0udc_dma_mask = 0xffffffffUL;
171 static struct platform_device sa11x0udc_device = {
172 .name = "sa11x0-udc",
175 .dma_mask = &sa11x0udc_dma_mask,
176 .coherent_dma_mask = 0xffffffff,
178 .num_resources = ARRAY_SIZE(sa11x0udc_resources),
179 .resource = sa11x0udc_resources,
182 static struct resource sa11x0uart1_resources[] = {
186 .flags = IORESOURCE_MEM,
190 static struct platform_device sa11x0uart1_device = {
191 .name = "sa11x0-uart",
193 .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
194 .resource = sa11x0uart1_resources,
197 static struct resource sa11x0uart3_resources[] = {
201 .flags = IORESOURCE_MEM,
205 static struct platform_device sa11x0uart3_device = {
206 .name = "sa11x0-uart",
208 .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
209 .resource = sa11x0uart3_resources,
212 static struct resource sa11x0mcp_resources[] = {
216 .flags = IORESOURCE_MEM,
220 static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
222 static struct platform_device sa11x0mcp_device = {
223 .name = "sa11x0-mcp",
226 .dma_mask = &sa11x0mcp_dma_mask,
227 .coherent_dma_mask = 0xffffffff,
229 .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
230 .resource = sa11x0mcp_resources,
233 void sa11x0_set_mcp_data(struct mcp_plat_data *data)
235 sa11x0mcp_device.dev.platform_data = data;
238 static struct resource sa11x0ssp_resources[] = {
242 .flags = IORESOURCE_MEM,
246 static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
248 static struct platform_device sa11x0ssp_device = {
249 .name = "sa11x0-ssp",
252 .dma_mask = &sa11x0ssp_dma_mask,
253 .coherent_dma_mask = 0xffffffff,
255 .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
256 .resource = sa11x0ssp_resources,
259 static struct resource sa11x0fb_resources[] = {
263 .flags = IORESOURCE_MEM,
268 .flags = IORESOURCE_IRQ,
272 static struct platform_device sa11x0fb_device = {
276 .coherent_dma_mask = 0xffffffff,
278 .num_resources = ARRAY_SIZE(sa11x0fb_resources),
279 .resource = sa11x0fb_resources,
282 static struct platform_device sa11x0pcmcia_device = {
283 .name = "sa11x0-pcmcia",
287 static struct platform_device sa11x0mtd_device = {
292 void sa11x0_set_flash_data(struct flash_platform_data *flash,
293 struct resource *res, int nr)
295 flash->name = "sa1100";
296 sa11x0mtd_device.dev.platform_data = flash;
297 sa11x0mtd_device.resource = res;
298 sa11x0mtd_device.num_resources = nr;
301 static struct resource sa11x0ir_resources[] = {
303 .start = __PREG(Ser2UTCR0),
304 .end = __PREG(Ser2UTCR0) + 0x24 - 1,
305 .flags = IORESOURCE_MEM,
307 .start = __PREG(Ser2HSCR0),
308 .end = __PREG(Ser2HSCR0) + 0x1c - 1,
309 .flags = IORESOURCE_MEM,
311 .start = __PREG(Ser2HSCR2),
312 .end = __PREG(Ser2HSCR2) + 0x04 - 1,
313 .flags = IORESOURCE_MEM,
315 .start = IRQ_Ser2ICP,
317 .flags = IORESOURCE_IRQ,
321 static struct platform_device sa11x0ir_device = {
324 .num_resources = ARRAY_SIZE(sa11x0ir_resources),
325 .resource = sa11x0ir_resources,
328 void sa11x0_set_irda_data(struct irda_platform_data *irda)
330 sa11x0ir_device.dev.platform_data = irda;
333 static struct platform_device sa11x0rtc_device = {
334 .name = "sa1100-rtc",
338 static struct platform_device *sa11x0_devices[] __initdata = {
344 &sa11x0pcmcia_device,
350 static int __init sa1100_init(void)
352 pm_power_off = sa1100_power_off;
354 if (sa11x0ir_device.dev.platform_data)
355 platform_device_register(&sa11x0ir_device);
357 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
360 arch_initcall(sa1100_init);
362 void (*sa1100fb_backlight_power)(int on);
363 void (*sa1100fb_lcd_power)(int on);
365 EXPORT_SYMBOL(sa1100fb_backlight_power);
366 EXPORT_SYMBOL(sa1100fb_lcd_power);
370 * Common I/O mapping:
372 * Typically, static virtual address mappings are as follow:
374 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
375 * 0xf4000000-0xf4ffffff: SA-1111
376 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
377 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
378 * 0xffff0000-0xffff0fff: SA1100 exception vectors
379 * 0xffff2000-0xffff2fff: Minicache copy_user_page area
381 * Below 0xe8000000 is reserved for vm allocation.
383 * The machine specific code must provide the extra mapping beside the
384 * default mapping provided here.
387 static struct map_desc standard_io_desc[] __initdata = {
389 .virtual = 0xf8000000,
390 .pfn = __phys_to_pfn(0x80000000),
391 .length = 0x00100000,
394 .virtual = 0xfa000000,
395 .pfn = __phys_to_pfn(0x90000000),
396 .length = 0x00100000,
399 .virtual = 0xfc000000,
400 .pfn = __phys_to_pfn(0xa0000000),
401 .length = 0x00100000,
404 .virtual = 0xfe000000,
405 .pfn = __phys_to_pfn(0xb0000000),
406 .length = 0x00200000,
411 void __init sa1100_map_io(void)
413 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
417 * Disable the memory bus request/grant signals on the SA1110 to
418 * ensure that we don't receive spurious memory requests. We set
419 * the MBGNT signal false to ensure the SA1111 doesn't own the
422 void __init sa1110_mb_disable(void)
426 local_irq_save(flags);
430 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
432 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
434 local_irq_restore(flags);
438 * If the system is going to use the SA-1111 DMA engines, set up
439 * the memory bus request/grant pins.
441 void __init sa1110_mb_enable(void)
445 local_irq_save(flags);
449 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
451 GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
454 local_irq_restore(flags);