arch/arm/mach-tegra/cpuidle-tegra30.c

   1 /*
   2  * CPU idle driver for Tegra CPUs
   3  *
   4  * Copyright (c) 2010-2012, NVIDIA Corporation.
   5  * Copyright (c) 2011 Google, Inc.
   6  * Author: Colin Cross <ccross@android.com>
   7  *         Gary King <gking@nvidia.com>
   8  *
   9  * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com>
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  */
  21
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/cpuidle.h>
  25 #include <linux/cpu_pm.h>
  26 #include <linux/clockchips.h>
  27 #include <linux/clk/tegra.h>
  28
  29 #include <asm/cpuidle.h>
  30 #include <asm/proc-fns.h>
  31 #include <asm/suspend.h>
  32 #include <asm/smp_plat.h>
  33
  34 #include "pm.h"
  35 #include "sleep.h"
  36
  37 #ifdef CONFIG_PM_SLEEP
  38 static int tegra30_idle_lp2(struct cpuidle_device *dev,
  39                             struct cpuidle_driver *drv,
  40                             int index);
  41 #endif
  42
  43 static struct cpuidle_driver tegra_idle_driver = {
  44         .name = "tegra_idle",
  45         .owner = THIS_MODULE,
  46 #ifdef CONFIG_PM_SLEEP
  47         .state_count = 2,
  48 #else
  49         .state_count = 1,
  50 #endif
  51         .states = {
  52                 [0] = ARM_CPUIDLE_WFI_STATE_PWR(600),
  53 #ifdef CONFIG_PM_SLEEP
  54                 [1] = {
  55                         .enter                  = tegra30_idle_lp2,
  56                         .exit_latency           = 2000,
  57                         .target_residency       = 2200,
  58                         .power_usage            = 0,
  59                         .flags                  = CPUIDLE_FLAG_TIME_VALID,
  60                         .name                   = "powered-down",
  61                         .desc                   = "CPU power gated",
  62                 },
  63 #endif
  64         },
  65 };
  66
  67 #ifdef CONFIG_PM_SLEEP
  68 static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev,
  69                                            struct cpuidle_driver *drv,
  70                                            int index)
  71 {
  72         struct cpuidle_state *state = &drv->states[index];
  73         u32 cpu_on_time = state->exit_latency;
  74         u32 cpu_off_time = state->target_residency - state->exit_latency;
  75
  76         /* All CPUs entering LP2 is not working.
  77          * Don't let CPU0 enter LP2 when any secondary CPU is online.
  78          */
  79         if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) {
  80                 cpu_do_idle();
  81                 return false;
  82         }
  83
  84         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
  85
  86         tegra_idle_lp2_last(cpu_on_time, cpu_off_time);
  87
  88         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
  89
  90         return true;
  91 }
  92
  93 #ifdef CONFIG_SMP
  94 static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
  95                                         struct cpuidle_driver *drv,
  96                                         int index)
  97 {
  98         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &dev->cpu);
  99
 100         smp_wmb();
 101
 102         cpu_suspend(0, tegra30_sleep_cpu_secondary_finish);
 103
 104         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &dev->cpu);
 105
 106         return true;
 107 }
 108 #else
 109 static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev,
 110                                                struct cpuidle_driver *drv,
 111                                                int index)
 112 {
 113         return true;
 114 }
 115 #endif
 116
 117 static int tegra30_idle_lp2(struct cpuidle_device *dev,
 118                             struct cpuidle_driver *drv,
 119                             int index)
 120 {
 121         u32 cpu = is_smp() ? cpu_logical_map(dev->cpu) : dev->cpu;
 122         bool entered_lp2 = false;
 123         bool last_cpu;
 124
 125         local_fiq_disable();
 126
 127         last_cpu = tegra_set_cpu_in_lp2(cpu);
 128         cpu_pm_enter();
 129
 130         if (cpu == 0) {
 131                 if (last_cpu)
 132                         entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv,
 133                                                                      index);
 134                 else
 135                         cpu_do_idle();
 136         } else {
 137                 entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index);
 138         }
 139
 140         cpu_pm_exit();
 141         tegra_clear_cpu_in_lp2(cpu);
 142
 143         local_fiq_enable();
 144
 145         smp_rmb();
 146
 147         return (entered_lp2) ? index : 0;
 148 }
 149 #endif
 150
 151 int __init tegra30_cpuidle_init(void)
 152 {
 153 #ifdef CONFIG_PM_SLEEP
 154         tegra_tear_down_cpu = tegra30_tear_down_cpu;
 155 #endif
 156         return cpuidle_register(&tegra_idle_driver, NULL);
 157 }